JPH07120221B2 - Power MOSFET with overcurrent protection function - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to a power MOSFET (MOS) having an overcurrent protection function.
Field effect transistor).

B. Prior Art As a power MOSFET with an overcurrent protection function, for example, as shown in FIG.
-223018 is shown.

In FIG. 7, 100 is a power MOSFE with overcurrent protection function.
T and _RL are loads. Power MOSFET with overcurrent protection
Includes a main MOSFET M1 (hereinafter, MOS transistor M1) that switches the load R _L, and a current mirror MOSFET M2 (hereinafter, MOS transistor M2) connected in parallel with the main MOS transistor M1.
The transistor M2 is composed of a single or several power MOSFET cells connected in parallel, and the main MOS transistor M1 is composed of thousands of the same power MOSFET cells connected in parallel.

In FIG. 7, _RS current detecting resistor, Ri is an input resistor, and T1 is a bipolar transistor that limits the gate voltage V _G1 of the main MOS transistor M1. Current detection resistor
R _S is connected in series to the source of the current mirror MOS transistor M2, and the input resistor Ri is connected in series between the common gate input terminal G of the MOS transistors M1 and M2 and the gate of the main MOS transistor M1. The collector of the bipolar transistor T1 is connected to the gate input terminal G via the input resistor Ri and is a current mirror MOS transistor M.
It is connected to the gate of 2, the emitter of which is connected to the source of the main MOS transistor M1 and the base of which is connected to the source of the current mirror MOS transistor M2.

Next, the operation of the conventional power MOSFET with an overcurrent protection function configured as described above will be described.

Supply voltage V _B to main MOS transistor M1 through load R _L
When an abnormality such as a short circuit of the load R _L occurs while the current is being applied, the main MOS transistor M
The voltage V _DS applied between the drain and the source of 1 increases, and the current I flowing therethrough also increases. At this time, in the power MOSFET that does not have the overcurrent protection function, the temperature rises and is destroyed by the overcurrent.

Therefore, the power MOSFET having the configuration shown in FIG. 7 is protected from overcurrent as follows.

When overcurrent flows, the current mirror MOS transistor M2
The current i flowing through the current detection resistor R _S through the same also increases. Therefore, the base-emitter voltage V _BE = i · R _S of the bipolar transistor T1 increases, and finally the base
It becomes the threshold voltage V _BEON (= 0.6V) of the voltage between the emitters. Then, the base current i _B flows through the bipolar transistor T1, the transistor T1 becomes conductive, and the collector current i _C flows. Then, as the base current i _B increases, the collector current i _C also increases, and the gate voltage V of the main MOS transistor M1 increases.
_G1 decreases. This can be expressed by the following formula.

R _S (i−i _B ) = V _BEON = 0.6V …… (1) i _C ＝ h _FB・ i _B …… (2) V _G1 ＝ V _G2 −Ri ・ i _C …… (3) Above (1 ), (2) and (3), i _C and i _B are removed, Becomes Here, h _FE is the grounded-emitter current amplification factor of the bipolar transistor T1. Further, the condition for the expression (4) to be satisfied can be expressed by the following expression (5).

R _S · i> V _BEON (5) The following can be understood from the above equations (4) and (5).

When the current i increases and R _S · i exceeds V _BEON , the bipolar transistor T1 turns on. When the current i further increases, i _C and I _B increase, and as a result, the gate voltage V
_{When G1} becomes lower than the threshold voltage V _TH of the main MOS transistor M1, the main MOS transistor M1 turns off.
Therefore, the current I decreases and the power MOSFET can be protected from overcurrent.

By the way, the current detection resistor R _S includes a diffusion resistor formed by diffusing impurities in a predetermined region on the same silicon substrate as the power MOSFET and a polysilicon resistor formed on a polysilicon film deposited on the insulating film on the silicon substrate. There is a silicon resistor.

FIG. 8 shows a temperature characteristic diagram of a polysilicon resistor, which is described in “Journal of Applied Phycics, Vol.46, No.12, Dec.
1975, “The electrical properties of aggregate
It is disclosed in "silicon films", P.5249 ". The vertical axis uses the unit of logarithmic display of the ratio of the specific resistance at each temperature to the specific resistance at 160 ° C.

This FIG. 8 shows that the resistance value of the polysilicon resistance decreases as the temperature rises, that is, there is temperature dependence. This is because the number of heat emitting electrons that exceeds the potential barrier of the crystal grain boundary of the polysilicon film increases as the temperature rises.

When such a polysilicon resistor is used as a current detection resistor, its resistance value decreases as the temperature rises,
R _{S in the} above equation (5) becomes small. In order to satisfy the condition of formula (5), the current i must be increased. However, this current i increases the bipolar transistor.
Even if an attempt is made to secure the condition for turning on T1, the overcurrent may flow through the main MOS transistor M1 before that. In addition, the bipolar transistor T1 is hard to turn on, and the overcurrent protection function of the power MOSFET can hardly be exhibited.

Fig. 9 shows the temperature characteristics of diffusion resistance, which is disclosed in "The Institute of Electrical Communication, University Course, Corona Publishing Co., Ltd., published on February 10, 1964," Semiconductor Electronics ", P.31". There is.

This FIG. 9 shows the following.

When the temperature becomes low, it becomes difficult for carriers to be supplied from impurities, so that the conductivity decreases. Further, when the temperature rises, most of the impurities are ionized and carriers do not increase, so that there is a region where the conductivity is saturated. Then, when the temperature further rises, carriers are generated from the intrinsic semiconductor, and the conductivity increases and increases. However, in the saturation region, due to the temperature dependence of carrier mobility, the conductivity tends to decrease to some extent as the temperature rises.

That is, the resistance value of the diffusion resistance decreases as the temperature rises in most temperature ranges. However, the resistance value is almost constant only within a certain temperature range or slightly increases due to the temperature rise. This temperature range is determined by the impurity density and crystal defect density.

When using such a diffused resistor as a current detection resistor,
By controlling the impurity density and the defect density so that the resistance value of the diffusion resistance increases with temperature within a temperature range in which the operation of the MOSFET is guaranteed, the overcurrent protection function of the MOSFET can be effectively exhibited. However, since the resistance value of the diffusion resistance decreases as the temperature decreases, it is necessary to consider this and design so that the overcurrent protection function is not lost.

C. Problem to be Solved by the Invention In the conventional power MOSFET with an overcurrent protection function as described above, the current i flowing through the current mirror MOS transistor M2 is changed by the current detection resistor R _{S formed} of a polysilicon resistor or a diffusion resistor. The voltage is converted into a voltage, and when the voltage exceeds a predetermined threshold voltage, the bipolar transistor T1 is turned on to lower the gate voltage of the main MOS transistor M1.
Since the OS transistor M1 is turned off, if the resistance value of the current detection resistor decreases due to an increase in ambient temperature, the condition of formula (5) for turning on the bipolar transistor T1 cannot be satisfied and overcurrent protection is performed. Functions are lost.

Although the above-mentioned problem can be solved by using a diffusion resistance designed so that the resistance value of the current detection resistance does not decrease due to temperature rise, on the other hand, when the diffusion resistance is formed on the silicon substrate, impurity density and defects It is necessary to control the density and the like with high accuracy, which limits the degree of freedom in circuit design, which makes circuit design difficult. Furthermore, since current always flows through the current detection resistor, there is a problem that power consumption is large and heat is generated.

SUMMARY OF THE INVENTION The technical problem of the present invention is to make circuit design easy regardless of temperature change, to increase the degree of freedom of design, and to ensure overcurrent protection with low power consumption.

D. Means for Solving the Problems The present invention will be described with reference to FIG. 1 showing an embodiment. A power MOSFET with an overcurrent protection function according to the present invention responds to a gate input signal input to a gate input terminal G. Main MOS transistor M1 that turns on / off the load R _L by switching on and off and the main MOS transistor M1 so that a current proportional to the current flowing through the main MOS transistor M1 flows.
A current mirror MO that is connected to and is turned on / off according to the gate input signal input to the gate input terminal G.
Between the S transistor M2, the gate input terminal G and the gate resistor R1 interposed between the gate of the current mirror MOS transistor M2, the connection point between the gate input terminal G and the gate resistor R1 and the gate of the main MOS transistor M1. The main MOS is controlled by controlling the current flowing through the input resistor Ri and the current flowing through the input resistor Ri, which is ON-controlled according to the magnitude of the current directly flowing through the current mirror MOS transistor M2.
And a gate voltage limiting switching means T1 for controlling the gate voltage of the transistor M1.

E. Action When a failure occurs, the current i flowing through the base of the gate voltage limiting switching means T1 through the current mirror MOS transistor M2 increases, and the gate voltage limiting switching means T1 turns on with this current i. As a result, a current flows through the gate voltage limiting switching means T1 via the input resistor Ri. At this time, the gate voltage of the current mirror MOS transistor M2 is maintained at the threshold value or more due to the voltage drop of the input resistance Ri, but the gate voltage V _G1 of the main MOS transistor M1 decreases, and the main MOS transistor M1 can be turned off.

This ensures that the power MOSFET can be protected from overcurrent without being affected by the ambient temperature. Since the current detection resistor is unnecessary, circuit design can be facilitated and the degree of freedom in circuit design can be expanded.

Further, since the gate voltage V _G2 is applied to the gate of the current mirror MOS transistor M2 via the gate resistor R1, the gate input signal input to the gate input terminal G is delayed by the gate resistor R1. Transistor M
The current mirror MOS transistor M2 is turned on after 1 is turned on first. Therefore, the main MOS transistor M1 can be reliably turned on.

F. Examples Hereinafter, examples of the present invention will be described with reference to the drawings.

Embodiment I FIG. 1 shows a power MOSF with overcurrent protection function according to the present invention.
It is a circuit diagram showing a first embodiment of the ET, the same parts as those in FIG.

In FIG. 1, reference numeral 101 in a portion surrounded by an alternate long and short dash line is a power MOSFET with an overcurrent protection function, which includes a drain terminal D, a source terminal S, and a gate input terminal G.
The drain terminal D is connected to the power supply voltage V _B via the load _RL , and the source terminal S is grounded.

A power MOS transistor 101 with an overcurrent protection function is a main MOS transistor M1 for load switching in which a drain and a source are connected between a drain terminal D and a source terminal S.
And a current mirror MOS transistor M2 and a bipolar transistor T1. Also, current mirror MOS
The drain of the transistor M2 is connected to the drain terminal D, and the gate thereof is connected to the gate input terminal G via the gate resistor R1. Furthermore, the main MOS transistor M
The gate of 1 is connected to the connection point of the gate input terminal G and the gate resistor R1 via the input resistor Ri.

The collector of the bipolar transistor (gate voltage limiting switching means) T1 that limits the gate voltage V _G1 of the main MOS transistor M1 is connected to the gate of the main MOS transistor M1, its emitter is connected to the source terminal S, and the base is It is connected to the source of the Karen Miller MOS transistor M2.

Next, the operation of the power MOSFET having the above-described structure according to this embodiment will be described.

(During normal operation of the power MOSFET) The gate voltage V _G input to the gate input terminal _G is the threshold voltage.
When the main MOS transistor M1 is higher than V _{TH and the} main MOS transistor M1 is conducting, its on-resistance is small, so its drain-source voltage V _DS is small and
Base-emitter voltage V _BE (<V _DS ) of transistor T1
Is smaller than its threshold voltage V _BEON (= 0.6V). Therefore, the bipolar transistor T1 does not turn on and the current i (= i _B ) does not flow. At this time, the collector current i _C is i _C = h _FE · i _B =, and the gate voltage V _G is V _G = V _G2
= V _G1 and the main MOS transistor M1 remains conductive.

On the other hand, when the gate voltage V _G becomes lower than the threshold voltage V _TH of the main MOS transistor M1 and the current mirror MOS transistor M2, the main MOS transistor M1 and the current mirror MOS transistor M2 are turned off, and the current i = (i _B )
Does not flow. In this case also bipolar transistor T1 is not turned on, the collector current i _{C is, i C = h FE · i} B =
It becomes 0.

Here, the gate resistor R1 is provided for the following reason.

When the main MOS transistor M1 and the current mirror MOS transistor M1 are both cut off, when an input signal is applied to the gate input terminal G to switch on the power MOSFET 101, if the current mirror MOS transistor M2 is more than the main MOS transistor M1. Even if it is turned on first, the current mirror MOS transistor M2 does not have enough power to drive the load R _L. As a result, the drain-source voltage V _DS thereof rises, the bipolar transistor T1 is turned on, and the main MOS transistor M1 may not be turned on. Therefore,
The resistor R1 is provided to ensure that the current mirror MOS transistor M2 turns on later than the main MOS transistor M1.

(When abnormality occurs such as load _RL short-circuited) When power MOSFET 101 is turned on, for example, when load _RL is short-circuited and load current I _L increases, drain-source voltage V _{DS of} main MOS transistor M1 also increases. Along with this, the base-emitter voltage V _BE of the bipolar transistor T1 increases, and finally the base-emitter voltage threshold V
_It will be bigger than _BEON . Then, the base current i _B flows through the bipolar transistor T1 to turn it on, and the collector current I _C also starts flowing. At this time, the current mirror MOS transistor M
A current i (= i _B ) also flows into 2.

Now, the current I flowing through the main MOS transistor M1 and the current i flowing through the current mirror MOS transistor M2 will be described.

Assuming that the main MOS transistor M1 and the current mirror MOS transistor M2 are composed of n ₁ and n ₂ identical power MOSFET cells, respectively, a current I flowing through the main MOS transistor M1 and a current flowing through the current mirror MOS transistor M2. The ratio with i is n ₁ : n ₂ . That is, the current i is And is proportional to the load current I _L. As a result, the MOS transistor M2 functions as a current mirror.

The gate voltage V _G1 at this time is given by the following equation.

V _G1 = V _G2 −Ri · i _C = V _G2 −Ri · h _FE · I (6) As is apparent from this equation (6), the bipolar transistor T1 turns on due to the increase in the load current I _L. When the load current I _L further increases, the current i flowing through the current mirror MOS transistor M2 also increases in proportion to it. At this time, the voltage drop across the input resistor Ri causes the current mirror
The gate voltage of the MOS transistor M2 is kept above its threshold value and continues to turn on. Meanwhile, the main MOS transistor M1
Decreases as the collector current I _C of the bipolar transistor T1 increases and becomes lower than the threshold value. As a result, the main MO
The S transistor M1 is turned off, and the power MOSFET 101 is protected from overcurrent due to a load short circuit or the like.

FIG. 2 shows a part of the device structure of the power MOSFET described above, that is, a current mirror MOS transistor M2, a bipolar transistor T1, a gate resistance R1 and an input resistance.
It is a structural drawing of Ri.

The power MOSFET 101 with overcurrent protection function includes an N-type semiconductor substrate 1 including an N-type high-concentration substrate 1a and an N-type low-concentration substrate 1b, and a drain terminal D is provided on the back surface of the N-type semiconductor substrate 1. A vertical MOSFET, that is, a current mirror MOS transistor M2 is formed on the N-type low-concentration substrate 1b of the N-type semiconductor substrate 1 by the double diffusion method. The current mirror MOS transistor M2 includes P well regions 2a and 2b formed in an N type low concentration substrate 1b and P well regions 2a and 2a.
N ⁺ region 3a formed within 2b, 3b and, N ⁺ region 3a, a gate electrode 5 arranged via a gate oxide film 4 so as to be positioned between 3b
And an interlayer insulating film 6 covering the gate electrode 5 and a source electrode 7 contacting the P well region 2a and the N ⁺ region 3a. Although not shown, the main MOS transistor M1 is also formed on the substrate 1 by such a vertical MOSFET.

The bipolar transistor T1, the gate resistance R1 and the input resistance Ri are for insulation formed on the N-type semiconductor substrate 1.
It is formed in the polysilicon films 9A, 9B and 9C on the SiO ₂ film 8.

Fig. 3 shows the power equivalent to Fig. 1 with overcurrent protection function.
3 is a plan view showing an example of a device in which the MOS transistor 101 is formed on a semiconductor substrate, and the same reference numerals as those in FIG. 1 represent the same parts.

The device shown in FIG. 3 has a main MOS transistor M
1, a current mirror MOS transistor M2, a bipolar transistor T1, a gate resistance R1, and an input resistance Ri. Here, the main MOS transistor M1 includes a P well M11 provided in an N-type semiconductor substrate, an N ⁺ source region M12 provided in the P well M11, and a P ⁺ region M provided in the source region M1.
7 cells SM1-1 to SM1-7 composed of 13 and a gate M14 is provided between adjacent cells. The current mirror MOS transistor M2 is the main MOS transistor M1.
P well M21, N ⁺ source region M22, P ⁺ region M23
And a gate M24. Each of these elements is connected to the circuit shown in FIG.

4 and 5 are a plan view of the bipolar transistor T1 shown in FIG. 3 and a sectional view taken along line VV of FIG.

In FIGS. 4 and 5, a polycrystalline silicon layer 102 as a semiconductor thin film is deposited on an insulating substrate 501 to a required thickness and patterned into a predetermined shape. Then, the mask material 1 is formed on a predetermined region of the polycrystalline silicon layer 102.
10 are formed. In the polycrystalline silicon layer 102 directly under the mask material 110, a low concentration N-type collector region 105a and P
The shaped base region 104a is formed in contact with the shaped base region 104a.

The polycrystalline silicon layer 102 other than directly under the mask material 110 is in contact with the N-type collector region 105a and the N ^{+ -type} collector extraction region 105b.
Is formed and contacts the P-type base region 104a to form N ⁺
A shaped emitter region 103 is formed. The P type base region 104a sandwiched between the N ^{+ type} emitter region 103 and the N type collector region 105a has an extremely narrow base width W (several thousands). The base width W is introduced into the polycrystalline silicon layer 102 by double-diffusing the P-type impurity forming the P-type base region 104a and the N-type impurity forming the N-type collector region 105a using the mask material 110 as a mask. However, it is defined by the difference in the lateral diffusion length of the two types of impurities.

Further, in the polycrystalline silicon layer 102 other than directly under the mask material 110, the P ^{+ type} base extraction region is in contact with the P type base region 104a.
104b is formed. The P ^{+ -type} base extraction region 104b and the N ⁺ -type emitter region 103 are separated by the interlayer insulating film 107 in a region other than directly below the mask material 110. Immediately below the mask material 110, the P-type base extraction region 104b and the N ⁺ -type emitter region 103 are connected to the P-type base region 104a so as to wrap in the base width direction. That is, the P-type base extraction region 104b and the N ⁺ -type emitter region 103 are connected only in the base region 104a.

In addition, the N ⁺ -type emitter region 103 and the P ^{+ -type} base extraction region 104
b and the N ^{+ -type} collector extraction region 105b are connected to the emitter electrode 106E, the base electrode 106B, and the collector electrode 106C through contact holes formed in the interlayer insulating film 107 deposited on the polycrystalline silicon layer 102, respectively. ing.

The bipolar transistor T1 configured as described above is connected to the base electrode 106B except for the portion directly under the mask material 110.
⁺ Type base extraction region 104B and N ⁺ 104b and N ^{+ type} emitter region 1
03 is separated from each other, and the N ⁺ -type emitter region 103 and the P ^{+ -type} base extraction region 104b are in contact with each other with a contact length shorter than the base width W via the P-type base region 104a immediately below the mask material 110. No parasitic diode is formed by the PN junction between the bases. Therefore, all the base current i _B contributes to the transistor operation, and the current amplification factor h _FE can be prevented from lowering due to the formation of the parasitic diode. Further, since the parasitic diode is not formed between the emitter and the base, there is no parasitic capacitance between the emitter and the base due to the junction capacitance of this parasitic diode, and as a result, the operating speed of the transistor can be increased and the cutoff frequency f _T is increased. You can also

This type of power MOSFET with overcurrent protection function of this embodiment
In this case, the current i flowing through the current mirror MOS transistor M2 is made to flow directly to the base of the bipolar transistor T1 without using a current detection resistor, and the current i
Since it is configured to control the gate voltage of the MOS transistor M1, it is possible to reliably exert the overcurrent protection function that is not affected by temperature changes. Also, since there is no current detection resistor, it is not necessary to design the circuit considering its temperature characteristics.
The degree of freedom in design is increased and circuit design is facilitated.
Further, since the gate resistor R1 is interposed between the gate of the current mirror MOS transistor M2 and the gate input terminal G, the gate input signal of the current mirror MOS transistor M2 is delayed and turned on before the main MOS transistor M1. The main MOS transistor M1 can be turned on without fail.

Furthermore, since the current detection resistor can be omitted, the circuit configuration is simplified, the circuit can be made smaller, and a smaller area and higher integration can be achieved. In addition, when the current detection resistor is used, the current always flows. However, with the configuration of this embodiment, the current i becomes larger when the base-emitter voltage V _BE is larger than the threshold voltage V _BEON. Since it does not flow except when it is turned off, the power consumption can be reduced.

Embodiment II FIG. 6 shows a power MOSF with overcurrent protection function according to the present invention.
It is a circuit diagram showing a second embodiment of the ET101, the same parts as those in FIG. 1 are denoted by the same reference numerals, and the description thereof will be omitted.
The points different from the figure will be emphasized.

In this FIG. 6 and the embodiment, the parts different from FIG.
The base of the bipolar transistor T1 is connected to the source of the current mirror MOS transistor M2 via the base resistance R _B.

In this embodiment, by providing the base resistance R _B , the operating point of the bipolar transistor T1 can be set and the operation can be stabilized, and the same effect as the first embodiment can be obtained.

Although the N-channel low-side switch has been described above, the present invention can be similarly applied to the N-channel high-side switch. Furthermore, if all polarities and electrodes are inverted, the present invention can be similarly applied to P-channel low-side and high-side switches.

G. Effects of the Invention As described above, according to the present invention, the current mirror MO
The current flowing through the SFET is sent directly to the control terminal of the gate voltage limiting switching means, and the current controls the gate voltage controlling switching means to control the main MOSFET.
Since it is configured to control the gate voltage of the power MOSFET, the power MOSFET can be reliably protected from overcurrent without being affected by changes in the outside air temperature, and the current detection resistor is not required, which allows circuit settings. In addition to being easy, the degree of freedom in design is increased, and low power consumption can be achieved. Further, since the gate resistor is provided, the current mirror MOS transistor does not turn on first, and the main MOS transistor can be reliably turned on.

[Brief description of drawings]

FIG. 1 is a power MOSFET with an overcurrent protection function according to the present invention.
2 is a circuit diagram showing a first embodiment of the present invention, FIG. 2 is a configuration diagram showing a part of the device structure of the power MOSFET in FIG. 1, and FIG.
FIG. 4 is a plan view showing an example of a power MOSFET device corresponding to FIG. 1, FIG. 4 is an enlarged plan view of a bipolar transistor used in the power MOSFET shown in FIG. 3, and FIG. 5 is V of FIG. -V line sectional view, FIG. 6 is a circuit diagram showing a second embodiment of a power MOSFET with an overcurrent protection function according to the present invention, FIG. 7 is a circuit diagram of a conventional power MOSFET with an overcurrent protection function, and FIG. The figure shows the temperature characteristics of polysilicon resistance, No. 9.
The figure is a temperature characteristic diagram of the diffusion resistance. 101: Power MOSFET with overcurrent protection M1: Main MOSFET M2: Current mirror MOSFET T1: Bipolar transistor Ri: Input resistance, R1: Gate resistance R _B : Base resistance, R _L : Load

Claims (1)

[Claims] 1. A main MOSFET that switches a load by turning on and off according to a gate input signal input to a gate input terminal, and a main MOSFET connected so that a current proportional to a current flowing through the main MOSFET flows. And is turned on according to the gate input signal input to the gate input terminal.
A current mirror MOSFET that is turned off, a gate resistance interposed between the gate input terminal and the gate of the current mirror MOSFET, a connection point between the input terminal and the gate resistance, and the main MO.
The gate voltage of the main MOSFET is limited by controlling the input resistance connected between the gate of the SFET and the current flowing through the input resistance, which is on-controlled according to the magnitude of the current flowing directly through the current mirror MOSFET. A power MOSFET with an overcurrent protection function, which is provided with switching means for limiting the gate voltage.