JPH0710019B2 - Embedded structure semiconductor laser manufacturing method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a buried structure semiconductor laser by a metal organic vapor phase epitaxial method capable of growing an epitaxial film having a uniform composition and a layer thickness in a large area. It is a thing.

[Conventional technology]

A laser that oscillates at a low threshold and operates in a stable mode is desirable. As a device that satisfies the above conditions, there is a buried structure semiconductor laser in which an active layer is embedded so as to be surrounded by a material having a smaller refractive index than the active layer. Representative examples of the buried structure semiconductor lasers reported so far are shown in FIGS. 7 and 8.

Figure 7 shows "Hirao et al., Applied Physics, 1980, 51, 4539".
(M.Hirao et al., J.Appl.Phys., 1980, vol.51, p4539)
3 is a cross-sectional view showing a buried structure semiconductor laser reported in FIG. In FIG. 7, 1 is an n-type InP buffer layer, 2 is GaI
nAsP active layer, 3 is a p-type InP clad layer, 4 is a p-type InP current blocking layer, and 5 is an n-type InP current confinement layer. The active layer 2 has a buried structure surrounded by InP layers 1, 3, 4, and 5 having a small refractive index. In this structure, the buried layers 4 and 5 are grown by a liquid phase epitaxial method (hereinafter referred to as “LPE method”), and this LPE method utilizes the fact that crystals do not grow in the derivative film attached to the upper portion of the mesa.

Further, FIG. 8 shows “Mito et al., American Electrical and Electronic Engineers Association,
Lightwave Technical Journal, LT-1, Vol. 195, 1983 "(I. Mito et al., IE
EE, J. Light wave Tech., LT-1, p.195, 1983) is a sectional view showing a buried structure semiconductor laser. This semiconductor laser is similar to the semiconductor laser shown in FIG.
The active layer 2 is buried in the InP layers 1, 3, 4, 5 and finally, the entire structure including the cladding layer 3 is buried by the p-type InP layer 6. Here, the current block layer 4,
The LPE method using a two-phase melt having a low degree of supersaturation is used for growing the current confinement layer 5. In this case, it is confirmed that crystals do not grow on the upper portion of the mesa until the height of the upper portion of the mesa matches. We are using.

[Problems to be solved by the invention]

However, the metalorganic vapor phase epitaxial method (hereinafter referred to as "MOVP
"E method"), SiO ₂ is deposited on the upper portion of the mesa shown in FIG.
When the inverted mesa structure with the film 7 is embedded, abnormal growth in an angular shape along the side surface of the mesa occurs at both ends of the upper portion of the mesa, and the embedded growth cannot be performed. For example, “Oishi and Kuroiwa, Journal of Electrochemical Society, 1201-1214, 132, No. 5, 1985”
(M. Oishi and K. Kuroiwa, J. Electrochem. Soc., Pp.1201
~ 1214, vol.132, No.5, 1985). This abnormal growth occurs not only in the SiO ₂ film but also in the silicon nitride film, and generally occurs when a film on which crystal growth does not occur is attached to the upper part of the mesa.

Also, as shown in FIG. 10, even when the mesa is cut vertically, the sidewall portion grows rapidly, and the sidewall portion is entirely p-type InP4.
Therefore, the pn junction could not be formed on the side surface of the mesa.

The present invention has been made in view of such a point, and an object thereof is an embedded structure by a MOVPE method capable of removing the influence of abnormal growth in the vicinity of a mesa caused by a gas transport phenomenon peculiar to vapor phase growth. It is to provide a method for manufacturing a semiconductor laser.

[Means for solving problems]

In order to achieve such an object, the present invention provides a second conductivity type semiconductor layer and a first conductivity type semiconductor on a first conductivity type semiconductor substrate having a mesa region having a multilayer structure including an active phase, a clad layer, and a stencil layer. A step of growing a stack of layers by a metal organic vapor phase epitaxial method so that the height of the stack grown on the first conductivity type semiconductor substrate other than the mesa region becomes equal to the lower surface of the stencil layer; By selectively removing, the laminated layer deposited on the upper surface of the stencil layer is removed.

[Action]

In the present invention, a buried structure semiconductor laser can be manufactured without causing abnormal growth in the vicinity of a mesa by a metal organic vapor phase epitaxial method capable of growing an epitaxial film having a uniform composition and layer thickness in a large area.

〔Example〕

1 to 6 are cross-sectional views for explaining one embodiment of a method of manufacturing a buried structure semiconductor laser according to the present invention. First, as shown in FIG. 1, (100) plane n-type InP substrate
An InP substrate 1 in which a Se-doped n-type InP layer 1b (layer thickness of about 2 μm) is laminated on 1a is formed, and then an undoped GaInAsP active layer 2 (layer thickness of about 0.1 μm) and a p-type InP clad layer 3 ( Layer thickness about 1.
0 μm) is formed, and a GaInAsP stencil layer 8 (layer thickness of about 0.1 μm) for removing the layer grown on the upper surface of the mesa by selective etching is grown by MOVPE method.

Next, as shown in FIG. 2, a silicon oxide film (not shown) is attached to the growth surface by a plasma CVD method, and a stripe having a stripe width of about 2 to 3 μm is formed in the (011) direction by a photolithography technique. Forming a mask,
Etching is performed under the active layer with a 1% Br methyl solution to form a mesa region. Then, next, the silicon oxide film is removed by the plasma etching method.

Next, as shown in FIG. 3, the p-type InP current blocking layer 4 (layer thickness of about 0.5 μm) and the n-type InP current confinement layer 5 (layer thickness) were formed on the substrate having the above mesa region by the MOVPE method. About 0.
5 μm) is formed. As a growth condition, for example, PH ₃ : TMI = 150: 1 (flow ratio) is used as a source gas, and p-type InP is used.
DEZ (diethylzinc) is used as a doping gas when H is deposited, H ₂ Se is used as a doping gas when n-type InP is deposited, hydrogen is used as a carrier gas, the reactor pressure is 50 Torr, and the substrate temperature is Deposition is performed at about 685 ° C. At this time, on the upper surface of the mesa, the growth having the (111) plane on the side surface occurs, and in the other regions, almost uniform growth occurs. Then, the height of the n-type InP current confinement layer 5 grown in a region other than the mesa region is made to conform to the lower surface of the GaInAsP stencil layer 8 on the uppermost surface of the mesa region.

Next, the GaInAsP stencil layer 8 on the uppermost surface of the mesa region is selectively etched using a solution of H ₂ SO ₄ : H ₂ O ₂ : H ₂ O = 3: 1: 1 (30 ° C.) to grow on the upper surface of the mesa region. The p-type InP current blocking layer 4 and the n-type InP current confinement layer 5 are removed. As a result, the crystal plane is flattened as shown in FIG.

Next, the p ^{+ -type} GaInAsP cap layer 9 is grown on the entire wafer by the MOVPE method, and the substrate side is polished to reduce the thickness of the wafer to approx.
After 80 μm, Au / Zn / Ni electrode 10 on the growth side and Au on the substrate side
/ Ge / Ni electrode 11 is vacuum-deposited and heat-treated at 420 ° C. in H ₂ to form an electrode. After that, the plane parallel to the paper surface is cleaved and the fifth
Make a laser chip as shown.

As described above, if a laser is manufactured by using a film on which a compound semiconductor can be epitaxially grown as the uppermost layer of the mesa region, abnormal growth in the mesa region by the MOVPE method does not occur, and the mesa region is formed. Can be embedded,
A buried structure semiconductor laser can be easily manufactured only by the MOVPE method. It is necessary to select the uppermost layer (stencil layer) 8 so that the underlying clad layer 3 is not etched during the selective etching.

Further, in the above-described embodiment, if the lower surface of the GaInAsP stencil layer 8 which is the uppermost layer of the mesa region and the upper surface of the n-type InP current confinement layer 5 do not coincide with each other, the surface cannot be flattened by the selective etching. However, the upper surface of the n-type InP current confinement layer 5 is lower than the lower surface of the mesa region uppermost layer (stencil layer) 8, and even if a low mesa remains after the selective etching, the height of the mesa is less than 1 μm. MOVP if smaller
Since the crystal can be uniformly grown on the entire wafer even by the E method, in that case, as shown in FIG. 6, the p-type InP buried layer 6 is grown on the entire wafer after the selective etching,
After flattening the surface, p ^{+ type} GaIn
An AsP cap layer 9, an Au / Zn / Ni electrode 10, and an Au / Ge / Ni electrode 11 are produced to produce a buried structure semiconductor laser.

When n-type InP is used for the part to be the buried layer 6, Zn may be diffused to the part of the buried layer 6 on the upper surface of the active layer 2 until the p-type InP clad layer 3 is reached, so that the p-type is formed.

Further, as the semiconductor substrate 1, the n-type InP substrate 1a without the Se-doped n-type InP layer 1b may be used.

Further, in the above embodiment, the InP p layer is used as the current blocking layer.
n reverse bias layer was used, but p-type InP current blocking layer 4, n
A semi-insulating InP layer may be used instead of the InP current confinement layer 5.

Furthermore, we have described the GaInAsP / InP system.
Other crystal systems such as a system may be used.

Furthermore, although an n-type substrate is used for the description here, the same thing can be done by using a p-type substrate.

〔The invention's effect〕

As described above, according to the present invention, a stack of the second conductivity type semiconductor layer and the first conductivity type semiconductor layer is grown on the first conductivity type semiconductor substrate having the multi-layered mesa region by the metalorganic vapor phase epitaxial method. A layer deposited on the upper surface of the stencil layer by selectively removing the stencil layer so that the height of the layer grown on the semiconductor substrate of the first conductivity type other than the mesa area becomes equal to the lower surface of the stencil layer in the mesa area. Since the buried structure semiconductor laser can be manufactured only by the metalorganic vapor phase epitaxial method by removing the surface and flattening the surface, it is possible to grow a large area at a time, which is impossible with the liquid phase epitaxial method. Therefore, there is an effect that a large amount of semiconductor lasers can be manufactured.

[Brief description of drawings]

1 to 5 are sectional views for explaining an embodiment of a method of manufacturing a buried structure semiconductor laser according to the present invention, and FIG.
FIG. 7 is a sectional view for explaining the second embodiment,
8 and 9 are sectional views showing a buried structure semiconductor laser manufactured by a liquid crystal epitaxial method, and FIGS. 9 and 10 are sectional views for explaining a conventional manufacturing method by a metal organic vapor phase epitaxial method. . 1, 1a ... n-type InP substrate, 1b ... n-type InP buffer layer, 2 ...
… GaInAsP active layer, 3 …… p type InP cladding layer, 4 …… p
Type InP current blocking layer, 5 ... n type InP current confinement layer, 6
…… P-type InP buried layer, 7 …… Silicon oxide film, 8 …… G
aInAsP stencil layer, 9 …… p ^{+ type} GaInAsP cap layer 9, 10 …… Au / Zn / Ni electrode, 11 …… Au / Ge / Ni electrode.

Claims (1)

[Claims] 1. A stack of a second-conductivity-type semiconductor layer and a first-conductivity-type semiconductor layer is formed on a first-conductivity-type semiconductor substrate having a multi-layered mesa region composed of an active layer, a clad layer, and a stencil layer. Growing by a phase epitaxial method so that the height of the stack grown on the semiconductor substrate of the first conductivity type other than the mesa region is equal to the lower surface of the stencil layer, and the stencil layer is selectively removed. Thereby removing the stack of layers deposited on the upper surface of the stencil layer to planarize the surface thereof.