JPH0682826A - Active matrix substrate and its production - Google Patents

Abstract

PURPOSE:To improve ON/OFF characteristics of a TFT by providing a metallic film which covers a channel part and an intermediate-density impurity area. CONSTITUTION:The TFT in LDD(Lightly Doped Drain) structure has the metallic film 15 formed covering at least the channel part 12 and intermediate-density impurity area 23 of a semiconductor layer 30. Consequently, light never irradiates the channel part 12 by traveling around and the OFF current of the TFT at the time of light irradiation is prevented from increasing. Further, a voltage can be impressed to the metallic film 15, which further operates as a subgate for the TFT. Consequently, the OFF current of the TFT is decreased and the ON current is increased.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix substrate used for liquid crystal display devices and the like and a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, as a liquid crystal display device, an active matrix display device has been used which has advantages such as high contrast and no restriction on the number of picture elements. In an active matrix substrate used in this active matrix type display device, pixel electrodes arranged in a matrix on an insulating substrate are thin film transistors (TF).
It is independently driven by using an active element such as T).

FIG. 5 shows an example of an active matrix substrate using a TFT as an active element. In this active matrix substrate, a plurality of gate bus lines 1 and a plurality of source bus lines 2 are provided on a substrate 11. In the vicinity of the intersection of each gate bus line 1 and each source bus line 2, a TFT 26 connected to both lines is provided. A pixel electrode is connected to the TFT 26, and a liquid crystal is sealed between the pixel electrode and the counter electrode to form a pixel 57. The TFT 26 is controlled by a gate signal sent from the gate drive circuit 54 through the gate bus line 1. The video signal sent from the source drive circuit 52 through the source bus line 2 is T
Written in the picture element 57 when the FT 26 is on. The written video signal is held in the picture element 57 while the TFT 26 is off. Further, the additional capacitance wiring 8 is arranged in parallel with the pixel 57.
The additional capacitor 27 connected to the is formed, and the retention of the above-mentioned video signal is improved.

This active matrix substrate is specifically as shown in FIG. In this active matrix substrate, the TFT 26 has a semiconductor layer 30 formed on the insulating substrate 11. The gate insulating film 13 is formed on the semiconductor layer 30, and the gate electrode 3 branched from the gate bus line is further formed on the gate insulating film 13. The first interlayer insulating film 14 is formed on almost the entire surface of the substrate in this state.

The first interlayer insulating film 14 and the gate insulating film 13
And contact holes 7a and 7b are opened. A source electrode 9 and a drain electrode 10 branched from a source bus line are formed on the first layer tube insulating film 14, and are connected to the semiconductor layer 30 through the contact holes 7a and 7b.

Further, a second interlayer insulating film 17 is formed on almost the entire surface of the substrate, and a contact hole 7c is formed in the second interlayer insulating film 17. Contact hole 7
A metal film 25 is formed so as to fill c, and a pixel electrode 4 connected to the metal film 25 is formed on the second interlayer insulating film 17. By forming the metal film 25 (hatched portion in the figure), ohmic contact can be achieved.

On the gate insulating film 13, an additional capacitance electrode 6 branched from an additional capacitance wiring 8 is provided in parallel with the gate bus line 1 to form an additional capacitance.

In this active matrix substrate,
The TFT 26 has an LDD (Lightly Doped Drain) structure. In this structure, the semiconductor layer 30 made of polycrystalline silicon has five regions, and the channel portion 12 and the high-concentration impurity regions serving as the source region and the drain region are formed.
A medium-concentration impurity region 23 having an impurity concentration lower than that of the high-concentration impurity region is formed with a width of 1.5 to 2 μm. In the medium-concentration impurity region 23, the resistance becomes higher than that in the high-concentration impurity region 24, and the generation of the off current of the TFT can be reduced. Moreover, since the area of the TFT can be made smaller than that of the dual-gate structure TFT, the aperture ratio of the liquid crystal display device can be increased. Therefore,
The liquid crystal display device can be miniaturized and have high definition.

[0009]

However, when the active matrix substrate as described above is used in a liquid crystal display device, the characteristics of the channel portion 22 of the semiconductor layer 30 are changed by the irradiation of light, and the off current of the TFT is reduced. May increase and the display contrast of the liquid crystal display device may decrease. A light-shielding film may be formed on the counter substrate of this substrate in order to prevent light irradiation, but in that case, the aperture ratio of the liquid crystal display device may be low.

The present invention solves the above problems, and an object of the present invention is to provide an active matrix substrate which can prevent an increase in off current of a TFT and realize a liquid crystal display device having a large aperture ratio. is there.

[0011]

In the active matrix substrate of the present invention, picture element electrodes are formed in a matrix on the substrate, and a plurality of scanning wirings and a plurality of signal wirings are passed through the peripheral portion of the picture element electrodes. In the active matrix substrate in which a thin film transistor for driving a pixel electrode is formed in the vicinity of the intersection of both wirings, the thin film transistor has a semiconductor layer divided into five regions, and in the five regions, The outermost region is a high-concentration impurity region serving as a source region and a drain region, the inside thereof is a medium-concentration impurity region, and the central portion is a channel portion, and a gate is provided between the semiconductor layers. A gate electrode is provided via an insulating film, and a metal film is provided on the thin film transistor in this state with one or more insulating films interposed therebetween. Le portion and middle-concentration impurity regions are at least overlying formation, the object is achieved.

The metal film may have a structure capable of applying a voltage.

In the method for manufacturing an active matrix substrate of the present invention, pixel electrodes are formed in a matrix on the substrate,
A plurality of scanning wirings and a plurality of signal wirings are formed through the peripheral portion of the picture element electrode, and a thin film transistor for driving the picture element electrode is formed in the vicinity of the intersection of the two wirings. A method for manufacturing an active matrix substrate, comprising: a semiconductor layer having a divided LDD structure, and a gate electrode provided between the semiconductor layer and a gate insulating film between the semiconductor layers. Forming at least one insulating film, forming a contact hole in the insulating film, filling the contact hole, and forming at least the channel portion and the medium concentration impurity region on the thin film transistor. Including a step of forming a metal film so as to cover and a step of forming the pixel electrode by connecting at least the metal film portion filled in the contact hole, More the above-mentioned object can be achieved.

[0014]

In the LDD structure TFT, the semiconductor layer is 5
A medium-concentration impurity region having a lower impurity concentration than the high-concentration impurity region is formed between the channel portion and the high-concentration impurity region serving as the source region and the drain region. A metal film is formed so as to cover at least the channel portion and the medium concentration impurity region of the semiconductor layer. Since not only the channel portion but also the medium-concentration impurity region is covered, the channel portion is not irradiated with light due to the wraparound of light, and light can be shielded.
Therefore, it is possible to prevent the off current of the TFT from increasing during light irradiation. Further, when this substrate is used for a liquid crystal display device, it is not necessary to form a light shielding film on the counter substrate of this substrate in the portion where the metal film is formed, so that the aperture ratio of the liquid crystal display device is increased. can do. Further, by applying a voltage to the metal film, the metal film acts as a sub gate of the TFT. Therefore, the off current of the TFT can be reduced and the on current can be increased.

[0015]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a plan view showing an active matrix substrate which is an embodiment of the present invention, and FIG. 2 is a sectional view taken along the line AA 'in FIG. In this active matrix substrate, a gate bus line 1 and a source bus line 2 are formed vertically and horizontally on an insulating substrate 11.
The pixel electrode 4 is formed in a region surrounded by both lines. Further, a TFT is connected to drive the pixel electrode 4.

In this active matrix substrate,
Similar to FIG. 5, the TFT has an LDD structure and has a semiconductor layer 30 formed on the insulating substrate 11. A gate insulating film 13 is formed on almost the entire surface of the substrate so as to cover the semiconductor layer 30, and a gate electrode 3 branched from the gate bus line 1 is further formed on the gate insulating film 13. The first interlayer insulating film 14 is formed on almost the entire surface of the substrate in this state.

The first interlayer insulating film 14 and the gate insulating film 13
And contact holes 7a and 7b are opened. A source electrode 9 and a drain electrode 10 branched from the source bus line 2 are formed on the first layer tube insulating film 14, and are connected to the semiconductor layer 30 through the contact holes 7a and 7b.

A second interlayer insulating film 17 is further formed on the first interlayer insulating film 14, and a contact hole 7c is opened in the second interlayer insulating film 17. A metal film 25 (hatched portion in the figure) is formed so as to fill the contact hole 7c, and the metal film is also formed on the second interlayer insulating film 17.
15 (hatched portion in the figure) is formed. Further, the pixel electrode 4 is formed so as to be connected to the metal film 25. Metal film
As shown in FIG. 2, 15 covers the channel portion 12 of the semiconductor layer 30 and the medium-concentration impurity region, so that an independent voltage can be applied.

On the gate insulating film 13, an additional capacitance electrode 6 branched from an additional capacitance wiring 8 is provided in parallel with the gate bus line 1 to form an additional capacitance.

This active matrix substrate is manufactured as follows.

First, a thickness of 40 to 80 is formed on the insulating substrate 11.
A semiconductor layer 30 made of a polycrystalline silicon film having a thickness of nm is formed by the CVD method. Next, an insulating film made of SiO ₂ or SiN _x and having a thickness of about 100 nm is stacked by the CVD method or sputtering, and this is patterned to form the gate insulating film 13. The gate insulating film 13 may be formed by thermally oxidizing the polycrystalline silicon film.

A layer made of polycrystalline silicon doped with phosphorus is deposited thereon by CVD or sputtering to a thickness of 450 nm and patterned to form the gate bus line 1, the gate electrode 3 and the additional capacitance wiring 6. To do. Next, the semiconductor layer is formed by photolithography.
A resist pattern is formed in a region other than 30, and the semiconductor layer 30 is formed using the resist pattern and the gate electrode 3 as a mask.
Then, phosphorus was injected under the conditions of 80 keV and 1 × 10 ¹³ cm ⁻² . Further, in the semiconductor layer 30, a resist removal pattern is formed in a region away from the gate electrode 3 by 1.5 to 2.0 μm, and phosphorus is added at 30 keV and 1.0 × 10 ¹⁵ cm ^−2.
Was injected under the conditions of. As a result, the channel portion 12, the medium concentration impurity region 23 having a width of 1.5 to 2 μm, and the high concentration impurity region 24 to be the source region and the drain region are formed in the semiconductor layer 30.

Next, S is deposited on the entire surface of the substrate by the CVD method.
The first interlayer insulating film 14 made of iO ₂ has a thickness of about 300 nm.
To 1000 nm and by wet etching or dry etching, the contact holes 7a, 7b
To provide. Then, by using a low resistance metal such as Al, C
The source bus line 2, the source electrode 9 and the drain electrode 10 having a thickness of about 600 nm are formed by VD. The source electrode 9 and the drain electrode 10 are formed so as to fill the contact holes 7a and 7b, respectively.

Further, the entire surface of the substrate is formed by the CVD method.
_Second layer of SiO ₂ or SiN _{x with} a thickness of about 600 nm
Then, the interlayer insulating film 17 is formed, and the contact hole 7c is formed by wet etching or dry etching.
Then, metal films 25 and 15 made of TiW, WSi, or the like.
Was deposited by sputtering to a thickness of about 120 to 150 nm, and then patterned by dry etching. As a result, the metal film filled in the contact hole
25 and the metal film 15 which covers the channel portion 12 of the semiconductor layer 30 and overlaps with the medium concentration impurity region by 1 μm in the width direction are formed at the same time. The metal films 25 and 15 are made of Al alloy, W, M
It may be made of o or Ti, or may be a silicide of Mo or Ti. Although the thickness of the metal film 15 varies depending on the material, it is set to a thickness that can prevent the transmission of light. In the case of TiW, a thickness of 150 nm can almost shield light. It is preferably 100 angstroms to several 1000 angstroms.

Next, a pixel electrode 4 of ITO having a thickness of 100 nm to 200 nm is formed by a sputtering method to form an active matrix substrate. When the metal film 25 is damaged during etching of ITO,
The ITO pattern may be formed on the metal film 25 so as to overlap it.

(Embodiment 2) FIG. 3 is a plan view showing an active matrix substrate which is another embodiment of the present invention.
FIG. 4 is a sectional view taken along the line AA ′ of FIG. In this active matrix substrate, a metal film 16 (hatched portion in the drawing) is formed instead of the metal films 25 and 15 of the first embodiment, and as shown in FIG. 3, the channel portion of the semiconductor layer 30 is formed.
12, the medium concentration impurity region 23 and the high concentration impurity region 24 are completely covered. As shown in FIG. 3, this metal film 16 is in contact with the edge portion of the pixel electrode 4. The manufacturing method can be performed in the same manner as in Example 1.

The results of a TFT characteristic test performed on the active matrix substrates of Example 1 and Example 2 thus produced are shown below. FIG. 7 is a diagram showing current-voltage characteristics of the active matrix substrates of Example 1 and Example 2. Here, the horizontal axis represents the gate voltage, the vertical axis represents the drain current, and the source-drain voltage was 10V. Table 1 shows the on-current I _on and off-current I _off of the TFT with respect to the voltage V _b applied to the metal film. Here, the off-current is a current value at a gate voltage of −10 V, and the on-current is a current value at a gate voltage of 15 V.
In addition, in Table 1, as a comparative example, a conventional active matrix substrate in which a metal film is not provided in the TFT portion as shown in FIG. 5 is also shown.

[0029]

[Table 1]

As can be seen from FIG. 7 and Table 1 above, in the active matrix substrates of Examples 1 and 2, it was possible to reduce the OFF current of the TFT during light irradiation. Furthermore, by applying a voltage to the metal film 15, the on-current of the TFT can be increased and the off-current can be decreased.

In the second embodiment, the metal film 16 is formed in contact with the edge portion of the picture element electrode 4 and has the same potential as the picture element electrode 4. Therefore, when it is used in a liquid crystal display device, it is possible to suppress the alignment disorder of the liquid crystal molecules at the edge.

[0032]

As described above, according to the present invention, the TFT
Since the channel part is sufficiently shielded from light, the characteristics of the channel part do not change and the off current is not increased when light is irradiated. Further, when used in a liquid crystal display device, it is not necessary to form another light-shielding film on the counter substrate of this substrate at the portion where the metal film is formed, so that the aperture ratio of the liquid crystal display device can be reduced. Can be large. Therefore,
A liquid crystal display device having excellent display characteristics can be obtained.
Further, by applying a voltage to the metal film, the on-current of the TFT can be increased and the off-current can be decreased.

[Brief description of drawings]

FIG. 1 is a plan view of an active matrix substrate according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along the line A-A ′ of FIG.

FIG. 3 is a plan view of an active matrix substrate of Example 2 of the present invention.

FIG. 4 is a cross-sectional view taken along the line A-A ′ of FIG.

FIG. 5 is a schematic view of a general active matrix substrate.

FIG. 6 is a cross-sectional view of a conventional active matrix substrate.

FIG. 7 is a diagram showing a result of a TFT characteristic test.

[Explanation of symbols]

 3 gate electrode 4 pixel electrode 6 additional capacitance electrode 7a, 7b, 7c contact hole 9 source electrode 10 drain electrode 12 channel portion 13 gate insulating film 14 first interlayer insulating film 15, 16, 25 metal film 17 second Interlayer insulating film 23 Medium concentration impurity region 24 High concentration impurity region 30 Semiconductor layer

Claims (3)

[Claims] 1. A pixel electrode is formed in a matrix on a substrate, a plurality of scanning wirings and a plurality of signal wirings are formed through a peripheral portion of the pixel electrode, and in the vicinity of a crossing position of both wirings. In an active matrix substrate on which a thin film transistor for driving a pixel electrode is formed, the thin film transistor has a semiconductor layer divided into five regions, and the outermost region of each of the five regions serves as a source region and a drain region. A structure in which a high-concentration impurity region is formed, an inside thereof is a medium-concentration impurity region, a central portion is a channel portion, and a gate electrode is provided between the semiconductor layer and a gate insulating film therebetween. And 1 on the thin film transistor in this state.
An active matrix substrate in which a metal film is formed so as to cover at least the channel portion and the medium-concentration impurity region via the insulating film. 2. The active matrix substrate according to claim 1, wherein the metal film is configured to be able to apply a voltage. 3. A picture element electrode is formed in a matrix on a substrate, a plurality of scanning wirings and a plurality of signal wirings are formed through the peripheral portion of the picture element electrode, and in the vicinity of the intersection of both wirings. A thin film transistor for driving the pixel electrode is formed,
A method for manufacturing an active matrix substrate, wherein the thin film transistor has a semiconductor layer having an LDD structure divided into five regions, and a gate electrode is provided between the semiconductor layer and a gate insulating film therebetween. A step of forming at least one insulating film on the thin film transistor, a step of forming a contact hole in the insulating film, filling the contact hole, and forming the channel part and the channel part on the thin film transistor. A method of manufacturing an active matrix substrate, comprising: a step of forming a metal film at least covering the medium-concentration impurity region; and a step of forming the pixel electrode by connecting at least a metal film portion filled in the contact hole.