JP3498912B2 - Active matrix substrate - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix substrate used for a liquid crystal display device or the like.

[0002]

2. Description of the Related Art Conventionally, as a liquid crystal display device, an active matrix display device has been used which has advantages such as high contrast and no restriction on the number of picture elements. In an active matrix substrate used in this active matrix type display device, pixel electrodes arranged in a matrix on an insulating substrate are thin film transistors (TF).
It is independently driven by using an active element such as T).

FIG. 5 shows an example of an active matrix substrate using a TFT as an active element. In this active matrix substrate, a plurality of gate bus lines 1 and a plurality of source bus lines 2 are provided on a substrate 11. Each gate bus line 1 and each source bus line 2
In the vicinity of the intersection with the TFT2 connected to both lines
6 is provided. A pixel electrode is connected to the TFT 26, and a liquid crystal is sealed between the pixel electrode and the counter electrode to form a pixel 57. The TFT 26 is controlled by a gate signal sent from the gate drive circuit 54 through the gate bus line 1. The video signal sent from the source drive circuit 52 through the source bus line 2 is written in the pixel 57 when the TFT 26 is in the on state. The written video signal is held in the picture element 57 while the TFT 26 is off. Furthermore, picture element 57
An additional capacitance 27 connected to the additional capacitance wiring 8 is formed in parallel with the above, and the retention of the video signal is improved.

Specifically, this active matrix substrate is, for example, as shown in FIG. In this active matrix substrate, the TFT 26 has a semiconductor layer 30 formed on the insulating substrate 11. The gate insulating film 13 is formed on the semiconductor layer 30, and the gate electrode 3 branched from the gate bus line is further formed on the gate insulating film 13. The first interlayer insulating film 14 is formed on almost the entire surface of the substrate in this state.

Contact holes 7a and 7b are opened through the first interlayer insulating film 14 and the gate insulating film 13. A source electrode 9 and a drain electrode 10 branched from a source bus line are formed on the first interlayer insulating film 14, and are connected to the semiconductor layer 30 through the contact holes 7a and 7b.

Further, a second interlayer insulating film 17 is formed on almost the entire surface of the substrate, and a contact hole 7c is opened in the second interlayer insulating film 17. A metal film 25 is formed so as to fill the contact hole 7c, and a pixel electrode 4 is formed on the second interlayer insulating film 17 so as to be connected to the metal film 25. By forming the metal film 25 (hatched portion in the drawing), ohmic contact can be achieved.

Further, an additional capacitance electrode 6 branched from an additional capacitance wiring 8 is provided in parallel with the gate bus line 1 on the gate insulating film 13 to form an additional capacitance.

In this active matrix substrate,
The TFT 26 is an LDD (Lightly Doped D).
lane) structure. In this structure, the semiconductor layer 30 made of polycrystalline silicon has five regions, and a high-concentration impurity region is formed between the channel portion 12 and the high-concentration impurity regions 24 to be the source region and the drain region. An intermediate concentration impurity region 23 having a lower impurity concentration than that of
Are formed with a width of 1.5 to 2 μm. In the medium-concentration impurity region 23, the resistance is higher than in the high-concentration impurity region 24, and the generation of the off current of the TFT can be reduced. Moreover, since the area of the TFT can be made smaller than that of the dual-gate structure TFT, the aperture ratio of the liquid crystal display device can be increased. Therefore, the liquid crystal display device can be downsized and have high definition.

[0009]

However, in the above active matrix substrate, when used in a liquid crystal display device, the channel portion 2 of the semiconductor layer 30 is irradiated by light.
The characteristics of No. 2 change, the off current of the TFT increases, and the display contrast of the liquid crystal display device may decrease. A light-shielding film may be formed on the counter substrate of this substrate in order to prevent light irradiation, but in that case, the aperture ratio of the liquid crystal display device may be low.

The present invention solves the above problems, and an object of the present invention is to provide an active matrix substrate which can prevent an increase in off current of a TFT and realize a liquid crystal display device having a large aperture ratio. is there.

[0011]

In the active matrix substrate of the present invention, picture element electrodes are formed in a matrix on the substrate, and a plurality of scanning wirings and a plurality of signal wirings are passed through the peripheral portion of the picture element electrodes. There are formed, in the vicinity of intersections of two lines, in the active matrix substrate thin film transistor for driving the pixel electrode is formed, the thin film transitional
A semiconductor layer, a gate insulating film on the semiconductor layer,
Gate formed on the semiconductor layer through the gate insulating film
An electrode and a first interlayer insulating film provided on the gate electrode
And provided on the first interlayer insulating film and the gate insulating film.
Connected to the semiconductor layer through the first contact hole
The source and drain electrodes are
Elementary electrodes are formed on the source electrode and the drain electrode
And the pixel electrode and the pixel electrode
In order to electrically connect to the drain electrode, the second interlayer
Inside the second contact hole provided in the insulating film and
A metal film is formed on the surface of the second interlayer insulating film,
The film is formed in contact with the edge portion of the pixel electrode.
It is characterized in that it has the same potential as that of the picture element electrode, whereby the above object is achieved.

The metal film may be formed to cover the thin film transistor. The metal film is made of an alloy of Al, W, Mo, or Ti, or a silicide of Mo or Ti.

The operation of the present invention will be described below.

In the present invention, since the metal film having the same potential as that of the picture element electrode is formed in the edge portion of the picture element electrode, the alignment disorder of the liquid crystal molecules at the picture element electrode edge can be suppressed. .

If a metal film is formed on the thin film transistor so as to cover at least the channel portion, the channel portion can be shielded without being irradiated with light. Therefore, it is possible to prevent the off current of the TFT from increasing during light irradiation. If this metal film is formed of the same material as the metal film that connects the drain region of the thin film transistor and the pixel electrode, both metal films can be formed simultaneously by the same process, or they are formed integrally. It is also possible easily. Further, when this substrate is used in a liquid crystal display device, it is not necessary to form a light shielding film on the counter substrate of this substrate in the portion where the metal film is formed, so that the aperture ratio of the liquid crystal display device is increased. be able to.

Further, the scanning wiring, the signal wiring, and the pixel electrode are
If the insulating layers are formed in different layers, the pixel electrodes can be formed so as to overlap the scanning lines and the signal lines without the risk of short-circuiting between the pixel electrodes and the scanning lines and the signal lines. Therefore, the aperture ratio of the liquid crystal display device can be further increased.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a plan view showing an active matrix substrate which is an embodiment of the present invention, and FIG. 2 is a sectional view taken along the line AA 'in FIG. This active matrix substrate is formed on the insulating substrate 11 by
A gate bus line 1 and a source bus line 2 are formed vertically and horizontally, and a pixel electrode 4 is formed in a region surrounded by both lines. Also, in order to drive this pixel electrode 4, TF
T is connected.

In this active matrix substrate,
Similar to FIG. 5, the TFT has an LDD structure and has a semiconductor layer 30 formed on the insulating substrate 11. A gate insulating film 13 is formed on almost the entire surface of the substrate so as to cover the semiconductor layer 30, and a gate electrode 3 branched from the gate bus line 1 is further formed on the gate insulating film 13. The first interlayer insulating film 14 is formed on almost the entire surface of the substrate in this state.

Contact holes 7a and 7b are opened through the first interlayer insulating film 14 and the gate insulating film 13. A source electrode 9 and a drain electrode 10 branched from the source bus line 2 are formed on the first interlayer insulating film 14, and the contact holes 7a and 7b are formed.
Is connected to the semiconductor layer 30 through.

A second interlayer insulating film 17 is further formed on the first interlayer insulating film 14, and a contact hole 7c is opened in the second interlayer insulating film 17. A metal film 25 (hatched portion in the figure) is formed so as to fill the contact hole 7c, and a metal film 15 (hatched portion in the figure) is also formed on the second interlayer insulating film 17. . Further, the pixel electrode 4 is formed so as to be connected to the metal film 25. As shown in FIG. 2, the metal film 15 covers the channel portion 12 and the medium-concentration impurity region of the semiconductor layer 30 so that an independent voltage can be applied.

On the gate insulating film 13, an additional capacitance electrode 6 branched from an additional capacitance wiring 8 is provided in parallel with the gate bus line 1 to form an additional capacitance.

This active matrix substrate is manufactured as follows.

First, a thickness of 40 to 8 is formed on the insulating substrate 11.
The semiconductor layer 30 made of a 0 nm polycrystalline silicon film is CV
It is formed by the D method. Next, an insulating film made of SiO ₂ or SiN _x and having a thickness of about 100 nm is stacked by the CVD method or sputtering, and this is patterned to form the gate insulating film 13. The gate insulating film 13 may be formed by thermally oxidizing the polycrystalline silicon film.

A layer made of polycrystalline silicon doped with phosphorus is deposited thereon by CVD or sputtering to a thickness of 450 nm and patterned to form the gate bus line 1, the gate electrode 3 and the additional capacitance wiring 6. To do. Next, a resist pattern is formed in a region other than the semiconductor layer 30 by photolithography, and phosphorus is injected into the semiconductor layer 30 under the conditions of 80 kev and 1 × 10 ¹³ cm ^{−2 using} the resist pattern and the gate electrode 3 as a mask. did. Further, in the semiconductor layer 30, a resist relief pattern was formed in a region away from the gate electrode 3 by 1.5 to 2 μm, and phosphorus was implanted under the conditions of 30 kev and 1 × 10 ¹⁵ cm ⁻² . As a result, the channel portion 12, the medium concentration impurity region 23 having a width of 1.5 to 2 μm, and the high concentration impurity region 24 to be the source region and the drain region are formed in the semiconductor layer 30.

Next, S is deposited on the entire surface of the substrate by the CVD method.
The first interlayer insulating film 14 made of iO ₂ has a thickness of about 300 n.
The contact holes 7a, 7 are formed by wet etching or dry etching.
b is provided. Then, using a low resistance metal such as Al,
Source bus line 2 with a thickness of about 600 nm by CVD,
The source electrode 9 and the drain electrode 10 are formed. The source electrode 9 and the drain electrode 10 are formed so as to fill the contact holes 7a and 7b, respectively.

Further, the entire surface of the substrate is formed by the CVD method.
_Second layer of SiO ₂ or SiN _{x with} a thickness of about 600 nm
And the contact hole 7c is provided by wet etching or dry etching. Then, the metal films 25 and 15 made of TiW, WSi, or the like are sputtered to about 120 to 150 nm.
To a thickness of 10 .mu.m and then patterned by dry etching. As a result, the metal film 25 filled in the contact hole and the metal film 15 which covers the channel portion 12 of the semiconductor layer 30 and overlaps with the medium concentration impurity region by 1 μm in the width direction are formed at the same time. Metal films 25 and 15
May be made of an alloy of Al, W, Mo or Ti, or may be a silicide of Mo or Ti. Metal film 1
Although the thickness of 5 varies depending on the material, it is set to a thickness that can prevent the transmission of light. In the case of TiW, a thickness of 150 nm can almost shield light. It is preferably 100 angstroms to several 1000 angstroms.

Next, a pixel electrode 4 made of ITO and having a thickness of 100 nm to 200 nm is formed by a sputtering method to form an active matrix substrate. If the metal film 25 is damaged during etching of ITO, the ITO pattern may be formed by overlapping the metal film 25.

(Embodiment 2) FIG. 3 is a plan view showing an active matrix substrate according to another embodiment (Embodiment 2) of the present invention, and FIG. 4 is a cross section taken along the line AA 'in FIG. It is a figure. In this active matrix substrate, a metal film 16 (hatched portion in the figure) is formed instead of the metal films 25 and 15 of the first embodiment, and as shown in FIG. The medium concentration impurity region 23 and the high concentration impurity region 24 are completely covered. As shown in FIG. 3, the metal film 16 is formed on the pixel electrode 4
Is in contact with the edge of. As a manufacturing method,
It can be performed in the same manner as in the first embodiment.

Thus, the first embodiment of the present invention described above
In addition, in the second embodiment, since the light-shielding film is formed of the metal that connects the pixel electrode and the drain region of the thin film transistor, it is possible to form the light-shielding film without adding a new step. There is.

The results of a TFT characteristic test performed on the active matrix substrates of Embodiments 1 and 2 thus manufactured are shown below. Figure 7
FIG. 6 is a diagram showing current-voltage characteristics of the active matrix substrates of Embodiments 1 and 2. Here, the horizontal axis represents the gate voltage, the vertical axis represents the drain current, and the source-drain voltage was 10V. Table 1 shows the ON current Ion and the OFF current I of the TFT with respect to the voltage Vb applied to the metal film.
indicates off. Here, the off-state current is the gate voltage = −10
The current value at V and the on-current are current values at a gate voltage = 15V. In addition, in Table 1, as a comparative example, a conventional active matrix substrate in which a metal film is not provided in the TFT portion as shown in FIG. 5 is also shown.

[0032]

[Table 1]

As can be understood from FIG. 7 and Table 1 above, in the active matrix substrates of Embodiments 1 and 2, it was possible to reduce the OFF current of the TFT during light irradiation. Furthermore, by applying a voltage to the metal film 15, the on-current of the TFT can be increased and the off-current can be decreased.

In the second embodiment, the picture element electrode 4
The metal film 16 is formed in contact with the portion that becomes the edge of, and has the same potential as the pixel electrode 4. Therefore, when it is used in a liquid crystal display device, it is possible to suppress the alignment disorder of the liquid crystal molecules at the edge.

[0035]

As described above, according to the present invention, since the metal film having the same potential as that of the pixel electrode is formed at the edge portion of the pixel electrode, liquid crystal molecules at the edge of the pixel electrode are formed. Can be suppressed.

Further, since the channel portion of the TFT is sufficiently shielded from light, the characteristic of the channel portion does not change when light is irradiated and the off current is not increased. Further, when used in a liquid crystal display device, it is not necessary to form another light-shielding film on the counter substrate of this substrate at the portion where the metal film is formed, so that the aperture ratio of the liquid crystal display device can be reduced. Can be large.

[Brief description of drawings]

FIG. 1 is a plan view of an active matrix substrate according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along the line A-A ′ of FIG.

FIG. 3 is a plan view of an active matrix substrate according to a second embodiment of the present invention.

FIG. 4 is a cross-sectional view taken along the line A-A ′ of FIG.

FIG. 5 is a schematic view of a general active matrix substrate.

FIG. 6 is a cross-sectional view of a conventional active matrix substrate.

FIG. 7 is a diagram showing a result of a TFT characteristic test.

[Explanation of symbols] 3 Gate electrode 4 pixel electrodes 6 Additional capacity electrode 7a Contact hole 7b Contact hole 7c contact hole 9 Source electrode 10 drain electrode 12 channel section 13 Gate insulating film 14 First interlayer insulating film 15 Metal film 16 Metal film 17 Second interlayer insulating film 23 Medium concentration impurity region 24 High concentration impurity region 25 metal film 30 semiconductor layer

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI H01L 29/78 619B (56) Reference JP-A-3-198030 (JP, A) JP-A-5-34679 (JP, A) JP 64-28622 (JP, A) International publication 93/011455 (WO, A1) (58) Fields investigated (Int. Cl. ⁷ , DB name) G09F 9/30 G02F 1/1335 G02F 1/1368

Claims (3)

(57) [Claims] 1. A pixel electrode is formed in a matrix on a substrate, a plurality of scanning wirings and a plurality of signal wirings are formed through a peripheral portion of the pixel electrode, and in the vicinity of a crossing position of both wirings. In an active matrix substrate on which a thin film transistor for driving a pixel electrode is formed, the thin film transistor includes a semiconductor layer, a gate insulating film on the semiconductor layer, and a gate electrode formed on the semiconductor layer via the gate insulating film. A first interlayer insulating film provided on the gate electrode, a source electrode connected to the semiconductor layer through a first contact hole provided in the first interlayer insulating film and the gate insulating film, and A drain electrode, the pixel electrode is provided on a second interlayer insulating film formed on the source electrode and the drain electrode, and the pixel electrode and the drain electrode are connected to each other. A metal film is formed inside the second contact hole provided in the second interlayer insulating film for electrical connection and on the surface of the second interlayer insulating film, and the metal film is an edge of the pixel electrode. An active matrix substrate, which is formed in contact with a portion to be formed so as to have the same potential as the pixel electrode. 2. The active matrix substrate according to claim 1, wherein the metal film is formed so as to cover the thin film transistor. 3. The metal film is an alloy of Al, W, Mo,
The active matrix substrate according to claim 1 or 2, wherein the active matrix substrate is made of any one of Ti and a silicide of any one of Mo and Ti.