JP3287806B2 - Active matrix substrate - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an active matrix substrate used for a liquid crystal display device and the like and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, as a liquid crystal display device, an active matrix type display device having advantages such as high contrast and unlimited number of picture elements has been used. In an active matrix substrate used in this active matrix display device, pixel electrodes arranged in a matrix on an insulating substrate are formed of thin film transistors (TFs).
Independently driven using an active element such as T).

FIG. 5 shows an example of an active matrix substrate using a TFT as an active element. In this active matrix substrate, a plurality of gate bus lines 1 and a plurality of source bus lines 2 are provided on a substrate 11. Each gate bus line 1 and each source bus line 2
In the vicinity of the intersection with
6 are provided. A picture element electrode is connected to the TFT 26, and a liquid crystal is sealed between the picture element electrode and the counter electrode to form a picture element 57. The TFT 26 is controlled by a gate signal sent from the gate drive circuit 54 through the gate bus line 1. Then, the video signal sent from the source drive circuit 52 through the source bus line 2 is written to the picture element 57 when the TFT 26 is on. The written video signal is held in the picture element 57 while the TFT 26 is off. Furthermore, picture element 57
The additional capacitance 27 connected to the additional capacitance wiring 8 is formed in parallel with the above, and the retention of the video signal is improved.

The active matrix substrate is specifically, for example, as shown in FIG. In this active matrix substrate, the TFT 26 has a semiconductor layer 30 formed on the insulating substrate 11. A gate insulating film 13 is formed on the semiconductor layer 30, and a gate electrode 3 branched from a gate bus line is formed on the gate insulating film 13. A first interlayer insulating film 14 is formed on almost the entire surface of the substrate in that state.

[0005] Contact holes 7 a and 7 b are opened through the first interlayer insulating film 14 and the gate insulating film 13. A source electrode 9 and a drain electrode 10 branched from a source bus line are formed on the first interlayer insulating film 14, and are connected to the semiconductor layer 30 through contact holes 7a and 7b.

Further, a second interlayer insulating film 17 is formed on substantially the entire surface of the substrate, and a contact hole 7c is opened in the second interlayer insulating film 17. A metal film 25 is formed to fill contact hole 7c, and a pixel electrode 4 is formed on second interlayer insulating film 17 so as to be connected to metal film 25. The formation of the metal film 25 (the hatched portion in the figure) allows an ohmic contact to be made.

On the gate insulating film 13, an additional capacitance electrode 6 branched from the additional capacitance wiring 8 is provided in parallel with the gate bus line 1 to form an additional capacitance.

In this active matrix substrate,
The TFT 26 is an LDD (Lightly Doped D).
(rain) structure. In this structure, the semiconductor layer 30 made of polycrystalline silicon has five regions, and is provided between the channel portion 12 and the high-concentration impurity region 24 serving as a source region and a drain region. Medium-concentration impurity region 23 having a lower impurity concentration
Are formed with a width of 1.5 to 2 μm. The resistance of the medium-concentration impurity region 23 is higher than that of the high-concentration impurity region 24, and the generation of off-current of the TFT can be reduced. Further, since the area of the TFT can be reduced as compared with the TFT having the dual gate structure, the aperture ratio of the liquid crystal display device can be increased. Therefore, the size and definition of the liquid crystal display device can be reduced.

[0009]

However, in the above-described active matrix substrate, when used in a liquid crystal display device, the channel portion 2 of the semiconductor layer 30 is irradiated by light.
2, the off-state current of the TFT may increase, and the display contrast of the liquid crystal display device may decrease. In order to prevent light irradiation, a light-shielding film may be formed on the opposite substrate of this substrate, but in this case, the aperture ratio of the liquid crystal display device may be reduced.

An object of the present invention is to solve the above problems, and an object of the present invention is to provide an active matrix substrate which can prevent an increase in the off-state current of a TFT and can realize a liquid crystal display device having a large aperture ratio. is there.

[0011]

In the active matrix substrate of the present invention, picture element electrodes are formed in a matrix on the substrate, and a plurality of scanning wirings and a plurality of signal wirings pass through the periphery of the picture element electrodes. And an active matrix substrate in which a thin film transistor for driving a pixel electrode is formed in the vicinity of the intersection of the two wirings, wherein the thin film transistor has a channel portion, a medium-concentration impurity region, and a high-concentration impurity region.
At least the channel portion on an insulating layer covering the thin film transistor, comprising a semiconductor layer having a region,
A first metal film is formed at a position corresponding to the medium-concentration impurity region and the high-concentration impurity region, and the first metal film is formed on the first metal film.
Is provided with a voltage applying means, and a second metal film connecting between the picture element electrode and a drain region of the thin film transistor is provided.
The second metal film is formed so as to penetrate through the insulating film with the same material as the first metal film, and the second metal film is formed on the second metal film.
It is characterized in that a picture element electrode connected to the film is formed , thereby achieving the above object.

In addition, the first metal film and the second metal film are integrally formed, and also serve as a light-shielding film which is separated for each of the pixel electrodes and covers a peripheral portion of each of the pixel electrodes. May be.

Further, the first metal film and the second metal film may be formed separately.

The operation of the present invention will be described below.

According to the present invention, at least a channel portion , a medium concentration impurity region, a high concentration impurity
Since the metal film is formed so as to cover the region , light can be blocked without irradiating the channel portion with light. Therefore, it is possible to prevent an increase in the off-state current of the TFT at the time of light irradiation, and it is possible to prevent the thin film transistor which is easily deteriorated by light.
The characteristic deterioration of the transistor can be prevented. Also the first
By applying a voltage to the metal film of the
Characteristics of the active matrix substrate
To prevent degradation of display quality when used in crystal display devices.
Can be. Furthermore, since this metal film is formed of the same material as the metal film that connects between the drain region of the thin film transistor and the pixel electrode, both metal films can be formed simultaneously by the same process and can be integrally formed. It can be easily formed. Further, when this substrate is used in a liquid crystal display device, it is not necessary to form a light-shielding film on a portion where the metal film is formed on the opposite substrate of the substrate, so that the aperture ratio of the liquid crystal display device is increased. be able to.

Further, in the present invention, since the scanning wiring, the signal wiring, and the picture element electrode are formed in separate layers by the insulating layer, the picture element electrode, the scanning wiring, and the signal wiring may be short-circuited. Since the pixel electrodes can be formed so as to overlap with the scanning wirings and the signal wirings, the aperture ratio of the liquid crystal display device can be further increased.

Further, in the present invention, the first metal film and the second
Both the metal film and the pixel electrode have the same potential as the pixel electrode, and the light-shielding film around the pixel electrode has the same potential as the pixel electrode, so that unnecessary voltage is not applied to the liquid crystal material by the light-shielding film. Therefore, a liquid crystal display device with high display quality can be realized.

[0018]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a plan view showing an active matrix substrate according to an embodiment of the present invention, and FIG. 2 is a sectional view taken along line AA 'of FIG. This active matrix substrate is provided on an insulating substrate 11,
A gate bus line 1 and a source bus line 2 are formed vertically and horizontally, and a pixel electrode 4 is formed in a region surrounded by both lines. Further, TF is used to drive the picture element electrode 4.
T is connected.

In this active matrix substrate,
The TFT has an LDD structure similarly to FIG. 5, and has a semiconductor layer 30 formed on the insulating substrate 11. A gate insulating film 13 is formed on almost the entire surface of the substrate so as to cover the semiconductor layer 30, and a gate electrode 3 branched from the gate bus line 1 is formed on the gate insulating film 13. A first interlayer insulating film 14 is formed on substantially the entire surface of the substrate in that state.

Contact holes 7a and 7b are opened through the first interlayer insulating film 14 and the gate insulating film 13. A source electrode 9 and a drain electrode 10 branched from the source bus line 2 are formed on the first layer tube insulating film 14, and the contact holes 7a, 7b
Through the semiconductor layer 30.

On the first interlayer insulating film 14, a second interlayer insulating film 17 is further formed, and a contact hole 7c is opened in the second interlayer insulating film 17. A metal film 25 (shaded portion in the figure) is formed so as to fill contact hole 7c, and a metal film 15 (shaded portion in the diagram) is also formed on second interlayer insulating film 17. . Further, the pixel electrode 4 is formed so as to be connected to the metal film 25. As shown in FIG. 2, the metal film 15 covers the channel portion 12 and the medium-concentration impurity region of the semiconductor layer 30 so that an independent voltage can be applied.

On the gate insulating film 13, an additional capacitance electrode 6 branched from the additional capacitance wiring 8 is provided in parallel with the gate bus line 1, and an additional capacitance is formed.

This active matrix substrate is manufactured as follows.

First, on the insulating substrate 11, a thickness of 40 to 8
The semiconductor layer 30 made of a 0 nm polycrystalline silicon film is
Formed by Method D. Next, an insulating film made of SiO ₂ or SiN _X and having a thickness of about 100 nm is laminated by a CVD method or sputtering, and is patterned to form a gate insulating film 13. The gate insulating film 13 may be formed by oxidizing the polycrystalline silicon film by heat.

On top of this, a layer made of polycrystalline silicon doped with phosphorus is deposited to a thickness of 450 nm by CVD or sputtering, and is patterned to form a gate bus line 1, a gate electrode 3, and a wiring 6 for additional capacitance. I do. Next, a resist pattern is formed in a region other than the semiconductor layer 30 by photolithography, and phosphorus is implanted into the semiconductor layer 30 under the conditions of 80 keV and 1 × 10 ¹³ cm ^{−2 using} the resist pattern and the gate electrode 3 as a mask. did. Further, in the semiconductor layer 30, a resist removal pattern was formed in a region 1.5 to 2 μm away from the gate electrode 3, and phosphorus was implanted under the conditions of 30 keV and 1 × 10 ¹⁵ cm ⁻² . As a result, a channel portion 12, a medium-concentration impurity region 23 having a width of 1.5 to 2 μm, and a high-concentration impurity region 24 serving as source and drain regions are formed in the semiconductor layer 30.

Next, S is deposited on the entire surface of the substrate by CVD.
The first interlayer insulating film 14 made of iO _{2 is} formed to a thickness of about 300 n.
m to 1000 nm, and the contact holes 7a and 7 are formed by wet etching or dry etching.
b is provided. And, using a low resistance metal such as Al,
A source bus line 2 having a thickness of about 600 nm by CVD,
A source electrode 9 and a drain electrode 10 are formed. Source electrode 9 and drain electrode 10 are formed to fill contact holes 7a and 7b, respectively.

Further, the entire surface of the substrate is formed by CVD.
A _second layer made of SiO ₂ or SiN _X and having a thickness of about 600 nm;
Is formed, and a contact hole 7c is provided by wet etching or dry etching. Then, the metal films 25 and 15 made of TiW, WSi or the like are sputtered to a thickness of about 120 to 150 nm.
Then, a pattern was formed by dry etching. As a result, the metal film 25 filled in the contact hole and the metal film 15 covering the channel portion 12 of the semiconductor layer 30 and overlapping the medium-concentration impurity region by 1 μm in the width direction are simultaneously formed. Metal films 25 and 15
May be made of an alloy of Al, W, Mo, or Ti, or may be a silicide of Mo or Ti. Metal film 1
Although the thickness of 5 varies depending on the material, it is a thickness that can prevent light transmission. In the case of TiW, if the thickness is 150 nm, almost light can be blocked. Preferably, the thickness is from 100 angstroms to several thousand angstroms.

Next, a picture element electrode 4 made of ITO and having a thickness of 100 nm to 200 nm is formed by sputtering to form an active matrix substrate. If the metal film 25 is damaged during the etching of the ITO, an ITO pattern may be formed so as to overlap the metal film 25.

(Embodiment 2) FIG. 3 is a plan view showing an active matrix substrate according to another embodiment (Embodiment 2) of the present invention, and FIG. 4 is a cross section taken along line AA 'of FIG. FIG. In this active matrix substrate, a metal film 16 (hatched portion in the figure) is formed instead of the metal films 25 and 15 of the first embodiment, and as shown in FIG. The medium concentration impurity region 23 and the high concentration impurity region 24 are completely covered. As shown in FIG. 3, the metal film 16
Is in contact with the edge portion. As a production method,
This can be performed in the same manner as in the first embodiment.

As described above, the first embodiment of the present invention described above
In the second embodiment, since the light-shielding film is formed by the metal connecting the picture element electrode and the drain region of the thin film transistor, the light-shielding film can be formed without adding a new process. I have.

The results of conducting a TFT characteristic test on the active matrix substrates of Embodiments 1 and 2 manufactured as described above are shown below. FIG.
FIG. 4 is a diagram illustrating current-voltage characteristics of the active matrix substrates according to the first and second embodiments. Here, the horizontal axis is the gate voltage, the vertical axis is the drain current, and the voltage between the source and the drain is 10V. Table 1 shows the ON current Ion and the OFF current I of the TFT with respect to the voltage Vb applied to the metal film.
off. Here, the off-state current is a gate voltage = −10.
The current value at V and the ON current are current values at a gate voltage of 15V. Table 1 also shows, as a comparative example, a conventional active matrix substrate in which a metal film is not provided in a TFT portion as shown in FIG.

[0033]

[Table 1]

As can be understood from FIG. 7 and Table 1, in the active matrix substrates of the first and second embodiments, the off-state current of the TFT at the time of light irradiation could be reduced. Further, by applying a voltage to the metal film 15, the on-state current of the TFT can be increased and the off-state current can be reduced.

In the second embodiment, the picture element electrode 4
The metal film 16 is formed in contact with a portion to be an edge of the pixel electrode 4 and has the same potential as the pixel electrode 4. Therefore, when used in a liquid crystal display device, it is also possible to suppress the alignment disorder of the liquid crystal molecules at the edge.

[0036]

As described above, according to the present invention, the TFT
Since the channel portion is sufficiently shielded from light, the characteristics of the channel portion do not change when light is irradiated, and the off current does not increase. Also, when used in a liquid crystal display device, it is not necessary to form another light-shielding film on the counter substrate of this substrate in the portion where the metal film is formed, so that the aperture ratio of the liquid crystal display device is reduced. Can be bigger.

[Brief description of the drawings]

FIG. 1 is a plan view of an active matrix substrate according to a first embodiment of the present invention.

FIG. 2 is a sectional view taken along line A-A 'of FIG.

FIG. 3 is a plan view of an active matrix substrate according to a second embodiment of the present invention.

FIG. 4 is a sectional view taken along line A-A 'of FIG.

FIG. 5 is a schematic view of a general active matrix substrate.

FIG. 6 is a cross-sectional view of a conventional active matrix substrate.

FIG. 7 is a diagram showing the result of conducting a characteristic test of a TFT.

[Explanation of symbols]

 Reference Signs List 3 gate electrode 4 picture element electrode 6 electrode for additional capacitance 7a contact hole 7b contact hole 7c contact hole 9 source electrode 10 drain electrode 12 channel portion 13 gate insulating film 14 first interlayer insulating film 15 metal film 16 metal film 17 second Interlayer insulating film 23 Medium concentration impurity region 24 High concentration impurity region 25 Metal film 30 Semiconductor layer

 ──────────────────────────────────────────────────続 き Continuation of front page (72) Inventor Naoyuki Shimada 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation (56) References JP-A-63-292115 (JP, A) JP-A-2-2 247619 (JP, A) JP-A-3-142418 (JP, A) JP-A-2-242226 (JP, A) JP-A-63-208896 (JP, A) JP-A-4-237027 (JP, A) JP-A-64-28622 (JP, A)

Claims (1)

(57) [Claims] 1. A pixel electrode is formed in a matrix on a substrate, and a plurality of scanning lines and a plurality of signal lines are formed through a peripheral portion of the pixel electrode. In an active matrix substrate on which a thin film transistor for driving a pixel electrode is formed, the thin film transistor includes a semiconductor layer having a channel portion, a medium-concentration impurity region, and a high-concentration impurity region, and is provided on an insulating layer covering the thin film transistor. A first metal film is formed at least at a position corresponding to the channel portion, the medium concentration impurity region, and the high concentration impurity region;
A voltage applying means is provided on the first metal film, and a second metal film connecting between the picture element electrode and a drain region of the thin film transistor is formed on the insulating film by the same material as the first metal film. And a picture element electrode connected to the second metal film is formed on the second metal film.
And the first metal film and the second metal film are separated from each other.
An active matrix substrate characterized by being formed by: