JPH0664622B2 - Micro computer - Google Patents

Description

The present invention relates to a microcomputer, and more particularly to a microcomputer having an input / output terminal and switching between an input terminal and an output terminal.

[Conventional technology]

Conventionally, microcomputers are integrated circuits,
Whether the input / output terminal after reset operates as an input terminal or an output terminal is determined by the circuit configuration created by the manufacturer. In order to change the specifications and change the state of the terminals after reset, it is necessary to change the circuit configuration and use a different type.

[Problems to be solved by the invention]

As a general-purpose integrated circuit microcomputer is used in different application circuits by many users, the requirement for the input / output direction after reset differs for each pin, as described above. The state of the input / output terminals after reset does not necessarily satisfy all users.

There is also a problem that it is difficult for manufacturers to satisfy the requirements of individual users.

[Means for solving problems]

The microcomputer of the present invention has a reset means for generating a reset signal for initializing a circuit, an external terminal, and an internal bus. In the microcomputer, an input buffer and an output buffer are commonly connected to the external terminal. The input buffer and the output buffer are coupled to the internal path, and a circuit for holding different information depending on the set input or the reset input by the reset means is provided, and the input buffer is based on the information from this circuit. And the output buffer are supplementarily selected, and whether the external terminal is for input or for output is defined by the reset means.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a circuit block diagram showing an embodiment of the present invention. The data latch 1 is a latch with set / reset, the data latch 2 is a latch for holding output data, the output buffer 3
Are tri-state output buffers 4 and 6 are tri-state buffers, write gates 7 and 8 are turned on when writing data to the data latches 1 and 2, respectively, and a read gate 9 inputs an input signal to an internal bus. Sometimes it conducts. The wiring switching unit 10 is connected to the set input or the reset input of the data latch 1 by the wiring to which the reset signal is input. The output of the data latch 1 becomes the gate signals of the output buffers 3 and 4, and is inverted by the inverter 5 to be output to the buffer 6
It becomes the gate signal of. The output of the data latch 2 is connected to the input / output terminal 11 through the output buffer 3 and at the same time becomes the input of the buffer 4. The input signal is input from the input / output signal 11 to the buffer 6. The output of the buffer 6 is connected and input to the read gate 9.

Here, when the reset signal is connected to the reset of the data latch 1 by the wiring switching unit 10, the data latch 1 is reset by the reset signal, the output buffers 3 and 4 are turned off, and the buffer 6 is turned on. . Therefore, the input / output terminal 11 can be used as an input terminal to take in a signal from the terminal to the inside through the buffer 6.

When the reset signal is connected to the set of the data latch 1 by the wiring switching unit 10, the data latch 1 is set by the reset signal, the output buffer 3 becomes conductive, and the content of the data latch 2 is input to the input / output terminal 11. Is output. At the same time, the buffer 4 becomes conductive, and when reading is performed, the contents of the data latch 2 are read through the read gate 9. The buffer 6 is in the off state, and the input / output terminal 11 serves as an output terminal.

As described above, according to the present embodiment, by changing the connection of the wiring switching unit 10, it is possible to select whether the input / output terminal 11 is the input terminal or the output terminal when the reset signal is input.

〔The invention's effect〕

As described above, according to the present invention, it is possible to change the mask in the wiring process by incorporating a means for setting the reset state of the internal storage circuit that determines the state of the input / output terminal in two ways and switching the means by wiring. There is an effect that it is possible to supply a microcomputer capable of responding to different demands of many users regarding the state of each input / output terminal at reset.

[Brief description of drawings]

FIG. 1 is a circuit block diagram of an embodiment of the present invention. 1 ... data latch, 2 ... data latch, 3 ... output buffer 4 ... buffer, 5 ... inverter, 6 ... buffer, 7 ... write gate, 8 ... write gate, 9 ...
Read-out gate, 10 ... Wiring switching section, 11 ... Input / output terminal.

Claims (1)

[Claims] 1. A microcomputer having a reset means for generating a reset signal for initializing a circuit and an input / output terminal, controlling whether the input / output terminal is used as an input terminal or an output terminal. A storage circuit with a set input and a reset input, means for selectively applying the reset signal to either the set input or the reset input of the storage control circuit by wiring, and a buffer circuit controlled by the signal of the storage circuit And the output of the buffer is connected to the input / output terminal.