JPH11120024A - Chip for software development - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a bug by providing a function selecting circuit for selecting a function circuit of the chip for software development corresponding to the function circuit that a microcomputer as an object of development has. SOLUTION: A function control circuit 10 consists of a function control register 100, a 3-input NAND gate 110, a 3-input AND gate 120, and a tri-state inverter 130 and supplies a function control signal S11 mainly for controlling an A/D converting circuit 20 as a function circuit. The function selecting circuit 30 consists of a function selection register 300, a 2-input NAND gate 310, a 2-input AND gate 320, and a tri-state inverter 330 and supplies a function select signal S31 mainly for selecting the function control circuit 10. With this constitution, software can be developed by selecting the function circuit that the chip for software development has according to the function circuit that the microcomputer to be developed has.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer having a functional circuit for realizing a specific function, and to a software development chip for developing software used for the microcomputer. .

[0002]

2. Description of the Related Art In recent years, microcomputers comprising a CPU, a ROM, and a plurality of functional circuits have been used. In such microcomputers, there are a plurality of models depending on combinations of functional circuits. Software for the plurality of models is developed using one type of software development chip, and is stored in a ROM built in the microcomputer. A conventional software development chip will be described with reference to FIG. FIG.
FIG. 2 is a block diagram showing a part of a configuration of a conventional software development chip. The software development chip shown in FIG. 3 has the same CPU (not shown) as that of the microcomputer for which software is to be developed, and the respective functional circuits, for example, the A / D conversion circuit 20 and D
/ A conversion circuit 50 and a display circuit 80. Further, the software development chip includes function control signals S11, S4 for controlling these functional circuits, respectively.
1 and a function control circuit 1 for supplying S71, respectively.
0, 40, 70. The CPU selects a function control circuit corresponding to the function circuit to be controlled from among the function control circuits 10, 40 and 70 according to the given software. The selected function control circuit becomes accessible from the CPU. For example, when the CPU selects the function control circuit 10, the function control circuit 10 is accessed from the CPU, and the function control signal S11 is supplied to the A / D conversion circuit 20, which is a function circuit. Therefore, the A / D conversion circuit 20 is enabled and operates according to the supplied function control signal S11. Similarly, the CPU selects and accesses the other function control circuits 40 and 70, respectively. As a result, the function control signals S41 and S71 are supplied to the D / A conversion circuit 50 and the display circuit 80, which are function circuits. Therefore, the D / A conversion circuit 50,
The display circuit 80 is enabled, and operates according to the supplied function control signals S41 and S71. By the operation based on the supplied function control signals, the software provided to the CPU can be verified.

[0003]

However, when the above-described conventional software development chip is used, there is a software defect (bug) that a predetermined operation is not performed depending on the configuration of a microcomputer for which software is to be developed. May occur. A problem occurring when software for the microcomputer of FIG. 4 is developed using the software development chip of FIG. 3 will be described. FIG. 4 is a block diagram showing a part of a configuration of a microcomputer for which software is to be developed. The microcomputer has a CPU 1
And a function control circuit 4 for controlling the D / A conversion circuit 5 and a function for controlling the display circuit 8, respectively. And a control circuit 7. CPU 1 has an address bus A
B, data bus DB and control bus CB,
A predetermined address signal, data signal and control signal are supplied to the function control circuits 4 and 7, respectively. Based on the signals received from the CPU 1, the function control circuit 4 outputs a function control signal S4 for controlling the D / A conversion circuit 5, and the function control circuit 7 outputs a function control signal S7 for controlling the display circuit 8.
Are supplied respectively.

When the software development chip shown in FIG. 3 is used, software for accessing the A / D conversion circuit 20 also operates normally. On the other hand, the microcomputer of FIG. 4 has no A / D conversion circuit. Therefore, in the microcomputer, software including access to the A / D conversion circuit developed using the software development chip of FIG. 3 does not operate normally, and a bug occurs. In order to prevent bugs, it is necessary to prepare a software development chip according to a combination of functional circuits of a microcomputer to be developed. This hinders improvement in development efficiency.

The present invention has been made in view of the above-mentioned conventional problems, and provides a software development chip that can develop software without causing a bug for a plurality of types of microcomputers to be developed and having different combinations of functional circuits. The purpose is to do.

[0006]

In order to achieve the above object, the present invention provides a software development chip for developing software used in a microcomputer having a circuit for realizing each unique function. A CPU for supplying a data signal, an address signal, and a write enable signal; a functional circuit for implementing each unique function including a circuit for implementing a unique function of the microcomputer; A function control circuit for controlling the operation of the function circuit based on the signal, the first address signal, and the write enable signal; and a function control circuit based on the data signal, the second address signal, and the write enable signal. And a function selection circuit for selecting a function control circuit.

According to this configuration, software can be developed by selecting a functional circuit of a software development chip according to a functional circuit of a microcomputer to be developed.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A software development chip according to the present invention will be described with reference to FIGS. FIG. 1 is a circuit diagram showing a part of a software development chip according to the present invention. The CPU 1 performs the first operation via the address bus AB.
, An address signal AD1 and a second address signal AD2, a data signal DA via a data bus DB, and a write enable signal W which is a control signal via a control bus CB.
A central processing unit for supplying E and the read permission signal RE, respectively.

The function control circuit 10 includes a function control register 1
00, a three-input NAND gate 110, a three-input AND gate 120, and a tri-state inverter 130 to supply a function control signal S11 for controlling the A / D conversion circuit 20 which is a function circuit. Function control means. In the function control register 100 composed of a D flip-flop, the data signal DA and the output of the tri-state inverter
The outputs of the input NAND gates 110 are each connected to the CLK input. The function control signal S11 composed of the Q output of the function control register 100 is supplied to the A / D conversion circuit 20, and the NQ output is connected to the input of the tri-state inverter 130. In the three-input NAND gate 110, a first address signal AD1, a write enable signal WE, and a function selection signal S31 are connected to respective inputs. 3
In the input AND gate 120, the first address signal AD1, the read permission signal RE, and the function selection signal S31 are connected to the respective inputs, and the output is connected to the enable signal of the tri-state inverter 130.

The function selection circuit 30 includes a function selection register 3
This is a function selecting means for supplying a function selection signal S31 for selecting the function control circuit 10, which is composed of a 00-input 2-input NAND gate 310, a 2-input AND gate 320, and a tri-state inverter 330. . Function selection register 3 consisting of D flip-flops
At 00, the data signal DA and the output of the tri-state inverter 330 are connected to the D input, and the output of the two-input NAND gate 310 is connected to the CLK input. The Q output of the function selection register 300 is a function selection signal S31, and the NQ output is connected to the input of the tri-state inverter 330. In the two-input NAND gate 310, the second address signal AD2 and the write enable signal WE are connected to inputs. Two-input AND gate 320
, The second address signal AD2 and the read enable signal RE are respectively connected to the inputs, and the output is connected to the enable signal of the tri-state inverter 330.

The operation of the function control circuit 10 and the function selection circuit 30 in FIG. 1 will be described. First, a case where the A / D conversion circuit 20 is enabled will be described. In this case, the CPU 1 supplies "H" as the data signal DA. Further, the CPU 1 has a two-input NAND gate 3
The second address signal AD2 and the write enable signal WE, which are the inputs of the second and third inputs, are set to "H" and the two-input AND gate 3
The read permission signal RE, which is one of the 20 inputs, is set to "L". As a result, the output of the two-input NAND gate 310, that is, the CLK input of the function selection register 300 changes from "H" to "L", and the output of the two-input AND gate 320 is "L". 330 enters a high impedance state. The function selection register 300 determines whether the CPU 1
The D input consisting of the data signal DA received from the controller, that is, "H" is supplied as the Q output. Therefore, the function selection signal S31 becomes "H". 3-input NAND gate 1
Since the function selection signal S31, which is one of the respective inputs, becomes "H", the 10- and 3-input AND gates 120 are both NAND and AND having the other two inputs.
Act as a gate. Function control register 1 in this state
At 00, the data signal DA written by the CPU 1 is supplied to the Q output in response to the fall of the CLK input received from the three-input NAND gate 110. Therefore, the function control signal S11 including the data signal DA is supplied to the A / D conversion circuit 20. With the above operation, the A / D conversion circuit 20 is enabled and the CPU
1 is controlled by a function control signal S11 composed of a data signal DA supplied from the control signal S1. The CPU 1 sequentially writes the data signal DA into the function control register 100, and
A 3-input NAND gate 110 is used to control the CLK input of function control register 100. As a result, the function control circuit 10 supplies the data signal DA at the time of falling of the CLK input to the A / D conversion circuit 20 as the function control signal S11.

An operation in which the CPU 1 reads data written in the function control register 100 when the A / D conversion circuit 20 is enabled will be described.
The function selection signal S31 continues to be "H", the data written to the function control register 100, that is, the Q output is "H", and the tri-state inverter 13
0 is a high impedance state. CPU1 is the first
, The write enable signal WE is changed from "H" to "L", and the read enable signal RE is changed from "L" to "H". In this case, the CLK input of the function control register 100 changes from “L” to “H”, but the Q output does not change. On the other hand, a 3-input AND gate 1
20, the output of the tri-state inverter 130
Becomes "H". Therefore, the tri-state inverter 130 has the function control register 10
A signal obtained by inverting the NQ output of 0, that is, the same written data “H” as the Q output is supplied as the data signal DA. Thus, the CPU 1 reads out the data held by the function control register 100 as the data signal DA.

Next, a case where the A / D conversion circuit 20 is disabled will be described. In this case, the CPU 1 supplies "L" as the data signal DA. Further, the CPU 1
As in the case where the A / D conversion circuit 20 is enabled,
The CLK input of the function selection register 300 composed of a D flip-flop is changed from “H” to “L”. The function selection register 300 responds to the falling edge of the CLK input.
Since the D input consisting of the data signal DA received from the CPU 1, that is, “L” is supplied as the Q output,
The function selection signal S31 composed of an output becomes “L”. Since the function selection signal S31, which is one of the inputs, becomes "L", the output of the three-input NAND gate 110 is fixed at "H" and the output of the three-input AND gate 120 is fixed at "L". . Therefore, the output of 3-input NAND gate 110, that is, C
Since the LK input does not fall, the data signal DA
Is not supplied to the A / D conversion circuit 20 as the function control signal S11. As a result, the A / D conversion circuit 20 is disabled and is not controlled by the CPU 1. Further, since the output of the three-input AND gate 120, that is, the enable input of the tri-state inverter 130 is fixed to "L", the NQ output of the function control register 100 is not inverted and supplied as the data signal DA. By the above two operations, the CPU 1
The A / D conversion circuit 20 cannot be controlled, and a function control signal for controlling the A / D conversion circuit 20 cannot be read as the data signal DA. From this, for CPU 1, A
Since the state where the / D conversion circuit 20 does not exist is equal to that of the A / D conversion circuit 20, software for accessing the A / D conversion circuit 20 is not developed in software development.

The operation of the software development chip according to the present invention according to the microcomputer for which software is to be developed will be described. FIG. 2 is a block diagram showing a part of the configuration of the software development chip according to the present invention. 2, the same components as those of the conventional software development chip are denoted by the same reference numerals as in FIG. 3, and the description thereof will be omitted. Function selection circuits 30, 60, 90
Are function selection signals S31, S61, S91 for selecting the function control circuits 10, 40, 70, respectively.
Is a function selecting means for supplying the respective functions.

The case of developing software for the microcomputer of FIG. 4 to be developed, that is, a microcomputer having no A / D conversion circuit, will be described. In FIG. 2, the function selection circuit 30 outputs “L” as a function selection signal S31. This allows
The function control circuit 10 becomes inaccessible from the CPU,
The / D conversion circuit 20 is disabled. Therefore,
In developing software for operating the microcomputer of FIG. 4, software for accessing the A / D conversion circuit 20 is not developed. On the other hand, since the microcomputer to be developed has a D / A conversion circuit and a display circuit, the function selection circuits 60 and 90 output "H" as the function selection signals S61 and S91, respectively.
As a result, both the function control circuits 40 and 70 can be accessed from the CPU, and both the D / A conversion circuit 50 and the display circuit 80 are enabled. Therefore, software for accessing the D / A conversion circuit 5 and the display circuit 8 can be developed for the microcomputer shown in FIG.

As described above, according to the present invention, a functional circuit in a software development chip is selected according to a functional circuit of a microcomputer to be developed. Therefore, software corresponding to the functional circuit of the microcomputer to be developed is developed. Further, software for accessing a functional circuit not included in the microcomputer is not developed. Further, software can be developed for a plurality of types of microcomputers having different combinations of functional circuits using one type of software development chip.

[0017]

According to the present invention, a function selection circuit for selecting a function circuit in a software development chip is provided corresponding to a function circuit of a microcomputer to be developed. Therefore, software for accessing a functional circuit not included in the microcomputer is not developed, so that bugs can be prevented. Further, software can be developed for a plurality of types of microcomputers having different combinations of functional circuits using one type of software development chip. Therefore, since it is not necessary to prepare a software development chip for each type of microcomputer, the development efficiency is improved.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a part of a software development chip according to the present invention.

FIG. 2 is a block diagram showing a part of a configuration of a software development chip according to the present invention.

FIG. 3 is a block diagram showing a part of a configuration of a conventional software development chip.

FIG. 4 is a block diagram showing a part of a configuration of a microcomputer which is a target of software development.

[Explanation of symbols]

 1 CPU 10, 40, 70 Function control circuit 50 D / A conversion circuit (function circuit) 80 Display circuit (function circuit) 20 A / D conversion circuit (function circuit) 30, 60, 90 Function selection circuit 100 Function control register 110 3-input NAND gate 120 3-input AND gate 130, 330 Tri-state inverter 300 Function selection register 310 2-input NAND gate 320 2-input AND gate AB Address bus AD1 First address signal AD2 Second address signal CB Control bus DA Data signal DB data bus RE read permission signal S11, S41, S71 function control signal S31, S61, S91 function selection signal WE write permission signal

Claims (2)

[Claims] 1. A software development chip for developing software used for a microcomputer having a single or a plurality of circuits for realizing each unique function, comprising a data bus and an address bus. And a CPU for supplying a write permission signal; a functional circuit for realizing each unique function including a circuit for realizing a unique function of the microcomputer; the data bus and the address bus A function control circuit for controlling the operation of each of the function circuits based on the data signal and the first address signal received through the data bus and the address bus, respectively, based on the write enable signal. The function control circuit based on the data signal and the second address signal respectively received and the write enable signal. Software development chip, characterized in that a function selection circuit for-option. 2. The software development chip according to claim 1, wherein the CPU further supplies a read permission signal, and the function control circuit receives the first and second signals respectively via the data bus and the address bus. A software development chip for supplying the function control signal to a CPU based on an address signal and a data signal and the read permission signal.