JPH0630423B2 - Gain control amplifier - Google Patents

Description

The present invention relates to a gain control amplifier, which is optimal for use in an AGC circuit, a multiplier, and the like.

[Outline of Invention]

A pair of output currents of the front stage differential amplifier are passed through the PN junction to perform voltage conversion, and the voltage output is given to the rear stage differential amplifier,
In the gain control amplifier in which the direct current component flowing in the PN junction is made variable and the amplifier gain is controlled corresponding to the change in the V / I (resistance) gradient,
While using a constant current load in the output section of the front stage differential amplifier,
The operating current of the differential amplifier is the constant current, the difference current between the current value of the constant current load and the operating current of the differential amplifier is applied to the PN junction as the bias current for gain control, and the signal current flowing to the preceding amplifier is used as the bias current. By superimposing and flowing to the PN junction, the linearity of the gain control is established over a wide range.

[Conventional technology]

FIG. 3 shows a conventional gain control amplifier, in which a pair of collector output currents of a front stage differential amplifier 1 including transistors Q1 and Q2 and a current source 2I ₁ are supplied to diodes D1 and D2.
(PN junction) receives and converts the voltage, and this voltage is received by the post-stage differential amplifier 2 including the transistors Q3 and Q4 and the current source 2I ₂ to obtain the output voltage V ₀ .
By making the DC bias current 2I ₀ flowing through the diodes D1 and D2 variable, the junction resistance of the diodes D1 and D2 can be increased. To change the gain control. If the signal current flowing through the differential amplifier 1 and the signal current I _SG flowing out from the output points A and A ′ of the differential amplifier 1 are in a completely proportional relationship, the load resistance R _L of the subsequent differential amplifier 2 Output voltage v obtained
₀ is (QI ₂ / kT is gm of the latter stage differential amplifier).

However, the load resistance R of the first stage differential amplifier 1 is a fixed value,
The junction resistance r of the diodes D1 and D2 connected to this is I
_Since it is varied at ₀ , the shunt ratio of the signal current component at points A and A'changes according to I _0, and the signal current I _SG flowing out from points A and A'and the transistors Q1 of the differential amplifier 1,
The ratio with the signal current flowing through Q2 is not fixed.

Accordance connexion gain G of the control amplifier of FIG. 3, when a sufficiently large to h _fe of the transistor, Becomes In the second equation, the term R / (R + kT / qI ₀ ) represents the change in the diversion ratio.

[Problems to be solved by the invention]

In the second equation, when I ₀ is reduced in order to increase the gain, the proportional relationship between ¹ / I ₀ and G is no longer established, resulting in a non-linear control characteristic. Particularly in a region where G is large, the increase in G is saturated and a large gain cannot be obtained.

Further, the DC potentials at points A and A'become V _CC -R (I ₁ + I ₀ ), and when I ₀ is changed, the DC potential is greatly changed, the operating points of the differential amplifiers 1 and 2 are changed, and The dynamic range is restricted and reduced.

[Means for solving problems]

As shown in FIG. 1, the preamplifier 1 and the PN junction D1,
The front stage amplifier 1 includes a differential pair transistor Q1 and Q2 that receives a differential input, and a first current coupled to a pair of output parts of the differential pair transistor Q1 and Q2. A pair of constant current loads having a value (I ₀ + I ₁ ), and a common current source for setting the respective operating currents of the differential pair transistors to a second current value (I ₂ ) smaller than the first current value. Prepare

The PN junction uses the difference (I ₀ ) between the first and second current values as a DC bias current, and a signal current (x) generated by the differential input of the preceding stage differential amplifier 1 is superimposed on the DC bias current. Is connected to the output of the preceding stage amplifier 1 so as to flow as a flow.

The voltage signal generated in the PN junction is supplied to the rear differential amplifier 2 including a pair of differential pair transistors Q3 and Q4,
The gain is controlled by varying the DC bias current flowing through the PN junction.

[Action]

At the output point A (A ') of the front stage differential amplifier 1, if the signal current flowing to the amplifier side is + x, the current flowing into the point A is constant (I ₀ + I ₁ ), so it flows out from the point A. The signal current is -x. That is, the output signal current completely corresponds to the signal current flowing through the first-stage differential amplifier 1, and this correspondence is completely obtained even if the DC current I ₀ for gain control superimposed on the PN junction (D1, D2) is changed. It does not change. Therefore, when I ₀ is made variable, the resistance of the PN junction And a proportional relationship between the amplifier gain and the amplifier gain become a completely linear expression, and the non-linear term included in the past can be removed.

〔Example〕

FIG. 1 shows a gain control amplifier according to an embodiment of the present invention, and a collector resistance R of the first stage differential amplifier 1 shown in FIG.
The difference from the prior art is that the (pair) is replaced with a constant current source I ₀ + I ₁ , and the current source 2I ₀ connected to the cathodes of the diodes D1 and D2 is replaced with a voltage source V _DC .

The currents flowing through the transistors Q1 and Q2 of the first stage differential amplifier 1 are I ₁ in the balanced state, and are I ₁ + x and I ₁ -x (x is a signal current) when the differential input v _i is applied. Q1,
Since the pair of constant current sources connected to the collector of Q2 supply the fixed current I ₀ + I ₁ , the currents flowing out from the points A and A ′ are I ₀ −x and I ₀ + x. That is, the transistor Q1,
The same current as the signal current x flowing through Q2 flows out from points A and A ', and flows through the diodes D1 and D2. The direct current component flowing through the diodes D1 and D2 can be controlled by varying I _0, and thus 1 / I ₀ Gain control can be performed with a variable number.

Even if I ₀ is changed, the shunt ratio of the signal current at point A (or point A ′) does not change at all. That is, the transistor Q
There is always a relationship that if the signal current x flowing to the 1 (Q2) side increases, the signal current flowing out from the point A (point A ′) decreases (increases in the negative direction) by the increase.
The shunt ratio is always a fixed value -1, and the sum of the shunt currents is zero.

Since the AC impedance of the constant current source I ₀ + I ₁ is infinite, the case where R = ∞ in the second equation is the gain of the amplifier in FIG. Becomes Therefore, the proportional relationship between G and 1 / I ₀ is maintained over a wide range.

Voltage source V _DC connected to the cathodes of the diodes D1 and D2
Is for setting the input bias of the latter stage differential amplifier 2 to a predetermined value, and its voltage value is essentially independent of the gain control characteristic. Therefore, as shown in FIG. 2A, a PNP transistor Q5 whose base potential is fixed to V _DC may be used. Alternatively, as shown in FIG. 2B, the base is V
_Using PNP transistors Q6 and Q7 fixed to _DC ,
The emitter-base junction may be used as a substitute for the diodes D1 and D2.

As the voltage source V _DC , a resistor R _D (having impedance) may be used as shown in FIG. 2C. In this case, the signal current flowing into the resistor R _D is canceled by −x from the diode D1 and + x from the diode D2.
Even if the voltage source V _DC has impedance, it does not become a factor that determines the gain. Although the DC potential of the resistor R _D changes by making I ₀ variable, this change is ignored as an in-phase input of the post-stage differential amplifier 2.

Note when the voltage source V _DC to the constant voltage source, A point, the DC potential of the point A _{'is, V DC + V F (V} F is the forward ON voltage of the diode D1, D2) is fixed to. Therefore, the potential fluctuations of A and A'caused by changing I ₀ do not occur, so that the DC operating point of the amplifier system can be fixed and the optimum operating point can be set so as to obtain the maximum dynamic range.

In the basic circuit of FIG. 1, the collectors of the transistors Q1 and Q2 are directly connected to the bases of the transistors Q3 and Q4. For this reason, if DC design is difficult, Q1,
A DC shift element such as a diode or a resistor (which does not lose continuity of current) may be inserted between the collector of Q2 and the bases of Q3 and Q4.

The constant current source I ₀ + I _1, upon varying the I _0, may be a value that will not Sonji the current (I ₁₎ necessary for the operation of the transistors Q1, Q2, preferably a basic value I ₁ It may be a circuit means for generating a variable current, which is fixed as, and a variable component I ₀ is added thereto.

The gain control can also be achieved by changing the common current source I ₂ (formula 3) of the post-stage differential amplifier 2.

〔The invention's effect〕

According to the present invention, since the load current and the operating current of the differential pair transistor of the preceding differential amplifier are constant, a current having the same magnitude as the signal current flowing through the differential pair transistor is P.
The signal current flows through the N-junction, and this relationship does not change depending on the magnitude of the DC bias current (the difference current between the load current and the operating current) that flows through the PN junction for gain control. Therefore, the gain and gain control variables By removing the non-linear term generated in the relational expression between and, a linear gain control characteristic can be obtained over a wide range. Also, even if the current value of the constant current load is changed for gain control, the operating point current of the differential pair transistor does not change, so the maximum dynamic range can be obtained at the DC operating point of the preceding differential amplifier. Can be fixed as.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a gain control amplifier showing an embodiment of the present invention, FIG. 2 is a concrete example of the voltage source V _DC of FIG. 1,
FIG. 3 is a circuit diagram of a conventional gain control amplifier. In still code used in the drawings, 1 ...... front stage differential amplifier 2 ...... after stage differential amplifier D1, D2 ...... diode I ₀ + I ₁ ...... constant current source A, A '...... output point x ...... signal current V _DC ...... voltage source 2I _1, is 2I ₂ ...... current source.

Claims (1)

[Claims] 1. A differential pair transistor for receiving a differential input,
A pair of constant current loads having a first current value, which are coupled to a pair of output portions of the differential pair transistor, and respective operating currents of the differential pair transistor are set to a second current smaller than the first current value. A pre-stage differential amplifier including a common current source for setting a value, and a difference between the first and second current values is a DC bias current,
A pair of PN junctions connected to the output of the preceding stage amplifier so as to superimpose a signal current generated by the differential input of the preceding stage differential amplifier on the DC bias current, and a pair to which a voltage signal generated at the PN junction is supplied. And a post-stage differential amplifier including a differential pair transistor, and controlling the gain by varying the DC bias current flowing in the PN junction.