JPH06296363A - Power transistor overcurrent protective circuit - Google Patents

Abstract

PURPOSE:To enable quick suppression of a power transistor overcurrent and generation of surge voltage. CONSTITUTION:An overcurrent circuit has a power transistor 4 to supply current to a load by a switching operation and a current control loop (11-13, 18, 32, 33) to suppress a current flowing through the power transistor by lowering the power transistor drive signal level. A voltage corresponding to the current flowing through the power transistor is converted to a current signal and a current proportional to an excess of the current signal over a specified value lowers the power transistor current level by bypassing a gate circuit that drives the power transistor. In addition, a circuit (21-30) is provided that closes to self-hold when the bypass current continues for a specified time and gradually shunts the bypass current. The circuit (21-30) switches from a current control circuit to an open loop by gradually increasing the shunt current, thereby lowering the drive signal level.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power transistor, and in particular, in a voltage drive type transistor such as an IGBT or a MOSFET, an overcurrent due to a load short circuit or the like is limited at a high speed to cut off and protect it in a safe operation area. The present invention relates to an overcurrent protection circuit for a power transistor that enables the above.

[0002]

2. Description of the Related Art An IGBT (Insulated Gate Bipolar Mode Transistor) has a low on-voltage, a MOS gate structure, a small driving power, and a relatively high-speed switching capability.

The characteristics of the on-voltage and the switching speed are in a trade-off relationship, and research is being conducted day and night so as to improve the trade-off and obtain a higher performance device. Characteristic C in FIG.
Are the 3rd generation and later IGB predicted from these studies.
The on-voltage characteristic of T is shown in comparison with the on-voltage characteristic A of the first-generation IGBT. The current IGBT has characteristics B in the second generation. The collector current I _C is shown as a percentage with the rated current of the IGBT being 100.

As is apparent from these characteristics, when the collector-emitter voltage V _CE rises due to a load short circuit or the like, a collector current I _{C that} is several times the rated current flows and the first-generation IG
Over current flows 6 to 8 times in BT and 10 to 12 times in second generation IGBT.

In the IGBTs of the third generation or later, which are currently being researched, a pattern of the order of μm of a DRAM class is used, and by adding other improvements, an overcurrent of 10 times as much as the characteristic C flows.

When a large overcurrent is generated as described above, there is a problem that if the current is cut off at a high speed, the surge voltage becomes excessive and it becomes difficult to protect it safely, and it becomes difficult to protect the device from overcurrent.

The protection of the conventional IGBT when the load is short-circuited will be described below. A general main circuit configuration of an inverter using an IGBT is shown in FIG. This inverter is
The bridge type converter composed of the IGBTs 21 to 26 converts the DC voltage of the DC voltage source 1 into an AC voltage to drive the electric motor 3.

In such a device, when a short circuit occurs between the terminals on the load (motor) side, a short circuit current flows through the positive and negative IGBTs. Also, when an ON signal (a signal due to noise or malfunction) is simultaneously input to the positive and negative IGBTs of the same arm, a short-circuit current similarly flows.

The short-circuit withstand capability of the IGBT capable of withstanding such a short-circuit state is 80% of the rated voltage of the element in the current IGBT.
At a voltage of 10 to 20 μs, and 7.5 to 10 μs
Short-circuit protection is performed within the current limit to detect overcurrent and shut off the current.

FIG. 7B shows a collector-emitter voltage V
FIG. 7A is a characteristic diagram of short circuit withstand capability, which shows the relationship between collector current I _C flowing at short circuit under constant _CR and withstand time (t ₁ ). As is clear from this characteristic, I _C and t ₁ have a substantially constant power relationship, and when the collector current I _C increases due to a load short circuit or the like, the withstand time t ₁ becomes short and a high-speed protection operation is required.

Therefore, various methods have been proposed in which a load short circuit is detected, the gate voltage of the IGBT is reduced, and the short circuit current is limited by utilizing the transistor function of the IGBT to increase the apparent short circuit withstand time.

FIG. 8 also shows this type (Annual Meeting of the Institute of Electrical Engineers, 470, 1992).
In addition to the GBT 4a, a current sense IGBT 4b is provided, and when the current exceeds a set current, the NLU circuit 50 short-circuits the gate (G) and the emitter (E) of the IGBT to reduce the gate voltage and suppress the short-circuit current.

In the circuit of FIG. 9 (a) showing an example of the NLU circuit, the emitter current of the current sense IGBT 4b is converted into a voltage by the resistor 52, and when the voltage exceeds the gate threshold voltage of the MOSFET 54 through the resistor 53, the drain of the MOSFET is generated. A current flows and the gate voltage of the IGBT 4 is lowered.

The circuit shown in FIG. 9B has a MOSFET 54.
Is replaced with a bipolar transistor 55. When such a circuit is configured, the gate voltage of the IGBT is lowered and the ON resistance of the IGBT is increased at the time of overcurrent.
As shown in (c), the short-circuit current can be limited, and the short-circuit withstand time can be made apparently long as shown in FIG. 8 (b).

[0015]

Although the conventional method of FIG. 8 increases the short-circuit withstand capability of the IGBT module, a separate circuit for detecting a short-circuit accident and turning off the signal driving the IGBT bridge is required.

According to this method, the short-circuit current is quickly limited to about 200%, so that it is difficult to detect a short-circuit accident by (a) overcurrent detection. (B) For this reason, it is necessary to add a circuit for turning off the drive signal by another short-circuit accident detection circuit or the like for detecting that V _CE of the IGBT remains high even if an ON signal is applied, and the circuit is complicated. Becomes

(C) In the circuit of FIG. 8 (a), the gate resistance R
Even if the drain current of the FET 54 of FIG. 9A is the same depending on the size of g51, the gate voltage value is different. Therefore, there is a drawback that the current limit value is different depending on the size of Rg as shown in FIG.

To reduce the change in the limit value current, it can be achieved by increasing the gain of the drain current with respect to the current detection value shown in FIG. 9 (a).
The SFET 54 has a switching operation rather than an analog operation, the gate of the IGBT 4 is lowered to near zero, the current of the IGBT is turned on and off, and oscillates, so that there is a limit. Therefore, the characteristics shown in FIG. 6 are obtained. If Rg is made small in order to speed up the switching of the IGBT, there is a drawback that the short circuit current limit value rises and the short circuit withstand time becomes short.

(D) Next, there is a problem when the IGBT modules are connected in parallel. In the method of FIG. 8, since the current limiting function is housed inside each module, the operation level of each module is different. Therefore, if the current limiting function of one module malfunctions, the on-resistance of this module increases, the current moves to the adjacent module, and the current limiting function of this module operates. By repeating this, a kind of oscillation state occurs and there is a risk that the IGBT is deteriorated.

[0020] (e) then become a problem NLU speed during cutoff of the peak value of the current in there scheme is limited but the current is faster floating inductance l ₀ surge voltage (-l ₀ · due 8 dic / dt) may cause the element to deteriorate beyond the safe operation of the IGBT.

An example of the safe operation area of the IGBT is shown in FIG.
It shows in (c). The surge voltage V increases as the current I _C increases.
_CEP needs to be lowered. In particular, as the capacitance of the converter increases, the fault current also increases, but the stray inductance cannot be reduced because of the structure, so the surge voltage tends to increase accordingly.

Therefore, the only way to reduce the surge voltage is to reduce the current change rate dic / dt. (F) Finally, an operation of cutting off the limited current by turning off the drive signal is performed at 250% to 500%. The surge voltage generated at this time is determined by -L ₀ · di / dt (L ₀ is the leakage inductance, di / dt is the current change rate), and if this surge voltage passes outside the reverse bias safe operation area of the transistor, the transistor will become permanent. to degrade. (IG
The safe operating area of BT drops to about 80% of the rated voltage when 200% current is interrupted.) Especially, when the converter capacity increases, L ₀ also tends to increase.
Moreover, since the current i is proportional to the capacity, the surge voltage significantly increases. Therefore, the snubber circuit (surge absorption circuit) may occupy a larger volume and cost than the transistor of the main element.

Under the above-mentioned technical background, the present invention detects the overcurrent of a transistor having a small ON voltage and a large short-circuit current, limits this current at high speed, and then softly cuts off the fault current. An object of the present invention is to provide a highly reliable power transistor protection circuit by suppressing a surge voltage that occurs.

[0024]

In order to achieve the above object, the present invention obtains a power transistor for supplying a current to a load by a switching operation, and a current signal having a voltage corresponding to the current flowing through the power transistor, A current control loop for bypassing a current proportional to a portion where the current signal exceeds a predetermined value from a gate circuit for driving the power transistor to lower a drive signal level of the power transistor and suppressing a current flowing through the power transistor , A circuit is provided which, when the bypass current continues for a predetermined time, closes itself and holds it, and gradually divides the bypass current, and gradually increases the shunt current to switch from the current control loop to the open loop to thereby drive the drive signal level. Lower.

Further, when the bypass current flows, the state of the drive signal of the power transistor is held, and when the bypass current continues for a certain time, the drive signal is turned off. Further, the self-holding circuit that closes when the bypass current continues for a predetermined time is reset by the off state of the drive signal.

[0026]

When an overcurrent flows through the power transistor and exceeds a predetermined value, a bypass current proportional to the current flows from the gate circuit to reduce the gate voltage. When the gate voltage decreases, the conduction resistance of the power transistor increases and the current control loop that suppresses the overcurrent functions, so that the overcurrent is maintained near a predetermined value. When the bypass current flows, the drive signal of the power transistor is held in the on state, and the off operation by the drive signal is not performed. When the bypass current continues to flow for a predetermined time, the predetermined circuit closes and self-holds, and the bypass current gradually shunts to the predetermined circuit and flows in addition to the control signal of the current control loop. When this shunt current gradually increases and exceeds the bypass current by the current control loop, the current is switched to the open loop, the gate voltage further decreases, and the current flowing through the power transistor is cut off gently. When the bypass current continues for a certain time (including the time until the current of the power transistor becomes zero), the drive signal is returned to the off state, the self-holding state is released, and the initial state is returned.

[0027]

FIG. 1 shows an embodiment of the present invention. In FIG. 1, the IGBT 4 is normally connected to the DC power supply 1 through a load, but the case where the load impedance is zero is shown because protection is considered when the load is short-circuited. IGBT4
A part of the current on the emitter side of is converted into a voltage by a resistor 11 to form an emitter follower circuit composed of a transistor 12 and a resistor 13.

The gate drive circuit of the IGBT 4 is a direct current power source.
14 and 15 are used as drive power sources, the drive signal is insulated by the photocoupler 16, and the drive signals amplified by the amplifier 17 are driven through the resistors 18 to the bases of the transistors 32 and 33 to obtain positive and negative gate drive voltages. The gate of the IGBT 4 is driven via the gate resistor 34. The emitter of the IGBT 4 is the DC power supply 14 and
Since it is at the potential of the series connection point of 15, the gate drive voltage becomes positive when the transistor 32 turns on, and becomes negative when the transistor 33 turns on.

Resistor 18 and photocoupler light emitting diode 1
9. Connect to the collector side of transistor 12 through diode 20. The cathode side of the diode 20 is connected to the base of the transistor 23 via the resistor 21, and the resistor 22 is connected between the emitter and the base of the transistor. Transistor 23
The capacitor 25 is charged from the collector of the capacitor through the resistor 24. The connection point between the resistor 24 and the capacitor 25 is connected to the base of the transistor 26, and the emitter of the transistor 26 is connected via the resistor 27 to the other end of the capacitor 25 and the series connection point of the DC power supplies 14 and 15. The collector of transistor 26 is a diode
Connect to 20 cathodes. Diode 28 is capacitor 25
Is connected in parallel with the transistor 26 so that an excessive reverse voltage is not applied to the transistor 26. The base of the transistor 26 is connected to the bases of the transistors 32 and 33 via the resistor 29 and the diode 30. Also, from the base of transistor 26 to resistor 31
To the negative side of the DC power supply 15 via.

When a current flows through the light emitting diode 19 of the photocoupler, the light receiving transistor 35 and the resistor 36 of the photocoupler.
Is connected in series and the signal is detected by the failure detection circuit 37,
The PWM signal (pulse width modulation signal) is held via the holding circuit and is input to the photocoupler 16 via the cutoff circuit 39. The output V37 of the failure detection circuit 37 is connected via the timer circuit 40 to operate the cutoff circuit 39.

The operation of this embodiment having the above structure will be described with reference to FIG. At time t ₁ , the PWM signal is set to “1”, and the photocoupler 16 is driven by the voltage V39.
Through 17 the transistor 33 is turned off, the transistor 32 is turned on and the gate drive voltage V _G is switched from negative to positive.

When a positive voltage is applied to the gate of the IGBT 4, I
The GBT turns on. When the load is short-circuited, the DC power supply 1 is applied between the collector and the emitter of the IGBT 4, the IGBT is turned on, and the internal resistance decreases, the collector current I _{C of the} IGBT rapidly increases with a slope limited by the stray inductance L ₀ of the circuit. Rise to. A part of this current is detected by the resistor 11, and a current I ₁ proportional to the increase in I _C flows into the collector of the transistor 12 from the point that this detected voltage exceeds the base-emitter threshold voltage of the transistor 12. . This current I ₁ flows through the circuit of the resistor 18, the photocoupler 19 and the diode 20, and the voltage drop of the resistor 18 increases, and the gate drive voltage V _G begins to decrease.

On the other hand, a part of the current of I ₁ is also shunted to the circuits of the resistors 22 and 21, and at time t ₃ , the transistor 23 is turned on to output the voltage V23 and start charging the capacitor 25 via the resistor 24. . The charging voltage V _C rises from negative to positive and exceeds the threshold voltage of the base-emitter of the transistor 26. After time t ₄ , the collector current I ₂ of the transistor 26 is V due to the emitter follower connection of the transistor 26 and the resistor 27. A current proportional to the portion above the _C threshold voltage will flow. Further, when I ₂ flows, the transistor 23 self-holds and holds this state even when I ₁ becomes zero.

During the period from time t _{2 to} t ₄ , I _C of the IGBT ₄ is
Is a constant value or more, I ₁ is caused to flow, the gate voltage of the IGBT is lowered, the ON resistance of the IGBT is increased, and I _C is decreased.

[0035] Then the time period from t ₄ ~t ₆ will be I ₂ which gradually increases to balance min I ₁ that is input I ₂ is increased as a disturbance is reduced, I ₁ at time t ₆
Becomes zero. This period from t _{4 to} t _{6 is} a period in which the constant I _C current control and the signal for forcibly lowering the gate voltage and lowering I _C overlap each other, and since the constant I _C control loop is operating, I _C Is only slightly reduced.

Next, when I ₁ becomes zero at time t ₆ , thereafter, the voltage drop of the resistor 18 increases as I ₂ increases, and V _G gradually (much earlier than between t ₄ and t ₆ ).
As a result, I _C is relatively softly completely shut off at time t ₇ , and the surge voltage between V _{CE of the} IGBT can be reduced. In this way, when the overcurrent state continues beyond the time t ₄ , the IGBT is cut off with good reliability in the complete operation region.

When the overcurrent state is resolved before reaching time t ₄ and I ₁ becomes zero, the transistor 23 is turned off and the capacitor voltage V _C is discharged by the resistor 31. This is to prevent the IGBT from being turned off by self-holding due to noise or a short-time overcurrent such as a diode recovery current of the opposite phase at the time of bridge connection.

Next, although the PWM signal is off at time t ₅ , the photo coupler 19 detects I ₁ + I ₂ , and the failure detection circuit 37 and the holding circuit 38 via the photo coupler 35 detect the photo coupler 16. The signal V39 is held.

The timer circuit 40, IGBT 4 of the current I _C is V _G is off the driving signal V39 through the cutoff circuit 39 at time t _8, which is delayed from the time t ₇ to be cut off in a soft
Is rapidly turned to a negative voltage and at the same time diode 30 and resistor 29
Reverse biases the capacitor 25 by. As a result, the current of the photocoupler 19 becomes zero and the failure signal V37 is reset.

According to this embodiment, the short-circuit current is reduced to 1/4 to 1/5 by forming the constant current control loop of the IGBT.
The safety operation time at the time of short circuit can be extended by lowering it to. Smooth switching from this constant current control loop to the forced turn-off loop is performed, and then the gate voltage is gradually reduced to reduce the current change rate of the IGBT to reduce the surge voltage and reduce reliability within the safe operation area of the IGBT. The current can be cut off with good performance.

The device is devised so that the gate drive signal is held and the fault current is not interrupted at high speed during the period when this overcurrent is flowing. This is extremely effective in preventing the surge voltage from increasing because the stray inductance does not decrease but the current value increases as the converter capacitance increases.

A second embodiment of the present invention is shown in FIG. Figure 1
The common parts with are omitted. In the second embodiment, the IG
The BT gate drive DC power supply 14 uses only a positive voltage.

In the current detection of the IGBT 4, the main current is not shunted, but the potential inside the IGBT is directly detected. Also, the same effect can be obtained by detecting the current with a Hall current detector or the like. Transistor 12 is FET
It is also possible to use

Further, the current I ₂ is increased by the gradual increase circuit 44 via the time delay 42 which is activated by detecting the flow of the collector current of the transistor 12 and the holding circuit 43 which holds itself after this time delay. Reset circuit
45 resets the gradual increase circuit when the output of the amplifier 17 becomes zero. In the above description, the element is the IGBT, but it can be commonly applied to voltage-driven elements having a transistor function such as MOSFET.

[0045]

As described above, according to the present invention, when the current flowing through the power transistor is a predetermined value or more, an automatic control loop for lowering the gate voltage is provided to limit the power transistor current. When the current continues for a certain period of time or longer, a circuit is provided to detect and hold the gate voltage to gradually reduce the gate voltage, and the current is cut off softly. A power transistor that holds the gate drive signal during this series of operations, extends the short-circuit withstand time of the transistor, and at the same time softly interrupts the current while lowering the surge voltage, enabling highly reliable operation within the safe operation area. Can provide an overcurrent protection circuit.

[Brief description of drawings]

FIG. 1 is an embodiment of the present invention.

FIG. 2 is a diagram for explaining the operation of FIG.

FIG. 3 shows a second embodiment of the present invention.

FIG. 4 is a general main circuit diagram of an inverter.

FIG. 5 is a characteristic diagram of a power transistor.

FIG. 6 is a characteristic diagram showing a problem of the conventional device.

FIG. 7 is a diagram for explaining overcurrent withstand capability of a power transistor.

FIG. 8 is an explanatory diagram of a conventional device.

FIG. 9 is a detailed view of a part of FIG.

[Explanation of symbols]

1 ... DC power supply, 2 ... Bridge converter, 3 ... Motor, 4 ...
IGBT, 11, 13 ... Resistor, 12 ... Transistor, 14, 15 ...
DC power supply, 16 ... Photo coupler, 17 ... Amplifier, 18, 21, 2
2, 24, 27 ... Resistor, 19, 35 ... Photo coupler, 20, 28, 30
… Diodes, 23, 26, 32, 33… Transistors, 25… Capacitors, 29, 31, 34, 36… Resistors, 37… Failure detection circuit,
38 ... Signal holding circuit, 39 ... Signal cutting circuit, 40 ... Timer circuit, 41 ... Amplifier, 42 ... Time delay, 43 ... Holding circuit,
44 ... Gradual increase circuit, 45 ... Reset circuit.

Claims (3)

[Claims] 1. A power transistor for supplying a current to a load by a switching operation, and a current signal having a voltage corresponding to a current flowing through the power transistor is obtained, and a current proportional to a portion where the current signal exceeds a predetermined value is supplied to the power transistor. A current control loop that bypasses the gate circuit that drives the transistor to lower the drive signal level of the power transistor and suppresses the current flowing through the power transistor, is closed and self-holds when the bypass current continues for a predetermined time. At the same time, a circuit for gradually shunting the bypass current is provided, and by gradually increasing the shunt current, the current control loop is switched to an open loop to reduce the drive signal level, and an overcurrent protection circuit for a power transistor. 2. The overcurrent protection circuit for a power transistor according to claim 1, wherein when the bypass current flows, a state of a drive signal of the power transistor is held, and when the bypass current continues for a certain time, the drive An overcurrent protection circuit for a power transistor, which is provided with a circuit for turning off a signal. 3. The power transistor overcurrent protection circuit according to claim 2, wherein a self-holding circuit that closes when the bypass current continues for a predetermined time is reset by an off state of the drive signal. Overcurrent protection circuit.