JPH05218836A - Driving circuit for insulated gate element - Google Patents

Driving circuit for insulated gate element

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Publication number
JPH05218836A
JPH05218836A JP4253342A JP25334292A JPH05218836A JP H05218836 A JPH05218836 A JP H05218836A JP 4253342 A JP4253342 A JP 4253342A JP 25334292 A JP25334292 A JP 25334292A JP H05218836 A JPH05218836 A JP H05218836A
Authority
JP
Japan
Prior art keywords
voltage
main
current
gate element
drive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4253342A
Other languages
Japanese (ja)
Other versions
JPH0767073B2 (en
Inventor
Shoichi Furuhata
昌一 古畑
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP4253342A priority Critical patent/JPH0767073B2/en
Publication of JPH05218836A publication Critical patent/JPH05218836A/en
Publication of JPH0767073B2 publication Critical patent/JPH0767073B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Electronic Switches (AREA)

Abstract

PURPOSE:To provide a driving circuit which contains a function when the load is short-circuited and to increase the time before the gate element is broken. CONSTITUTION:The current corresponding to the overcurrent flowing to an insulated gate element IGBT 1 is detected by a current detecting resistance 31 via the emitter of an auxiliary IGBT 21. Then an auxiliary transistor TR 5 is turned on based on the detected voltage of the resistance 31 and the collector potential of the TR 5 is reduced. Thus the gate potential of the IGBT 1 connected to the collector of the TR 5 is reduced. Then the overcurrent is suppressed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はモータ制御用インバータ
装置などの電力変換装置における主回路のスイッチング
用に用いられる絶縁ゲート素子(即ちゲート印加電圧の
有無でオン,オフ駆動されるパワーMOSFETなどの
素子をいう、なおこの種の絶縁ゲート素子としてはIG
BTが代表的なものであり、従って以下ではIGBTと
も呼ぶ)のゲート駆動回路であって、主回路短絡時にお
ける短絡電流(素子電流)の制限機能を高いノイズマー
ジンで持つ駆動回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulated gate element used for switching a main circuit in a power converter such as a motor control inverter device (that is, a power MOSFET such as a power MOSFET which is turned on and off depending on the presence or absence of a gate applied voltage) IG as an insulated gate element of this type.
The present invention relates to a gate drive circuit of a BT (typically referred to as an IGBT hereinafter), and a drive circuit having a high noise margin function of limiting a short-circuit current (element current) when a main circuit is short-circuited.

【0002】[0002]

【従来の技術】なお以下各図において同一の符号は同一
もしくは相当部分を示す。また論理もしくはレベルHigh
Low は単に“H”,“L”と記すものとする。図5はI
GBTのゲート電圧しゃ断機能を持つ従来のこの種の駆
動回路を示す。同図において1は主回路に挿入されたI
GBT、44はこのIGBT1のゲートを駆動してIGB
T1を繰返し断続させる駆動回路、42はこのIGBTの
主回路電流i0を検出する電流トランスである。43は比
較回路で、前記電流トランス42を介して検出された主回
路電流i0が所定値を越えたとき駆動回路44を介してI
GBT1 をオフさせる役割を持つ。このように従来技術
では、主回路短絡電流i0が流れた時にIGBT1を駆
動するゲート電圧をいかに高速にオフするかで主回路短
絡保護を行っていた。
2. Description of the Related Art In the following figures, the same reference numerals indicate the same or corresponding parts. Logic or level High
Low is simply described as “H” and “L”. Figure 5 shows I
A conventional drive circuit of this type having a gate voltage cutoff function of a GBT is shown. In the figure, 1 is an I inserted in the main circuit.
The IGBT, 44 drives the gate of this IGBT 1 to drive the IGBT.
A driving circuit for repeatedly connecting and disconnecting T1 is a current transformer 42 for detecting the main circuit current i0 of the IGBT. Reference numeral 43 denotes a comparison circuit which, when the main circuit current i0 detected through the current transformer 42 exceeds a predetermined value, outputs a current I through a drive circuit 44.
Has a role to turn off GBT1. As described above, in the related art, the main circuit short circuit protection is performed by how quickly the gate voltage for driving the IGBT 1 is turned off when the main circuit short circuit current i0 flows.

【0003】[0003]

【発明が解決しようとする課題】しかしながら前述のよ
うな主回路短絡保護方式では比較器43, 駆動回路44を高
速化せねばならないが、反面このような回路はノイズに
よって誤動作しやすいという問題点がある。そこでこの
発明の課題は負荷短絡時にIGBTに流れる過大電流
を、絶縁ゲート素子のゲート電圧を下げることによって
抑制し、これによりIGBTが破壊に至るまでの時間を
長くする機能を備えたIGBTの駆動回路を提供し、ノ
イズに強くかつそれほど高速でなくとも良い、周辺制御
回路を利用できるようにすることにある。
However, in the main circuit short-circuit protection method as described above, it is necessary to speed up the comparator 43 and the drive circuit 44, but on the other hand, such a circuit is apt to malfunction due to noise. is there. Therefore, an object of the present invention is to provide an IGBT drive circuit having a function of suppressing an excessive current flowing in the IGBT when the load is short-circuited by lowering the gate voltage of the insulated gate element, and thereby increasing the time until the IGBT is destroyed. To provide a peripheral control circuit that is robust against noise and does not have to be very fast.

【0004】従って例えば前記の負荷短絡時には、この
ノイズに強い周辺制御回路でIGBTのゲート電圧をオ
フすればよいようにするものである。
Therefore, for example, when the load is short-circuited, the gate voltage of the IGBT may be turned off by the peripheral control circuit resistant to this noise.

【0005】[0005]

【課題を解決するための手段】前記の目的を達成するた
めに本発明の講じた手段は、『制御用端子(ゲートGな
ど)と第1および第2の主端子(エミッタEおよびコレ
クタCなど)とを備え、前記制御用端子と第1の主端子
との間に(ゲート駆動電源10などに基づきく)駆動電圧
(ゲート電圧egなど)を加えると、前記第1および第
2の主端子間が導通状態となり、前記駆動電圧を断つと
前記主端子間が阻止状態となる絶縁ゲート素子(IGB
T1など)の駆動回路において、少なくとも前記主端子
間に流れる主電流に対応する電流を検出する電流検出手
段と、前記駆動電圧を阻止する極性に設けられ、かつ前
記駆動電圧よりも低いツエナ電圧を有するツエナダイオ
ードと前記駆動電圧を順方向とする補助トランジスタと
の直列回路が前記制御用端子と第1の主端子との間に接
続され、前記電流検出手段の検出出力を前記補助トラン
ジスタの駆動用端子に加え、前記主端子間の主電流が所
定値を越えたとき前記補助トランジスタがオンするよう
に構成』し、そして『前記電流検出手段は主端子の一端
が前記絶縁ゲート素子の第1の主端子に、駆動用端子が
前記絶縁ゲート素子の駆動用端子にそれぞれ接続される
可制御半導体装置と、該可制御半導体装置の主端子の他
端と直列に接続される電流検出抵抗とからなり、前記検
出出力は該電流検出抵抗に生じる電圧であり前記補助ト
ランジスタの駆動用端子間電圧、または該電圧と前記ツ
エナ電圧との和の電圧に抗して印加される』ようにする
ものとする。
Means for Solving the Problems In order to achieve the above-mentioned object, the means taken by the present invention is "a control terminal (such as a gate G) and first and second main terminals (such as an emitter E and a collector C). ) And applying a drive voltage (based on the gate drive power supply 10 or the like) between the control terminal and the first main terminal, the first and second main terminals Between the main terminals is blocked when the drive voltage is cut off.
In a drive circuit such as T1), at least a current detection unit that detects a current corresponding to a main current flowing between the main terminals and a zener voltage that is provided in a polarity that blocks the drive voltage and is lower than the drive voltage. A series circuit of a Zener diode and an auxiliary transistor having the drive voltage in the forward direction is connected between the control terminal and a first main terminal, and a detection output of the current detection means is used for driving the auxiliary transistor. In addition to the terminals, the auxiliary transistor is configured to be turned on when the main current between the main terminals exceeds a predetermined value ", and" the current detecting means has one end of the main terminal as the first gate of the insulated gate element ". A controllable semiconductor device having a drive terminal connected to the drive terminal of the insulated gate element and a main terminal of the controllable semiconductor device connected in series to the other end of the main terminal. The detection output is a voltage generated in the current detection resistor, and is applied against the voltage between the driving terminals of the auxiliary transistor or the sum of the voltage and the Zener voltage. "

【0006】[0006]

【作用】主回路短絡時に、絶縁ゲート素子の主端子間に
流れる過電流を、絶縁ゲート素子に対応する電流を得る
ための補助絶縁ゲート素子とこの補助絶縁ゲート素子に
直列に接続された電流検出抵抗とからなる電流検出手段
により検出し、この検出出力により補助トランジスタを
オンし、このとき絶縁ゲート素子の駆動電圧はツエナダ
イオードのツエナ電圧にクランプされるのである。この
ため絶縁ゲート素子の主回路電流が制限されIGBTの
破壊に至るまでの時間が長くなり、さほど高速でない、
つまりノイズに強いゲート電圧しゃ断回路を用いても主
回路短絡を保護することができる。
[Operation] When the main circuit is short-circuited, an overinsulated gate element for obtaining an overcurrent flowing between the main terminals of the insulated gate element and a current corresponding to the insulated gate element and a current detection connected in series to this auxiliary insulated gate element The current is detected by a current detecting means composed of a resistor, and the auxiliary transistor is turned on by the detection output. At this time, the drive voltage of the insulated gate element is clamped to the zener voltage of the zener diode. Therefore, the main circuit current of the insulated gate element is limited, and the time until the breakdown of the IGBT becomes long, and the speed is not so high.
That is, the main circuit short circuit can be protected even if a gate voltage cutoff circuit resistant to noise is used.

【0007】[0007]

【実施例】図1ないし図4はそれぞれ異なる実施例とし
ての要部構成を示す回路図である。図1において、10は
IGBT1 のゲートGを駆動するための例えば15Vの直
流電源(以下ゲート駆動電源という)、8,9はこのゲ
ート駆動電源10の電圧を断続するための補助トランジス
タ、eDはIGBT1に対する駆動信号電圧である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIGS. 1 to 4 are circuit diagrams showing the structure of the essential parts of different embodiments. In FIG. 1, reference numeral 10 is a DC power supply of, for example, 15V for driving the gate G of the IGBT 1, (hereinafter referred to as gate drive power supply), 8 and 9 are auxiliary transistors for connecting and disconnecting the voltage of the gate drive power supply 10, and eD is the IGBT 1 Is the drive signal voltage for.

【0008】正常時、駆動信号電圧eDが“H”のとき
は補助トランジスタ8,9はそれぞれオフ,オンの状態
となり、ゲート駆動電源10の電圧が補助トランジスタ
9,抵抗7を介してIGBT1 のゲートG・エミッタE
間に印加され、IGBT1はオン状態となり、そのコレ
クタC・エミッタE間には図外の主回路電源と主回路負
荷とを介してコレクタ電流としての主回路電流i0 が流
れる。
Under normal conditions, when the drive signal voltage eD is "H", the auxiliary transistors 8 and 9 are turned off and on, respectively, and the voltage of the gate drive power supply 10 is passed through the auxiliary transistor 9 and the resistor 7 to the gate of the IGBT1. G / Emitter E
The IGBT 1 is turned on by being applied between them, and the main circuit current i0 as a collector current flows between the collector C and the emitter E of the IGBT 1 via the main circuit power supply and the main circuit load (not shown).

【0009】また逆に駆動信号電圧eDが“L”のとき
は補助トランジスタ8,9はそれぞれオン,オフの状態
となり、ゲート駆動電源10はIGBT1のゲート回路か
ら切離されると同時に、IGBT1のゲートG・エミッ
タE間は抵抗7,補助トランジスタ8を介して短絡さ
れ、IGBT1はオフ状態となる。このようにして駆動
信号電圧eDによりIGBT1は繰返し断続され主回路
負荷に必要な電流i0が流れるようにする。
On the contrary, when the drive signal voltage eD is "L", the auxiliary transistors 8 and 9 are turned on and off, respectively, and the gate drive power supply 10 is disconnected from the gate circuit of the IGBT1 and at the same time, the gate of the IGBT1 is turned off. The G and the emitter E are short-circuited via the resistor 7 and the auxiliary transistor 8, and the IGBT 1 is turned off. In this way, the drive signal voltage eD causes the IGBT 1 to be repeatedly connected and disconnected so that the current i0 required for the main circuit load flows.

【0010】ところでIGBT1のコレクタC・エミッ
タE間に挿入された分圧抵抗2と3およびIGBT1 の
ゲートG・エミッタE間に挿入されたツエナダイオード
6と補助トランジスタ5は主回路短絡保護のために本発
明において新たに付加されたものである。即ち主回路電
流i0が正常値であるときは、IGBT1 のコレクタ・
エミッタ間電圧ecEは小さく、この電圧ecEを分圧抵抗
2,3を介して分圧した該抵抗3間の電圧、従って補助
トランジスタ5のベースB,エミッタE間の電圧eBEも
充分小さく補助トランジスタ5はオフのままである。こ
れによりツエナダイオード6も不導通のままで、IGB
T1のゲートG・エミッタE間電圧(以下ゲート電圧と
略す)egはこのツエナダイオード6等によって何等の
影響も受けず、IGBT1はほぼゲート駆動電源10の電
圧(この例では15V)に等しい充分大きいゲート電圧e
gによって駆動され、そのコレクタ・エミッタ電圧ecE
も充分小さい値になり得る。
By the way, the voltage dividing resistors 2 and 3 inserted between the collector C and the emitter E of the IGBT1 and the zener diode 6 and the auxiliary transistor 5 inserted between the gate G and the emitter E of the IGBT1 are provided for protection of the main circuit short circuit. It is newly added in the present invention. That is, when the main circuit current i0 is a normal value, the collector of the IGBT1
The voltage ecE between the emitters is small, and the voltage between the resistors 3 obtained by dividing the voltage ecE through the voltage dividing resistors 2 and 3, and thus the voltage eBE between the base B and the emitter E of the auxiliary transistor 5, is also sufficiently small. Remains off. As a result, the Zener diode 6 also remains non-conductive, and the IGB
The voltage between the gate G and the emitter E of T1 (hereinafter abbreviated as gate voltage) eg is not affected by the Zener diode 6 or the like, and the IGBT1 is substantially equal to the voltage of the gate drive power supply 10 (15V in this example) and is sufficiently large. Gate voltage e
driven by g and its collector-emitter voltage ecE
Can be small enough.

【0011】しかし主回路短絡により主回路電流i0が
過大となったときは、IGBT1のコレクタ・エミッタ
電圧ecEも大になり、従って補助トランジスタ5のベー
ス・エミッタ電圧eBEも大になってこのトランジスタ5
がオン状態に切換わる。これによりIGBT1のゲート
電圧egはツエナダイオード6のツエナ電圧(この例で
は約7V)に制限される。これにより主回路の過大電流
i0はIGBT1 のゲート電圧egの低下に比例して低
減され、IGBT1 の破壊に至るまでの時間を長くする
ことができる。従って図5のような構成の、さほど高速
でないゲート電圧オフ回路を用いても、充分、主回路短
絡保護を行うことができる。
However, when the main circuit current i0 becomes excessive due to the short circuit of the main circuit, the collector-emitter voltage ecE of the IGBT1 also becomes large, so that the base-emitter voltage eBE of the auxiliary transistor 5 also becomes large and this transistor 5
Switches to the on state. As a result, the gate voltage eg of the IGBT 1 is limited to the zener voltage of the zener diode 6 (about 7 V in this example). As a result, the excessive current i0 of the main circuit is reduced in proportion to the decrease in the gate voltage eg of the IGBT1, and the time until the breakdown of the IGBT1 can be lengthened. Therefore, the main circuit short circuit protection can be sufficiently performed even if the gate voltage off circuit having the structure as shown in FIG.

【0012】次に図2,図3は図1の回路にさらに、I
GBT1のオフ時のいわゆるdv/dtによる誤ったタ
ーンオン(但しこのvはこの例ではコレクタ・エミッタ
電圧ecEに相当する)を防止するために、このIGBT
1のオフ時(つまり補助トランジスタ8がオン,同9が
オフの時)にIGBT1のゲートGとエミッタE間に逆
バイアス電圧(この例では3〜4V)が加わるように、
逆バイアス電源11を挿入した回路である。
2 and 3 further show the circuit of FIG.
In order to prevent erroneous turn-on (however, v corresponds to the collector-emitter voltage ecE in this example) due to so-called dv / dt when the GBT1 is turned off, this IGBT is used.
1 is off (that is, when the auxiliary transistor 8 is on and the auxiliary transistor 9 is off), a reverse bias voltage (3 to 4 V in this example) is applied between the gate G and the emitter E of the IGBT 1,
This is a circuit in which a reverse bias power source 11 is inserted.

【0013】但し図2のダイオード4は補助トランジス
タ5,ツエナダイオード6を介しての逆バイアス電源11
からの回り込み防止用のダイオードである。次に、図4
はIGBT1に流れる過電流を図1ないし図3に示した
ような電圧検出手段とは異なる手段で検出する実施例で
あり、IGBT1に流れる電流に対応した電流を補助I
GBTで得て、この補助IGBTに流れる電流を電流検
出抵抗を介して取り出すようにした電流検出手段を用い
てIGBT1を保護しようとするものである。21は小電
流容量の補助用絶縁ゲート素子としての補助IGBT、
31は電流検出抵抗である。そしてこの補助IGBT21と
電流検出抵抗31との直列回路は、その抵抗31側の他方が
IGBT1のエミッタEに接続される形でIGBT1と
並列に接続され、かつIGBT1および21の各ゲートG
は互いに結合されて一括駆動されるようになっている。
However, the diode 4 in FIG. 2 is a reverse bias power source 11 via an auxiliary transistor 5 and a zener diode 6.
This is a diode for preventing wraparound from. Next, FIG.
Is an embodiment in which the overcurrent flowing in the IGBT 1 is detected by a means different from the voltage detecting means shown in FIGS. 1 to 3, and a current corresponding to the current flowing in the IGBT 1 is supplied to the auxiliary I
It is intended to protect the IGBT 1 by using a current detecting means which is obtained by the GBT and takes out a current flowing in the auxiliary IGBT via a current detecting resistor. 21 is an auxiliary IGBT as an auxiliary insulated gate element with a small current capacity,
31 is a current detection resistor. The series circuit of the auxiliary IGBT 21 and the current detection resistor 31 is connected in parallel with the IGBT1 such that the other of the resistor 31 side is connected to the emitter E of the IGBT1 and each gate G of the IGBT1 and the IGBT21.
Are connected to each other and are collectively driven.

【0014】また図4ではツエナダイオード6は補助ト
ランジスタ5のエミッタE側に挿入されている。この回
路ではIGBT1のオン時には補助IGBT21もオン状
態にあり、主回路電流i01が流れるとIGBT1の電流
i0に対応する電流が補助IGBTを介して電流検出抵
抗31に流れ、この抵抗31の両端には主回路電流i01に対
応した電圧が現れることになる。
Further, in FIG. 4, the Zener diode 6 is inserted on the emitter E side of the auxiliary transistor 5. In this circuit, when the IGBT1 is on, the auxiliary IGBT21 is also in the on state, and when the main circuit current i01 flows, a current corresponding to the current i0 of the IGBT1 flows to the current detection resistor 31 via the auxiliary IGBT, and both ends of this resistor 31 are connected. A voltage corresponding to the main circuit current i01 will appear.

【0015】そして主回路電流i01が増加し、電流検出
抵抗31の両端の電圧が、ツエナダイオード6のツエナ電
圧と補助トランジスタ5のベースB・エミッタE間電圧
eBEとの和よりも高くなった時、補助トランジスタ5は
オン状態となり、IGBT1のゲート電圧egは、ほぼ
ツエナダイオード6のツエナ電圧まで降下する。この作
用によってIGBT1の主端子間に流れる電流i0を抑
え、IGBT1の電力破壊を防止することができる。
When the main circuit current i01 increases and the voltage across the current detection resistor 31 becomes higher than the sum of the zener voltage of the zener diode 6 and the base B-emitter E voltage eBE of the auxiliary transistor 5. , The auxiliary transistor 5 is turned on, and the gate voltage eg of the IGBT 1 drops almost to the Zener voltage of the Zener diode 6. By this action, the current i0 flowing between the main terminals of the IGBT1 can be suppressed, and the power breakdown of the IGBT1 can be prevented.

【0016】この図4の回路では電流検出抵抗31によっ
て生ずるジュール熱は図1ないし図3の分圧抵抗2のそ
れより小さくできるメリットがある。なお以上の各実施
例において補助トランジスタ5はFETであってもよ
く、さらにIGBT1,21はMOSFET,さらにBi
−MOSであってもよい。また図4においてIGBT1
と補助IGBT21とは、1チップ上に構成されていて
も、また別チップであってもよい。
The circuit of FIG. 4 has an advantage that the Joule heat generated by the current detecting resistor 31 can be made smaller than that of the voltage dividing resistor 2 of FIGS. In each of the above embodiments, the auxiliary transistor 5 may be a FET, the IGBTs 1 and 21 are MOSFETs, and Bi
It may be a MOS. In addition, in FIG.
The auxiliary IGBT 21 and the auxiliary IGBT 21 may be formed on one chip or may be separate chips.

【0017】[0017]

【発明の効果】本発明によれば、絶縁ゲート素子のゲー
ト・エミッタと並列にツエナダイオードと補助トランジ
スタとの直列回路を設け、主回路短絡時に絶縁ゲート素
子の主端子間に流れる過電流を、絶縁ゲート素子に対応
する電流を得るための補助絶縁ゲート素子と、この補助
絶縁ゲート素子に直列に接続された電流検出抵抗とから
なる電流検出手段により検出し、この検出出力により補
助トランジスタをオンし、このときIGBTの駆動電圧
はツエナダイオードのツエナ電圧にクランプされるよう
にしたので、絶縁ゲート素子に過電流が流れた時に、絶
縁ゲート素子自身がもつ電流制限機能により過電流を制
限して絶縁ゲート素子が破壊に至るまでの時間を長くす
ることができる。従って、周辺制御回路の応答速度を高
める必要がなく、つまりノイズに強いゲート電圧しゃ断
回路を利用することができる。
According to the present invention, a series circuit of a Zener diode and an auxiliary transistor is provided in parallel with the gate / emitter of the insulated gate element, and an overcurrent flowing between the main terminals of the insulated gate element when the main circuit is short-circuited, Detected by the current detection means consisting of an auxiliary insulated gate element for obtaining a current corresponding to the insulated gate element and a current detection resistor connected in series to this auxiliary insulated gate element, the auxiliary transistor is turned on by this detection output. At this time, the driving voltage of the IGBT is clamped to the Zener voltage of the Zener diode. Therefore, when an overcurrent flows through the insulated gate element, the insulated gate element itself limits the overcurrent and isolates it. The time until the gate element is destroyed can be lengthened. Therefore, it is not necessary to increase the response speed of the peripheral control circuit, that is, it is possible to use a gate voltage cutoff circuit that is resistant to noise.

【図面の簡単な説明】[Brief description of drawings]

【図1】第1の実施例の実施例の要部構成を示す駆動回
路図
FIG. 1 is a drive circuit diagram showing a main part configuration of an embodiment of a first embodiment.

【図2】第2の実施例の実施例の要部構成を示す駆動回
路図
FIG. 2 is a drive circuit diagram showing a main part configuration of an embodiment of a second embodiment.

【図3】第3の実施例の実施例の要部構成を示す駆動回
路図
FIG. 3 is a drive circuit diagram showing the main configuration of an embodiment of the third embodiment.

【図4】第4の実施例の実施例の要部構成を示す駆動回
路図
FIG. 4 is a drive circuit diagram showing the main configuration of an embodiment of the fourth embodiment.

【図5】従来の駆動回路図FIG. 5: Conventional drive circuit diagram

【符号の説明】[Explanation of symbols]

1,21:絶縁ゲート素子(1:IGBT、21:補助IG
BT) 2,3:分圧抵抗 4 :回り込み防止ダイオード 5,8,9:補助トランジスタ 6 :ツエナダイオード 7 :抵抗 10 :ゲート駆動電源 11 :逆バイアス電源 31 :電流検出抵抗
1,21: Insulated gate element (1: IGBT, 21: auxiliary IG
BT) 2, 3: Voltage dividing resistor 4: Leakage prevention diode 5, 8, 9: Auxiliary transistor 6: Zener diode 7: Resistor 10: Gate drive power supply 11: Reverse bias power supply 31: Current detection resistance

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】制御用端子と第1および第2の主端子とを
備え、前記制御用端子と第1の主端子との間に駆動電圧
を加えると、前記第1および第2の主端子間が導通状態
となり、前記駆動電圧を断つと前記主端子間が阻止状態
となる絶縁ゲート素子の駆動回路において、 少なくと
も前記主端子間に流れる主電流に対応する電流を検出す
る電流検出手段と、前記制御用端子と第1の主端子との
間に前記駆動電圧を阻止する極性に設けられ、かつ前記
駆動電圧よりも低いツエナ電圧を有するツエナダイオー
ドと前記駆動電圧を順方向とする補助トランジスタとの
直列回路が前記制御用端子と第1の主端子との間に接続
され、前記電流検出手段の検出出力を前記補助トランジ
スタの駆動用端子に加え、前記主端子間の主電流が所定
値を越えたとき前記補助トランジスタがオンするように
構成してなることを特徴とする絶縁ゲート素子の駆動回
路。
1. A control terminal and first and second main terminals. When a drive voltage is applied between the control terminal and the first main terminal, the first and second main terminals are provided. In the drive circuit of the insulated gate element in which the connection between the main terminals is blocked when the drive voltage is cut off, the current detection means for detecting a current corresponding to at least the main current flowing between the main terminals, A zener diode having a zener voltage lower than the drive voltage and having a polarity for blocking the drive voltage between the control terminal and the first main terminal; and an auxiliary transistor having the drive voltage in the forward direction. Is connected between the control terminal and the first main terminal, the detection output of the current detection means is applied to the drive terminal of the auxiliary transistor, and the main current between the main terminals has a predetermined value. When exceeded A drive circuit for an insulated gate element, characterized in that the auxiliary transistor is configured to be turned on.
【請求項2】特許請求の範囲第1項記載の絶縁ゲート素
子の駆動回路において、前記電流検出手段は主端子の一
端が前記絶縁ゲート素子の第1の主端子に、駆動用端子
が前記絶縁ゲート素子の駆動用端子にそれぞれ接続され
る可制御半導体装置と、該可制御半導体装置の主端子の
他端と直列に接続される電流検出抵抗とからなり、前記
検出出力は該電流検出抵抗に生じる電圧であって前記補
助トランジスタの駆動用端子間電圧、または該電圧と前
記ツエナ電圧との和の電圧に抗して印加される、ことを
特徴とする絶縁ゲート素子の駆動回路。
2. The drive circuit for an insulated gate element according to claim 1, wherein in the current detection means, one end of a main terminal is the first main terminal of the insulated gate element, and the drive terminal is the insulated terminal. The controllable semiconductor device is connected to each of the driving terminals of the gate element, and the current detection resistor is connected in series with the other end of the main terminal of the controllable semiconductor device. A drive circuit for an insulated gate element, which is applied against a voltage generated between the driving terminals of the auxiliary transistor or a sum voltage of the voltage and the zener voltage.
JP4253342A 1992-09-24 1992-09-24 Insulated gate element drive circuit Expired - Lifetime JPH0767073B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4253342A JPH0767073B2 (en) 1992-09-24 1992-09-24 Insulated gate element drive circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4253342A JPH0767073B2 (en) 1992-09-24 1992-09-24 Insulated gate element drive circuit

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP63129863A Division JPH0756937B2 (en) 1988-01-18 1988-05-27 Insulated gate element drive circuit

Publications (2)

Publication Number Publication Date
JPH05218836A true JPH05218836A (en) 1993-08-27
JPH0767073B2 JPH0767073B2 (en) 1995-07-19

Family

ID=17249997

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4253342A Expired - Lifetime JPH0767073B2 (en) 1992-09-24 1992-09-24 Insulated gate element drive circuit

Country Status (1)

Country Link
JP (1) JPH0767073B2 (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1184984A1 (en) * 2000-02-25 2002-03-06 Mitsubishi Denki Kabushiki Kaisha Power module
US6788128B2 (en) 2002-04-19 2004-09-07 Denso Corporation Overcurrent protection structure of load driving circuit
JP2007028711A (en) * 2005-07-12 2007-02-01 Fuji Electric Device Technology Co Ltd Gate driving circuit for semiconductor device
JP2010034701A (en) * 2008-07-25 2010-02-12 Denso Corp Driving circuit of power conversion circuit
JP2013169102A (en) * 2012-02-16 2013-08-29 Denso Corp Gate drive circuit
US8749279B2 (en) 2012-08-06 2014-06-10 Denso Corporation Driver apparatus for switching elements
CN104348338A (en) * 2013-07-30 2015-02-11 株式会社电装 Semiconductor element module and gate drive circuit
JP2015029378A (en) * 2013-07-30 2015-02-12 株式会社デンソー Semiconductor element module and gate drive circuit
JP2016077110A (en) * 2014-10-08 2016-05-12 三菱電機株式会社 Semiconductor device
US9461457B2 (en) 2013-04-15 2016-10-04 Denso Corporation Driver for target switching element and control system for machine using the same
JP2019080436A (en) * 2017-10-25 2019-05-23 ローム株式会社 Overcurrent protection circuit
JP2022036558A (en) * 2020-08-24 2022-03-08 株式会社デンソー Drive circuit of switching element

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4553084A (en) * 1984-04-02 1985-11-12 Motorola, Inc. Current sensing circuit
JPS61261920A (en) * 1985-05-15 1986-11-20 Toshiba Corp Overcurrent protecting circuit for conductive modulation type mosfet

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4553084A (en) * 1984-04-02 1985-11-12 Motorola, Inc. Current sensing circuit
JPS61261920A (en) * 1985-05-15 1986-11-20 Toshiba Corp Overcurrent protecting circuit for conductive modulation type mosfet

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1184984A1 (en) * 2000-02-25 2002-03-06 Mitsubishi Denki Kabushiki Kaisha Power module
EP1184984A4 (en) * 2000-02-25 2002-06-05 Mitsubishi Electric Corp Power module
US6687106B1 (en) 2000-02-25 2004-02-03 Mitsubishi Denki Kabushiki Kaisha Power module
KR100423717B1 (en) * 2000-02-25 2004-03-18 미쓰비시덴키 가부시키가이샤 Power module
US6788128B2 (en) 2002-04-19 2004-09-07 Denso Corporation Overcurrent protection structure of load driving circuit
JP2007028711A (en) * 2005-07-12 2007-02-01 Fuji Electric Device Technology Co Ltd Gate driving circuit for semiconductor device
JP2010034701A (en) * 2008-07-25 2010-02-12 Denso Corp Driving circuit of power conversion circuit
JP2013169102A (en) * 2012-02-16 2013-08-29 Denso Corp Gate drive circuit
US8749279B2 (en) 2012-08-06 2014-06-10 Denso Corporation Driver apparatus for switching elements
US9461457B2 (en) 2013-04-15 2016-10-04 Denso Corporation Driver for target switching element and control system for machine using the same
CN104348338A (en) * 2013-07-30 2015-02-11 株式会社电装 Semiconductor element module and gate drive circuit
JP2015029378A (en) * 2013-07-30 2015-02-12 株式会社デンソー Semiconductor element module and gate drive circuit
CN104348338B (en) * 2013-07-30 2018-04-20 株式会社电装 Semiconductor element module and gate driving circuit
JP2016077110A (en) * 2014-10-08 2016-05-12 三菱電機株式会社 Semiconductor device
JP2019080436A (en) * 2017-10-25 2019-05-23 ローム株式会社 Overcurrent protection circuit
JP2022036558A (en) * 2020-08-24 2022-03-08 株式会社デンソー Drive circuit of switching element

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