JPS6395722A - Overcurrent protection circuit for igbt element - Google Patents

Overcurrent protection circuit for igbt element

Info

Publication number
JPS6395722A
JPS6395722A JP61241401A JP24140186A JPS6395722A JP S6395722 A JPS6395722 A JP S6395722A JP 61241401 A JP61241401 A JP 61241401A JP 24140186 A JP24140186 A JP 24140186A JP S6395722 A JPS6395722 A JP S6395722A
Authority
JP
Japan
Prior art keywords
voltage
gate
circuit
igbt
emitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61241401A
Other languages
Japanese (ja)
Inventor
Masami Ichijo
一條 正美
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP61241401A priority Critical patent/JPS6395722A/en
Publication of JPS6395722A publication Critical patent/JPS6395722A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To evade latchup of an IGBT (insulated gate bipolar mode transistor) by connecting a voltage limiting circuit between the gate and emitter so as to prevent a gate voltage from exceeding a prescribed value, thereby suppressing an abnormal current increase at the occurrence of short-circuit. CONSTITUTION:A Zener diode 4 as a voltage limit means is provided between the gate and emitter of the IGBT 1. In this case, the limit voltage of the Zener diode is selected to a value slightly exceeding the output voltage of the drive circuit. the gate of the IGBT might cause electrostatic destruction the same as a conventional power MOSFET and a Zener diode is inserted between the gate and emitter to prevent it and the function is covered in common by the Zener diode 4.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、スイッチング用半導体素子の一種であるI
GBT (In5ulated Gate Bipol
ar modeTranaiator )素子の過電流
保護回路に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an I
GBT (In5lated Gate Bipol)
The present invention relates to an overcurrent protection circuit for an ar modeTranaiator) element.

〔従来の技術〕[Conventional technology]

IGBT素子はバイポーラトランジスタの有する高耐圧
・大容量化が容易であると云う長所と、バ’7−M08
FETの有する高速なスイッチングが可能でドライブが
容易であると云う長所とを併せもつ新しいデバイスとし
て、最近注目されているもノテ、IGT 、GOMPE
T 、GEMFETまたはB1FETなどの商品名でそ
れぞれ製品化されている0 第3図にその等価回路と回路記号を示す0すなわち、I
GBTは同図(イ)に示されるように、MOS−F E
 T (F )、PNP )ランジスタTRl、 NP
N )ランジスタTR2およびベース・エミッタ間短絡
抵抗Rからなり、トランジスタTRI、TR2で構成さ
れるサイリスタ回路を内蔵している点が特徴である。
IGBT elements have the advantages of bipolar transistors, such as high breakdown voltage and easy increase in capacity, and the '7-M08
Monote, IGT, and GOMPE have recently been attracting attention as new devices that combine the advantages of FETs, such as high-speed switching and easy drive.
The equivalent circuit and circuit symbol are shown in Figure 3.
As shown in the same figure (a), the GBT is a MOS-F E
T (F), PNP) transistor TRl, NP
N) It consists of a transistor TR2 and a base-emitter shorting resistor R, and is characterized by having a built-in thyristor circuit made up of transistors TRI and TR2.

なお、同図(ロ)にIGBTの回路記号金示す。In addition, the circuit symbol gold of IGBT is shown in the same figure (b).

か\るIGBTの最大の欠点は、そのコレクタ電流が所
定値以上になるランチアップと云う現象(寄生サイリス
タがターンオンしてしまう現象)を生じ、[流をしゃ断
できなることにあると云われる。つまり、第3図(イ)
の如くサイリスタ回路全内蔵しているため、コレクタ電
流が所定t?越えるとこのサイリスタ回路がターンオン
し、IGBTがターンオフできなくなることでろる。こ
のランチアップ現象はIGBGの素子破壊に直結するの
で、これが生じないようにすることが必要である。特に
、IGBTの過電流保i!It行なう場合は、過電流を
このラッチアンプ?生じる電流(ランチアンプ電流とも
云う。)以下に抑えなければならないことから、ランチ
アンプ現象は極めて重要な指標と云うことができる。
It is said that the biggest drawback of these IGBTs is that a phenomenon called launch-up (a phenomenon in which a parasitic thyristor turns on) occurs when the collector current exceeds a predetermined value, and the flow cannot be cut off. In other words, Figure 3 (a)
Since the thyristor circuit is completely built-in, the collector current can be maintained at a predetermined value t? If it exceeds this, the thyristor circuit will turn on and the IGBT will not be able to turn off. Since this launch-up phenomenon is directly linked to the destruction of the IGBG element, it is necessary to prevent this from occurring. In particular, IGBT overcurrent protection i! If you do it, will this latch amplifier handle the overcurrent? The launch amplifier phenomenon can be said to be an extremely important indicator since the generated current (also referred to as launch amplifier current) must be suppressed to below.

第4図はIGBTの出力特性?示す特性図でおる。What is the output characteristic of IGBT in Figure 4? The characteristic diagram shown is shown below.

同図からも明らかなように、IGBTはコレクタ電流I
c が所定値を越えると、そのコレクタ・エミッタ間電
圧■αが急激に大きくなる特性を有している。このため
、IGBTの過電流の到達値はその出力特性で制限され
元値となる。したがって、IGBTをスイッチング素子
とするインバータ装置で短絡事故が発生し元場合全想定
すると、IGBTのコレクタ・エミッタ間に直流電源電
圧が印加されることになるが、このときの電流がランチ
アンプ電流全角えなければ、IGBT金ターンオフさせ
ることによって過電流保護ができる。
As is clear from the figure, the IGBT has a collector current I
When c exceeds a predetermined value, the collector-emitter voltage ■α suddenly increases. Therefore, the overcurrent value of the IGBT is limited by its output characteristics and becomes the original value. Therefore, if a short-circuit accident occurs in an inverter device that uses IGBT as a switching element, assuming all cases, a DC power supply voltage will be applied between the collector and emitter of the IGBT, and the current at this time will be the launch amplifier current. If not, overcurrent protection can be achieved by turning off the IGBT gold.

さて、第4図にはゲート電圧VGx?パラメータとする
3本の特性例を示しているが、これからも明らかなよう
に、ゲート電圧が高い穆大きな電流を流せることがわか
る。一方、現在のIGBTではこのランチアンプ電流が
極めて大きいと云う穆のレベルではなく、ゲート電圧を
成る程度以下に抑えないと、高電圧印加時のコレクタ電
流がランチアンプ電流を越えてしまうという程のレベル
におる。そこで、過電流保護を行なう場合は、ゲート電
圧全所定値以下に制限して適用せざる2得ないことにな
る。ところが、ゲート電圧を下げることは、常用するコ
レクタ11!!流斌でのオン電圧?高めることになり、
適用上好ましくない。このため。
Now, in Figure 4, the gate voltage VGx? Examples of the characteristics of three parameters are shown, and as is clear from the graph, it is clear that the higher the gate voltage, the greater the current flow. On the other hand, in current IGBTs, this launch amplifier current is not at an extremely large level, but rather at a level where the collector current when high voltage is applied will exceed the launch amplifier current unless the gate voltage is kept below a certain level. be on the level. Therefore, when performing overcurrent protection, it is necessary to limit the total gate voltage to a predetermined value or less. However, lowering the gate voltage is the commonly used collector 11! ! On voltage at Ryubin? It will increase
Unfavorable for application. For this reason.

ゲート電圧は過電流保謁が可能な範囲で、できるだけ高
く設定して用いる工うにしているのが現状である。
Currently, the gate voltage is set as high as possible within the range that allows overcurrent protection.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

ところが、実際の装置で過電流が発生すると、このとき
のゲート電圧がゲートドライブ回路1与えている電圧を
上回わることが6す、その結果。
However, when an overcurrent occurs in an actual device, the gate voltage at this time exceeds the voltage applied to the gate drive circuit 1, and as a result.

想定し元値よりも大きな電流が流れることが判明してい
る。
It has been found that a current larger than the expected original value flows.

第5図はこれ全説明するための、短絡事故時の等価回路
を示す回路図でるり、第6図はその動作?説明するtめ
の各部波形図でおる。なお、第5図において、lはIG
BT、2はオンゲート電源、3は抵抗、7aはスイッチ
、8は主回路電源でめる。
Figure 5 is a circuit diagram showing the equivalent circuit in the event of a short circuit accident to explain all of this, and Figure 6 is its operation. This is the tth waveform diagram of each part to be explained. In addition, in FIG. 5, l is IG
BT, 2 is an on-gate power supply, 3 is a resistor, 7a is a switch, and 8 is a main circuit power supply.

いま、短絡直前のIGBT lのコレクタ・エミッタ間
電圧は略Oとし、この状態でスイッチ7&が投入てれ短
絡回路が形成されると、IGBTlのコレクタ・エミッ
タ間には第6図(イ)の如きステップ状の電圧VCEが
印加される。IGBTIには各端子間に図示の如きコン
デンサが存在するので、そのゲート・コレクタ間の容t
t−ccc、ゲート・エミッタ間の容量’xcaz、コ
レクタ・エミッタ間に印加される電圧kEa  とする
と、主回路電源8の印加によりゲート電圧が次式による
分だけ、第6図(ロ)の如く上昇することになる。
Now, the voltage between the collector and emitter of IGBTl immediately before the short circuit is approximately O, and when switch 7 & is turned on in this state and a short circuit is formed, the voltage between the collector and emitter of IGBTl as shown in Fig. 6 (a) is generated. A step-like voltage VCE is applied. IGBTI has a capacitor between each terminal as shown in the figure, so the capacitance t between the gate and collector is
Assuming that t-ccc, the capacitance between the gate and emitter 'xcaz, and the voltage applied between the collector and emitter kEa, the gate voltage due to the application of the main circuit power supply 8 is calculated by the following formula, as shown in Fig. 6 (b). It will rise.

こ\で、例えばCGC/CGE = 0.01 、Ed
= 300”とすると、 Δvcgz3v の電圧上昇が生じ、その結果、グー14圧がドライブ回
路の出力電圧を上回わ9、大きなコレクタ電流が流れる
ことになる。このようなときにもランチアンプさせない
ようにするには、この電圧上昇公金考慮してドライブ回
路の出力電圧?低くしておけばよいが、このようにする
と、前述の如く常用のコレクタ電流領域でのオン電圧ま
でが高くなってしまう。
Here, for example, CGC/CGE = 0.01, Ed
= 300", a voltage rise of Δvcgz3v will occur, and as a result, the goo14 voltage will exceed the output voltage of the drive circuit9, and a large collector current will flow. Even in such a case, be careful not to use a launch amplifier. In order to achieve this, the output voltage of the drive circuit should be lowered in consideration of this voltage increase public money, but if this is done, the on-voltage in the normal collector current range will increase as described above.

一方、こf′1−までの説明ではドライブ回路側の田カ
インピーダンスが高い、すなわち第5図の抵抗3が大き
い場合?想定している。こn4;I、飼えば第5図の抵
抗3t−0とすると、ゲートな圧はドライブ回路の出力
電圧、すなわちオンゲート電源2の電圧を上回わること
はないが、IGBTではターンオフ時にもランチアンプ
すると云う現象がめり、これを避けるために50〜10
0Ωの如く比較的大きな抵抗を介してドライブしなけれ
ばならないとされていることに依る。したがって、この
程度の抵抗がおれば、ドライブ回路側は無視してゲート
電圧の上昇だけを考えれば良いことになる。
On the other hand, in the explanation up to f'1-, what if the impedance on the drive circuit side is high, that is, the resistor 3 in FIG. 5 is large? I am assuming that. If the resistor 3t-0 in Figure 5 is used, the gate voltage will not exceed the output voltage of the drive circuit, that is, the voltage of the on-gate power supply 2, but in IGBT, the launch amplifier is activated even at turn-off. Then, this phenomenon occurs, and in order to avoid this, 50 to 10
This is due to the fact that it must be driven through a relatively large resistance such as 0Ω. Therefore, if there is a resistance of this level, it is sufficient to ignore the drive circuit side and only consider the increase in gate voltage.

なお、短絡後に時間の経過と\もに、コレクタ電流が第
6図(ハ)の如く減少するのは、上述のコンデンサにぶ
る蓄積電荷が抵抗?介して放電され。
In addition, the reason why the collector current decreases as time passes after the short circuit as shown in Figure 6 (c) is that the accumulated charge in the capacitor mentioned above is due to resistance. is discharged through.

ゲート電圧がドライブ回路の出力電圧に向かって減少し
て行く念めである。
The idea is that the gate voltage decreases toward the output voltage of the drive circuit.

し九がって、この発明は過電流の到達値がドライブ回路
の出力電圧値で決まる値を越えないようにして、ドライ
ブ回路の出力電圧を高目に設定できるようにし、過電流
保@を可能としながら、常用のコレクタ電流では低いオ
ン電圧が得られる工うKすること全目的とする。
Therefore, this invention makes it possible to set the output voltage of the drive circuit to a high level by preventing the reached value of the overcurrent from exceeding the value determined by the output voltage value of the drive circuit, and thereby prevents overcurrent protection. The overall objective is to obtain a low on-state voltage with a common collector current, while still being possible.

〔問題点全解決するための手段〕[Means to solve all problems]

IGBT素子のゲート・エミッタ間に−tの間の電圧が
所定の値を越えないように制限する電圧制限回路全役け
る。
The entire voltage limiting circuit serves to limit the voltage between -t between the gate and emitter of the IGBT element so that it does not exceed a predetermined value.

〔作用〕[Effect]

上記電圧制限回路にてゲート・エミッタ間電圧をクラン
プすることにより、ゲート電圧の上昇?抑制する〇 〔実施例〕 第1図はこの発明の実施例を示す回路図でおる。
Is the gate voltage increased by clamping the voltage between the gate and emitter using the above voltage limiting circuit? 〇 [Embodiment] Fig. 1 is a circuit diagram showing an embodiment of the present invention.

同図からも明らかなように、この実施例はIGBTlの
ゲート・エミッタ間に、電圧制限手段としてツェナーダ
イオード4を設けた点が特徴である。
As is clear from the figure, this embodiment is characterized in that a Zener diode 4 is provided as a voltage limiting means between the gate and emitter of the IGBTl.

このとき、ツェナーダイオード4の制限電圧は、ドライ
ブ回路の出力電圧を僅かに上回わる程度に選ばれる。ま
た、このようなIGBTも通常のパワーMO3FETと
同じくゲートが静電破壊?生じ易く、これ全防止する目
的でケート・エミッタ間にツェナーダイオードを挿入す
ることがあるが、こoa能を第1図のツェナーダイオー
ド4で兼用することができる。
At this time, the limiting voltage of the Zener diode 4 is selected to be slightly higher than the output voltage of the drive circuit. Also, does this type of IGBT suffer from electrostatic discharge damage to the gate like normal power MO3FETs? This is likely to occur, and in order to completely prevent this, a Zener diode is sometimes inserted between the gate and the emitter, but the Zener diode 4 shown in FIG. 1 can also serve as the coa function.

第2図はこの発明の他の実施例を示す回路図でおる。こ
れは、電圧制限手段としてダイオード5とコンデンサ6
よりなるクランプ回路を設けた点が特徴である。同図の
31は抵抗を示す。
FIG. 2 is a circuit diagram showing another embodiment of the invention. This uses diode 5 and capacitor 6 as voltage limiting means.
It is characterized by the provision of a clamp circuit consisting of: 31 in the figure represents a resistor.

なお、電圧制限手段として、以上の他に非線形抵抗素子
等を用いることも可能である。
In addition to the above, it is also possible to use a nonlinear resistance element or the like as the voltage limiting means.

〔発明の効果〕〔Effect of the invention〕

この発明によれば、ゲート・エミッタ間に電圧制限回路
全接続し、ゲート電圧が所定値を越えないようにしたの
で、短絡事故発生時の異常な電流増加を抑制してIGB
Tのランチアンプを回避することができる。ま九、電圧
制限回路の動作電圧ぎりぎりにまでゲート駆動回路の出
力電圧を高められるので、常用コレクタ電流におけるオ
ン電圧を低減することができる。その結果、IGBTt
−よりオン電圧の低い、過電流保護の容易な状態で適用
することが可能となる。
According to this invention, the voltage limiting circuit is fully connected between the gate and emitter to prevent the gate voltage from exceeding a predetermined value, thereby suppressing abnormal current increase in the event of a short-circuit accident.
T's launch amplifier can be avoided. Nineteenth, since the output voltage of the gate drive circuit can be raised to the limit of the operating voltage of the voltage limiting circuit, the on-state voltage at the normal collector current can be reduced. As a result, IGBTt
-It is possible to apply it in a state where the on-state voltage is lower and overcurrent protection is easier.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の実施%1 を示す回路図、第2図は
この発明の他の実施fMJt−示す回路図、第3図はI
GBT素子の等価回路とその回路記号を説明するための
説明図、第4図はIGBTの出力特性を示す特性図、第
5図は短絡事故時の等価回路を示す′回路図、第6図は
その動作を説明するための各部波形図である。 符号説明 1・・・IGBT素子、2・・・オンゲート電源、3゜
3a・・・抵抗、4・・・ツェナーダイオード、5・・
・ダイオード、6・・・コンデンサ、7.7m・・・ス
イッチ、8・・・主回路電源、TRI・・・PNP ト
ランジスタ。 TR2・・・NPN トランジスタ、F・・・MO3F
ET%R・・・ベース・エミッタ間短絡用抵抗。 代理人 弁理士  並 木 昭 夫 代理人 弁理士  松 崎   清 第1図 第4図
FIG. 1 is a circuit diagram showing an embodiment of this invention, FIG. 2 is a circuit diagram showing another embodiment fMJt of this invention, and FIG. 3 is an I
An explanatory diagram to explain the equivalent circuit of a GBT element and its circuit symbol. Figure 4 is a characteristic diagram showing the output characteristics of the IGBT. Figure 5 is a circuit diagram showing the equivalent circuit at the time of a short circuit accident. It is a waveform diagram of each part for explaining the operation. Description of symbols 1... IGBT element, 2... On-gate power supply, 3°3a... Resistor, 4... Zener diode, 5...
・Diode, 6...Capacitor, 7.7m...Switch, 8...Main circuit power supply, TRI...PNP transistor. TR2...NPN transistor, F...MO3F
ET%R...Resistance for shorting between base and emitter. Agent Patent Attorney Akio Namiki Agent Patent Attorney Kiyoshi Matsuzaki Figure 1 Figure 4

Claims (1)

【特許請求の範囲】 1)過電流が流れたときは素子自身をターンオフさせ、
過電流をしや断して素子破壊を防止するIGBT素子の
過電流保護回路において、 該IGBT素子のゲート・エミッタ間にその間の電圧が
所定値を越えないように制限する電圧制限回路を設け、 該回路により過電流の尖頭値を抑制することを特徴とす
るIGBT素子の過電流保護回路。 2)特許請求の範囲第1項に記載のIGBT素子の過電
流保護回路において、前記電圧制限回路としてツェナー
ダイオードを用いることを特徴とするIGBT素子の過
電流保護回路。
[Claims] 1) Turn off the element itself when an overcurrent flows;
In an overcurrent protection circuit for an IGBT element that prevents element destruction by cutting off overcurrent, a voltage limiting circuit is provided between the gate and emitter of the IGBT element to limit the voltage therebetween from exceeding a predetermined value, An overcurrent protection circuit for an IGBT element, characterized in that the circuit suppresses a peak value of overcurrent. 2) The overcurrent protection circuit for an IGBT element according to claim 1, wherein a Zener diode is used as the voltage limiting circuit.
JP61241401A 1986-10-13 1986-10-13 Overcurrent protection circuit for igbt element Pending JPS6395722A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61241401A JPS6395722A (en) 1986-10-13 1986-10-13 Overcurrent protection circuit for igbt element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61241401A JPS6395722A (en) 1986-10-13 1986-10-13 Overcurrent protection circuit for igbt element

Publications (1)

Publication Number Publication Date
JPS6395722A true JPS6395722A (en) 1988-04-26

Family

ID=17073731

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61241401A Pending JPS6395722A (en) 1986-10-13 1986-10-13 Overcurrent protection circuit for igbt element

Country Status (1)

Country Link
JP (1) JPS6395722A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4839686A (en) * 1987-07-10 1989-06-13 Minolta Camera Kabushiki Kaisha Flash device
EP0388616A2 (en) * 1989-03-08 1990-09-26 Hitachi, Ltd. Overcurrent protective circuit for electrostatic self-turn-off devices
JPH03117211A (en) * 1989-09-29 1991-05-20 Toshiba Corp Drive circuit for semiconductor element
US5055721A (en) * 1989-04-13 1991-10-08 Mitsubishi Denki Kabushiki Kaisha Drive circuit for igbt device
US6009281A (en) * 1987-07-10 1999-12-28 Minolta Co., Ltd. Flash device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4839686A (en) * 1987-07-10 1989-06-13 Minolta Camera Kabushiki Kaisha Flash device
US4951081A (en) * 1987-07-10 1990-08-21 Minolta Camera Kabushiki Kaisha Flash device
US5313247A (en) * 1987-07-10 1994-05-17 Minolta Camera Kabushiki Kaisha Flash device
US6009281A (en) * 1987-07-10 1999-12-28 Minolta Co., Ltd. Flash device
EP0388616A2 (en) * 1989-03-08 1990-09-26 Hitachi, Ltd. Overcurrent protective circuit for electrostatic self-turn-off devices
US5121283A (en) * 1989-03-08 1992-06-09 Hitachi, Ltd. Overcurrent protective circuit for electrostatic self-turn-off devices
US5055721A (en) * 1989-04-13 1991-10-08 Mitsubishi Denki Kabushiki Kaisha Drive circuit for igbt device
JPH03117211A (en) * 1989-09-29 1991-05-20 Toshiba Corp Drive circuit for semiconductor element

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