JPH06291521A - High frequency multi-layer integrated circuit - Google Patents

Abstract

PURPOSE:To provide the multi-layer high frequency circuit whose miniaturization is realized. CONSTITUTION:This circuit is provided with a strip line 1 embedded in a dielectric 2 having ground electrodes 3, 4 in the upper and the lower parts, a wiring 7 and an electric circuit part 8 formed on a dielectric 5 on the upper ground electrode 3, and a via hole 6 for connecting electrically the strip line 1 and a DC bias circuit 8 by allowing them to pass through the upper ground electrode 3, and having a high frequency attenuation characteristic, therefore, it is effective for miniaturization, and also, a sneak path of a high frequency signal to a DC circuit does not exist, therefore, the performance of a high frequency characteristic is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-layered high frequency multi-layer integrated circuit which handles signals in a high frequency band.

[0002]

2. Description of the Related Art Conventionally, as a high frequency integrated circuit, a monolithic integrated circuit in which an active element and a passive component are integrally integrated on a semiconductor substrate or a dielectric substrate such as alumina is used.
A hybrid integrated circuit in which various active elements and passive components are integrated together is known. Generally, the monolithic integrated circuit has a single layer structure. In addition, in the case of using a dielectric such as an alumina substrate, it is known that the electric circuit has a multilayer structure.

[0003]

By the way, in the recent trend toward miniaturization, higher density of components is required, but in the above monolithic integrated circuit, integration in a single layer structure is required. Therefore, once the size of a part is determined, the total size is determined by how many parts are packed in the same plane. However, in a high-frequency circuit, there is a problem that it is difficult to achieve high integration at a certain density or higher because there is electromagnetic coupling through space or the substrate.

Further, in the case of a hybrid integrated circuit, it is possible to make a multilayer, but in the conventional one, since only the electric wiring is made a multilayer, it is necessary to mount the components on the surface, and it is also necessary to integrate and miniaturize. There was a problem that there was a limit to.

In general, a high-frequency circuit is apt to be electromagnetically coupled through a space, and in order to prevent it, it is necessary to take various measures to shield the so-called electromagnetic field coupling such as attaching a lid of a metal plate on the top. However, there are problems that the shape becomes complicated or large, and that the high frequency characteristics are impaired due to insufficient shielding.

In consideration of the problems of the conventional high frequency circuit, the present invention enables higher density, downsizing, and avoids deterioration of high frequency characteristics due to electromagnetic field coupling. It is intended to provide a multi-layer integrated circuit.

[0007]

SUMMARY OF THE INVENTION According to the present invention, a stripline circuit portion embedded in a dielectric having ground electrodes on the upper and lower sides, and an electric circuit portion formed on the dielectric on at least one of the ground electrodes are provided. A high-frequency multilayer integrated circuit having a via hole having a high-frequency attenuation characteristic, which electrically connects both circuit parts of the stripline circuit part and the electric circuit part through a ground electrode.

[0008]

With the above-described structure, the presence of the via hole attenuates the high frequency component of the strip line circuit portion in the via hole and reduces the high frequency component leaking to the electric circuit portion. As a result, it is possible to obtain a high-frequency multi-layer integrated circuit which has good high-frequency characteristics and can be downsized.

[0009]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a schematic sectional view showing the structure of a high frequency multi-layer integrated circuit according to Embodiment 1 of the present invention. In the figure, a stripline circuit unit 1 is embedded between two layers of dielectrics 2, 2. The upper ground electrode 3 is an upper ground electrode of the stripline circuit unit 1, and the lower ground electrode 4 is a lower ground electrode of the stripline circuit unit 1. The upper dielectric layer 5 is formed on the upper ground electrode 3.
And the via hole 6 is provided in the stripline circuit section 1
Is electrically connected to and is extended to above the upper dielectric layer 5. On the upper surface of the upper dielectric layer 5, the wiring 7 of the upper electric circuit connected to the via hole 6 is arranged. Further, on the upper surface of the upper dielectric layer 5, a DC bias circuit section 8 is provided which is connected to the wiring 7 and supplies various power supplies to a high frequency circuit section composed of individual parts. Further, an electronic component 9 such as a transistor is provided in an exposed portion in the middle of the stripline circuit unit 1.

The high frequency electric signal is input from, for example, the left side of the strip line circuit unit 1, is input to the transistor 9 provided on the exposed portion thereof, returns to the strip line circuit unit 1 again, and the signal is transmitted to the right side of the drawing. It is transmitted.
On the other hand, the signal is input to the upper electric circuit portion through the wiring 7 by the via holes 6 provided on the input side and the output side of the stripline circuit portion 1, respectively. At this time, the via hole 6 is set to have a wire diameter significantly smaller than the wire width of the stripline circuit portion 1 so that the via hole 6 effectively acts as an inductor with respect to high frequencies. As a result, the high frequency component of the stripline circuit unit 1 is attenuated in the via hole 6 and the high frequency component leaking to the upper electric circuit unit is small. Therefore, the electrostatic capacity of the high frequency shorting capacitor of the upper electric circuit unit may be reduced, or depending on the case. Could be unnecessary. As a result, by applying a DC bias from this terminal to the transistor 9, it becomes possible to supply electric power without adversely affecting the high frequency circuit.
With such a configuration, the required area of the circuit can be reduced by separating the DC bias circuit section 8, which requires an area in the high frequency circuit, from the high frequency signal transmission section and forming a multilayer. In addition, it is possible to prevent high-frequency waves from wrapping around and improve the performance of the high-frequency circuit.

In this embodiment, the diameter of the via hole is made thin so that the via hole itself functions as an inductor to have a high frequency attenuation function. By setting the length of the via hole wiring to the ground to be ¼ of the wavelength of the used high frequency, the via hole wiring becomes the same as the open circuit at the tip for high frequencies, so the same high frequency attenuation,
Alternatively, blocking characteristics were obtained.

Next, a method of manufacturing such a structure will be described. Alumina, which has excellent high-frequency characteristics as a dielectric,
A so-called green sheet having a thickness of 0.3-1 mm was processed by a method of adding a glass component and an organic material such as a binder to form a slurry and making it into a plate shape such as a doctor blade method. Next, at a predetermined portion to form a via hole, a hole is mechanically opened by a punch or the like, and a paste obtained by adding an organic substance such as a glass component and a binder to copper oxide is used as a conductor paste, and the hole is filled. It printed on the above-mentioned green sheet so that it might become a predetermined shape of an electrode, wiring, a strip line, etc. The green sheets thus formed are sequentially laminated, and 850-10
By sintering in a reducing atmosphere sufficient to reduce the copper oxide at 00 ° C., the copper oxide was reduced, and the multilayer structure shown in the example was obtained. The exposed part of the stripline circuit part was realized by making a green sheet with a space in advance when stacking the green sheets and stacking them. After that, the individual high-frequency multilayer integrated circuits of Example 1 were obtained by mounting the individual electronic components at the required locations. Copper used for electrodes, wiring, etc. made in this way has an extremely low electrical resistance and can reduce resistance loss due to electrode resistance, which is a problem in high frequency circuits, and is particularly effective for high frequency multilayer integrated circuits. Is. When copper is sintered at 1000 ° C or higher, it reacts with the surrounding dielectric or diffuses.
It is necessary to be able to sinter below 1000 degrees C,
For that purpose, it is preferable to use a mixture of alumina and glass. The sintering temperature could be lowered by increasing the amount of glass. An alternative to copper is silver. However, in this case, a silver paste obtained by mixing silver powder with glass and an organic paste was used for firing. In this case, no reducing atmosphere is required, but since the melting point of silver is lower than the melting point of copper, good characteristics were not obtained unless the firing temperature in this case was 930 ° C. or lower.

(Second Embodiment) FIG. 2 shows a second embodiment of the high frequency multi-layer integrated circuit of the present invention. In the figure, each component from 1 to 9 is the same as in the first embodiment. The difference is that
The point is that a via hole 10 for connecting them is provided between the wiring 7 and the upper ground electrode 3. And
The length from the connection point of the stripline circuit portion 1 and the via hole 6 to the upper ground electrode 3 through the new via hole 10 through a part of the via hole 6 and the wiring 7 is ¼ of the high frequency signal wavelength used. Is set to be the length of. For example, when handling a high frequency signal of 2.5 GHz, one wavelength in air is 12 cm. When an alumina-based dielectric material is used, the dielectric constant is about 9, so
When embedded in an alumina-based dielectric material, one wavelength is about 1/3 of that in air and 4 cm. Therefore, the ¼ wavelength is ¼ of that wavelength, which is about 1000 μm. Actually, it is necessary to obtain the effective permittivity in consideration of the shape of the via hole, but here, it was obtained experimentally. 2.5GH
With respect to the signal frequency of z, the dimensions actually used are as follows: the thickness between the stripline circuit portion 1 of the stripline buried dielectric 2 and the upper ground electrode 3 is 200 um, the thickness of the upper dielectric layer 5 is 200 um, The thickness of the upper ground electrode 3 portion was 10 μm. Therefore, the length of the via hole 6 is 410 μm, and the length of the via hole 10 is 200 μm. The length of the wiring portion connecting the via hole 6 and the via hole 10 was set to 300 μm. 2.5G with this size
With respect to the high frequency signal of Hz, the connection point of the via hole 6 to the strip line 1 is grounded at an equivalent equivalent of 1/4 wavelength, which is electrically the same as the open end. It was possible to prevent the signal from leaking to the DC bias circuit. Thus, by applying a DC bias to the transistor from this terminal, it becomes possible to supply electric power without adversely affecting the high frequency circuit. With such a configuration, the DC bias circuit portion, which requires an area in the high-frequency circuit, can be separated from the high-frequency signal transmission portion and multilayered to reduce the required area of the circuit. , It is possible to prevent the high frequency from wrapping around, and the performance of the high frequency circuit is improved.

In each of the first and second embodiments, the stripline circuit section has one layer, but the number of layers can be further increased to two layers or three layers to further reduce the size of a complicated circuit. Met.

[0016]

As is apparent from the above description,
The present invention is directed to a stripline circuit section embedded in a dielectric having upper and lower ground electrodes, an electric circuit section formed on the dielectric on at least one of the ground electrodes, a stripline circuit section, and an electric circuit section. Since both circuit parts are provided with a via hole having a high-frequency attenuation characteristic that is electrically connected through the ground electrode, it is effective for downsizing and does not sneak a high-frequency signal to the DC circuit. Therefore, it has an advantage that the performance of high frequency characteristics can be improved.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of a high frequency multilayer integrated circuit according to a first embodiment of the present invention.

FIG. 2 is a schematic sectional view of a high frequency multilayer integrated circuit according to a first embodiment of the present invention.

[Explanation of symbols]

 1 Stripline Circuit Section 2 Stripline Embedded Dielectric 3 Upper Grounding Electrode 4 Lower Grounding Electrode 5 Upper Dielectric Layer 6 Via Hole with Transmission High Frequency Attenuation Property 7 Wiring 8 Surface Electric Circuit Section Composed of Individual Electronic Components 9 Transistor 10 Grounding Beer hall

Claims (8)

[Claims] 1. A stripline circuit section embedded in a dielectric having upper and lower ground electrodes, an electric circuit section formed on the dielectric on at least one of the ground electrodes, the stripline circuit section, and A high-frequency multi-layer integrated circuit comprising: a via hole having high-frequency attenuation characteristics, which electrically connects both circuit parts of the electric circuit part through the ground electrode. 2. The length of the wiring of the via hole from the strip line connecting portion to the high frequency grounding portion of the electric circuit portion,
The high frequency multi-layer integrated circuit according to claim 1, wherein the high frequency multi-layer integrated circuit exhibits high frequency attenuation characteristics when the wavelength is 1/4 of the used wavelength. 3. The high frequency multi-layer integrated circuit according to claim 1, wherein the via hole exhibits a high frequency attenuation characteristic when the via hole is shaped to operate as an inductor at a used wavelength. 4. The dielectric mainly comprises alumina and glass,
2. The high frequency multilayer integrated circuit according to claim 1, wherein the material of the embedded metal is copper or silver. 5. The high frequency multi-layer integrated circuit according to claim 1, wherein individual components are mounted on the electric circuit portion formed on the outermost layer dielectric. 6. The high-frequency multilayer integrated circuit according to claim 1, wherein a part of the stripline circuit portion is exposed and individual parts are mounted on the exposed portion. 7. A stripline circuit portion embedded in a dielectric having upper and lower ground electrodes, a wiring formed on the dielectric on at least one of the ground electrodes, and an electric circuit connected to the wiring. A first via hole electrically connecting the stripline circuit portion and the wiring through the ground electrode, and a second via hole electrically connecting the wiring and the upper ground electrode. High-frequency multi-layer integrated circuit featuring. 8. The total length from the first via hole to the second via hole through the wiring is 1/1 of the high-frequency signal wavelength used.
A high frequency multi-layer integrated circuit, which realizes high frequency attenuation by having a length of 4.