JP2019080037A - Printed circuit board - Google Patents

Abstract

To provide a printed circuit board.SOLUTION: A printed circuit board according to one aspect of the present invention comprises: a first substrate 100 which is formed from multiple first insulator layers 110 and has a cavity C open upward; and a second substrate 200 which is formed from multiple second insulator layers 210 and located in the cavity C. The dielectric loss tangent of the second insulator layers 210 is less than the dielectric loss tangent of the first insulator layers 110.SELECTED DRAWING: Figure 2

Description

  The present invention relates to printed circuit boards.

  Each country, including Korea and Japan, is focusing on technology development for commercialization of 5G worldwide. For stable signal transmission in the 10 GHz or higher frequency band of the 5G era, conventional materials and structures may be difficult to cope with. For this reason, new material and structure development for transmitting the received high frequency signal to the main board without loss is required.

Korean Published Patent No. 10-2011-0002112

  An object of the present invention is to provide a printed circuit board with reduced signal loss.

  According to one aspect of the present invention, a first substrate formed of a plurality of first insulating layers and having a cavity open to the upper side, and a plurality of second insulating layers formed of the first substrate and located in the cavity A printed circuit board comprising: two substrates, wherein the dielectric loss tangent of the second insulating layer is smaller than the dielectric loss tangent of the first insulating layer.

1 is a view showing a terminal to which a printed circuit board according to an embodiment of the present invention is applied. 1 is a view showing a terminal to which a printed circuit board according to an embodiment of the present invention is applied. FIG. 2 is a view showing a printed circuit board according to an embodiment of the present invention. FIG. 7 is a view showing a printed circuit board according to another embodiment of the present invention. FIG. 6 is a view illustrating a method of manufacturing a printed circuit board according to an embodiment of the present invention. It is a figure which shows a part of FIG. It is a figure for demonstrating the manufacturing method of the printed circuit board which concerns on the other Example of this invention. It is a figure for demonstrating the manufacturing method of the printed circuit board which concerns on the other Example of this invention. It is a figure for demonstrating the manufacturing method of the printed circuit board which concerns on the other Example of this invention.

  The embodiments of the printed circuit board according to the present invention will be described in detail with reference to the accompanying drawings, and the same or corresponding components will be denoted by the same reference numerals as in the description with reference to the accompanying drawings. Duplicate descriptions will be omitted.

  Further, the terms "first", "second" and the like used in the following are merely identification symbols for distinguishing identical or corresponding components, and identical or corresponding components are first, second, etc. It is not limited by the term of.

  In addition, “coupling” does not mean only when each component is in direct physical contact in the contact relationship between each component, and another configuration is interposed between each component, Other configurations are used as an inclusive concept until each component is in contact.

  FIGS. 1a and 1b are views showing a terminal 1 to which a printed circuit board according to an embodiment of the present invention is applied.

  Referring to FIGS. 1a and 1b, a printed circuit board 10 is incorporated in a terminal 1 of an electronic device. Here, the printed circuit board 10 may be a main board. The printed circuit board 10 is composed of the first substrate 100 and the second substrate 200, and the dielectric loss of the second substrate 200 is smaller than the dielectric loss of the first substrate 100. In particular, the dielectric loss tangent of the second insulating layer 210 forming the second substrate 200 is smaller than the dielectric loss tangent of the first insulating layer 110 forming the first substrate 100.

  The first substrate 100 occupies most of the printed circuit board 10 which is a main board, and the second substrate 200 is formed only in a predetermined area of the printed circuit board 10. In particular, the first element 300, the second element 400, and the third element 410 can be mounted on the printed circuit board 10. The first element 300 is an RF processor, and the second element 400 is an IF process. Can be a department. The second substrate 200 may be formed at the periphery of the connection circuit 500 connecting the first element 300 and the second element 400.

  FIG. 1 a shows a state in which the first element 300 and the second element 400 are mounted on the printed circuit board 10, and FIG. 1 b shows a state in which the first element 300 and the second element 400 are mounted on the printed circuit board 10. The mounting area 300 ′ of the first element 300 and the mounting area 400 ′ of the second element 400 are shown.

  Referring to FIG. 1 b, the second substrate 200 is formed at the periphery of the connection circuit 500 connecting the first element 300 and the second element 400. A high frequency signal of 10 GHz or more may flow through the connection circuit 500 connecting the first element 300 and the second element 400. Therefore, signal loss can be reduced by arranging an insulating layer with a small dielectric loss tangent around the connection circuit 500 through which a high frequency signal flows, and cost can be reduced by minimizing the use of an insulating layer with a small dielectric loss tangent. The effect of reduction can be obtained.

  1a and 1b, although the connection circuit 500 is illustrated as being exposed to the outside for the sake of convenience, the connection circuit 500 may be embedded inside the second substrate 200 and may not be exposed to the outside.

  Hereinafter, a printed circuit board according to an embodiment of the present invention will be specifically described with reference to FIGS. 1 a to 3.

  FIG. 2 is a view showing a printed circuit board according to an embodiment of the present invention.

  Referring to FIG. 2, a printed circuit board according to an embodiment of the present invention includes a first substrate 100 and a second substrate 200. Here, the dielectric loss of the second substrate 200 is smaller than the dielectric loss of the first substrate 100. Dielectric loss means the power loss that occurs when an alternating electric field is formed in the dielectric.

  The first substrate 100 is formed of a plurality of first insulating layers 110, and includes a cavity C opened to the upper side. That is, the cavity C penetrates two or more layers located on the top of the plurality of first insulating layers 110.

  The second substrate 200 is inserted into the cavity C of the first substrate 100. The second substrate 200 is formed of a plurality of second insulating layers 210.

  The first insulating layer 110 and the second insulating layer 210 are formed of various resins such as a thermosetting resin and a thermoplastic resin. Specifically, an epoxy resin, a polyimide, or the like can be used. Here, as the epoxy resin, for example, naphthalene type epoxy resin, bisphenol A type epoxy resin, bisphenol F type epoxy resin, novolac type epoxy resin, cresol novolac type epoxy resin, rubber modified epoxy resin, cyclic aliphatic type epoxy resin Although a resin, a silicone type epoxy resin, a nitrogen-type epoxy resin, a phosphorus type epoxy resin etc. are mentioned, it is not limited to these.

  The first insulating layer 110 and the second insulating layer 210 may be made of a resin containing a fiber reinforcing material such as glass fiber, or may be filled with an inorganic filler. Examples of the former include prepreg (PPG), and examples of the latter include build up films such as ABF (Ajinomoto Build-up Film).

  The dielectric dissipation factor (Df) of the second insulating layer 210 is smaller than the dielectric loss tangent of the first insulating layer 110. The dielectric loss tangent represents the degree of dielectric loss, and the dielectric loss tangent is proportional to the dielectric loss.

  The resin of the second insulating layer 210 may have the same main material as the resin of the first insulating layer 110. For example, as the first insulating layer 110 and the second insulating layer 210, PPG, ABF, or PI can be used. However, the dielectric loss tangent of the second insulating layer 210 may be about 0.003, and this can be realized by adjusting the type and content of the materials (filler etc.) contained in PPG, ABF, PI.

  The second insulating layer 210 may be formed of a material completely different from that of the first insulating layer 110. In particular, the second insulating layer 210 has an LCP (Liquid) having a dielectric loss tangent of 0.002 to 0.0001. It can be formed by at least one of Crystal Polymer, PTFE (Polytetrafluoroethylene), PPE (Polyphenylene Ether), COP (Cyclo Olefin Polymer), and PFA (Perfluoroalkoxy).

  On the other hand, the dielectric constant (Permittivity) and dielectric constant (Dielectric Constant, Dk) of the second insulating layer 210 are smaller than the dielectric constant and dielectric constant of the first insulating layer 110.

  Although a plurality of first insulating layers 110 constituting the first substrate 100 are formed, in consideration of the number of layers of the second substrate 200 inserted into the first substrate 100, at least three or more first insulating layers 110 are provided. It can be formed. For example, when the printed circuit board is a main board incorporated in a smartphone, the first substrate 100 may be formed of eleven first insulating layers 110 and may be twelve layers based on the circuit layer. .

  The second substrate 200 is a substrate inserted into the cavity C of the first substrate 100. A plurality of second insulating layers 210 constituting the second substrate 200 are also formed. As described above, the position of the second substrate 200, that is, the position of the cavity C of the first substrate 100 is determined by the position of the connection circuit 500. That is, the second substrate 200 is formed at the periphery of the connection circuit 500. Also, the position of the connection circuit 500 is determined by the positions of the first element 300 and the second element 400 and the connection via 510. A specific description of this will be described later.

  The thickness of the second substrate 200 may be thinner than the thickness of the first substrate 100. The thickness of the second substrate 200 may be substantially the same as the thickness of the cavity C of the first substrate 100. Further, the number of first insulating layers 110 through which the cavity C penetrates is the same as the number of second insulating layers 210 constituting the second substrate 200. That is, the cavity C may penetrate the N first insulating layers 110, and the second substrate 200 may include the N second insulating layers 210. Here, the respective thicknesses of the first insulating layer 110 and the second insulating layer 210 may be substantially the same. Thus, the upper surface of the first substrate 100 and the upper surface of the second substrate 200 can be substantially coplanar.

  The first element 300, the second element 400, the third element 410, and the like are mounted on the printed circuit board.

  The first element 300 includes an antenna and can process a high frequency signal such as RF. For example, the first element 300 may be an RF processor. The RF processor removes noise, amplifies the magnitude, downconverts the frequency of the signal received by the antenna, and transmits the signal to the second element 400. Conversely, the signal received from the second element 400 can be amplified and transmitted to the antenna. The RF processing unit can be configured by antenna, amp, mixer, filter, and the like. The first element 300 may be plural. In the terminal 1 of FIGS. 1a and 1b, the first element is configured of two (300, 300a).

  The second element 400 is connected to the first element 300 and processes an intermediate frequency. The second element 400 may be an IF processing unit. The second element 400 can exchange signals with the first element 300, and the signal exchanged between the first element 300 and the second element 400 can have a frequency of 10 GHz or higher, for example, about 11.2. It may be a 2 GHz high frequency. On the other hand, while the signal received by the second element 400 from the first element 300 is analog, the signal processed by the second element 400 and transmitted to the third element 410 is a digital signal.

  Even if a plurality of first elements 300 are formed, one second element 400 can be formed. In the terminal 1 of FIGS. 1a and 1b, the first element 300 is composed of two, but the second element 400 is composed of one. However, the present invention does not exclude that a plurality of second elements 400 are formed.

  The third element 410 is connected to the second element 400, and the third element 410 processes a low frequency base band signal.

  The first element 300 is mounted on the first substrate 100 or the second substrate 200. The second element 400 is also mounted on the first substrate 100 or the second substrate 200. The first element 300 and the second element 400 may be mounted on the first substrate 100 and the second substrate 200. That is, the first element 300 and the second element 400 may be mounted on at least one of the first substrate 100 and the second substrate 200.

  On the other hand, the third element 410 is mounted on the first substrate 100, and if the signal loss ratio in the circuit connected to the third element 410 for processing low frequency is not large, the third element 410 is not related to the second substrate 200. It can be mounted on the substrate 100. The mounting of the element can be performed through a bonding agent such as a solder ball on a pad 220 ′ formed on the insulating layer located on the top layer of the first substrate 100 or the second substrate 200.

  The first element 300 and the second element 400 are electrically connected to each other through the connection circuit 500. As mentioned above, the signal transmitted through the coupling circuit 500 can have a frequency of 10 GHz or more.

  When a plurality of first elements 300 are formed, a plurality of connection circuits 500 are required because each connection circuit 500 for connecting each first element 300 to one second element 400 is required. Can. On the other hand, there may be a plurality of connection circuits 500 that connect one first element 300 and one second element 400. Thus, when there are a plurality of connection circuits 500, they may be formed in the same layer or another layer of the second substrate 200 so as not to overlap each other between the connection circuits 500.

  In addition, the first element 300 and the second element 400 are connected to the connection circuit 500 via the connection via 510. The connection vias 510 may be formed through the first substrate 100 or the second substrate 200. There may be a plurality of connection vias 510 connecting each element and the connection circuit 500.

  At least a portion of the connection circuit 500 is formed in the second substrate 200. The second insulating layer 210 is formed to cover at least a part of the connection circuit 500. For example, at least a portion of the connection circuit 500 may be located between the two second insulating layers 210.

  Here, “part” means a predetermined area in one connection circuit 500 or means one (or several) connection circuits 500 selected from the plurality of connection circuits 500. Can. Also, it may mean both the former and the latter.

  That is, “at least a part of the connection circuit 500 is formed in the second substrate 200” means a part or all of one connection circuit 500 that connects one first element 300 and the second element 400. May be formed in the second substrate 200.

  Alternatively, “at least a portion of the connection circuit 500 is formed in the second substrate 200” means that a plurality of connection circuits 500 are formed and one or more connection circuits selected from the plurality of connection circuits 500 are selected. This may mean that 500 is formed in the second substrate 200. Alternatively, all the above two meanings can be included.

  On the other hand, portions of the connection circuit 500 that are not formed in the second substrate 200 or those that are not formed in the second substrate 200 among the plurality of connection circuits 500 are located in the first substrate 100.

  Hereinafter, when (1) the entire region of one connection circuit 500 is formed in the second substrate 200, (2) only a partial region of the one connection circuit 500 is formed in the second substrate 200. In the case (3), selected ones of the plurality of connection circuits 500 are separately formed in the second substrate 200. However, the present invention is not limited to these cases.

  In the case of (1), the case where the connecting circuit 500 is singular will first be described. That is, the case where both the first element 300 and the second element 400 are formed one by one will be described first. However, the description is equally applicable to the case where there are a plurality of first elements 300.

  The first element 300 and the second element 400 are mounted on the printed circuit board, and the first element 300 and the second element 400 are connected to the connection circuit 500 through the connection via 510 formed in the 'second substrate 200'. In this case, the connection circuit 500 is covered by the second insulating layer 210 of the second substrate 200, and the entire area of the connection circuit 500 is located in the second substrate 200.

  In other words, the cavity C of the first substrate 100 is formed to include all of the connection via 510 area and the connection circuit 500 area, whereby the second substrate 200 also includes all of the connection via 510 area and the connection circuit 500 area. Formed to cover. This can be understood by FIG. 1b. However, although one connection via 510 is shown in each of the first element 300 and the second element 400 in FIG. 1 b, a plurality of connection vias 510 of the first element 300 and the second element 400 are formed. It is possible to

  If there are a plurality of first elements 300, a plurality of second substrates 200 may be formed, and one second substrate 200 may include one connection circuit 500.

  In the case of (2), a case where one first element 300 and one second element 400 are formed will be described first, but the same applies to the case where a plurality of first elements 300 are provided.

  Although not shown in the drawing, when the connection via 510 connecting the first element 300 and the connection circuit 500 penetrates the 'first substrate 100', the second substrate 200 is formed around the connection circuit 500. The portion of the connection circuit 500 may be out of the area of the second substrate 200 because it is not formed around the connection via 510. However, even in this case, most of the area of the connection circuit 500 is located in the second substrate 200, so that a part of the signal loss reduction effect can be exhibited.

  The same applies to the case where the connection via 510 connecting the second element 400 and the connection circuit 500 penetrates the first substrate 100, and at least one of the plurality of connection vias 510 connecting each element and the connection circuit 500. The same applies to the case where one passes through the first substrate 100.

  In the case of (3), it is premised that a plurality of connection circuits 500 are formed, and this is a case where a plurality of first elements 300 are formed, for example, which will be described with reference to FIGS. 1a and 1b. Can.

  In FIG. 1a and FIG. 1b, two first elements 300 are mounted on a printed circuit board, and there are also two connecting circuits 500 for connecting each first element 300 and second element 400. However, the second substrate 200 is formed only at the periphery of one connection circuit 500. The other connection circuits 500 are formed in the first substrate 100.

  Among the plurality of connection circuits 500, only the connection circuits 500 formed to have a predetermined length or more may be formed in the second substrate 200. The length of the connection circuit 500 is determined according to the distance between the first element 300 and the second element 400. As the length of the connection circuit 500 is longer, the loss ratio of the signal transmitted through the connection circuit 500 is larger. Therefore, only when the length of the connection circuit 500 is a predetermined length or more, the periphery thereof is By arranging the second substrate 200 in the portion, cost can be reduced.

  Here, the 'predetermined length' can be changed by the user, and can be set in consideration of the signal loss rate due to the circuit length.

  1a and 1b, the length of one of the two connection circuits 500, 500 'is longer than the length of the other 500'. This is because one first element 300 is farther from the second element 400 than the other one 300a. Therefore, only the long connection circuit 500 is included in the second substrate 200, and the short connection circuit 500 ′ is included in the first substrate 100. Of course, the long connecting circuit 500 is formed to be longer than the above-mentioned 'predetermined length'. In addition, the short connection circuit 500 'is formed to be less than the' predetermined length '. In other words, the second substrate 200 is positioned only with respect to the periphery of the connection circuit 500 which is longer than the predetermined length.

  The first substrate 100 can include a first circuit 120. The first circuit 120 may be formed on each layer of the plurality of first insulating layers 110. First vias 130 are formed between the first circuits 120 formed in different layers to enable interlayer connection.

  The first circuit 120 may not be connected to the connection circuit 500, but the first circuit 120 may be connected to the connection circuit 500 depending on circuit design.

  Meanwhile, a portion of the first circuit 120 'may be exposed through the cavity C, and may be in contact with the second insulating layer 210 when the second substrate 200 is inserted into the cavity C.

  The second substrate 200 can include a second circuit 220. The second circuit 220 may be formed on each layer of the plurality of second insulating layers 210. Second vias 230 are formed between the second circuits 220 formed in different layers to enable interlayer connection. Also, a portion of the second circuit located at the top becomes the pad 220 ′.

  Although the second circuit 220 may not be connected to the connection circuit 500, the second circuit 220 may be connected to the connection circuit 500 depending on the circuit design. In FIG. 2 and FIG. 3, the second via 230 is not connected to the connection circuit 500 but is shown by a dotted line.

  The first circuit 120 and the second circuit 220 can be connected to each other. The first circuit 120 and the second circuit 220 can be connected via a second via 230 penetrating the second substrate 200.

  Meanwhile, the printed circuit board according to an embodiment of the present invention may further include a solder resist layer 600, and the solder resist layer 600 may be formed on the upper surface of the first substrate 100 and the upper surface of the second substrate 200. The solder resist layer 600 may be formed on the first substrate 100 and the second substrate 200.

  FIG. 3 is a view showing a printed circuit board according to another embodiment of the present invention.

  Referring to FIG. 3, a printed circuit board according to another embodiment of the present invention is similar to the printed circuit board according to an embodiment of the present invention described with reference to FIG. Further include.

  The adhesive layer A may be interposed between the first substrate 100 and the second substrate 200. The thickness of the adhesive layer A may be much thinner than the thickness of one of the second insulating layers 210 so as not to affect the entire thickness of the second substrate 200. The dielectric loss tangent of the adhesive layer A may be smaller than the dielectric loss tangent of the first insulating layer 110 so that the adhesive layer A does not affect the dielectric loss of the second substrate 200. The dielectric loss tangent of the adhesive layer A may be similar to the dielectric loss tangent of the second insulating layer 210.

  Of the first circuits 120 of the first substrate 100, the first circuit 120 ′ located at the bottom of the cavity C may penetrate the adhesive layer A.

  The other descriptions are the same as those of the printed circuit board according to the embodiment of the present invention, and will be omitted.

  FIG. 4 shows a method of manufacturing a printed circuit board according to an embodiment of the present invention, and FIG. 5 is a view showing a part of FIG. 4, in particular (i) of FIG.

  In the method of manufacturing a printed circuit board according to an embodiment of the present invention, the first substrate 100 is manufactured by a double-sided laminating method using a core, the first substrate 100 is manufactured sequentially, and the second substrate 200 is manufactured sequentially.

  Specifically, referring to FIG. 4, as shown in (a) to (h), a part of the first substrate 100 is manufactured by a double-sided laminating method. In particular, the first circuit 120 and the first via 130 are formed by a tenting method using a raw material in which the metal foil M is laminated on both sides of the first insulating layer 110. When forming the first circuit 120 by the tenting method, the etching resist R corresponding to the region of the first circuit 120 can be used. However, the first circuit 120 and the first via 130 can be formed by other methods than the tenting.

  In the present embodiment, the first substrate 100 of the printed circuit board is composed of a total of nine first insulating layers 110, and the second substrate 200 is composed of two second insulating layers 200, and is based on the circuit layer. It will be a 10-layer printed circuit board.

  First, the first substrate 100 is manufactured from the five first insulating layers 110 (Fig. (H)), and then the second insulating layer 210 constituting the second substrate 200 is laminated (Fig. (I)). Thereafter, a general first insulating layer 110 is laminated on the lower part of the first substrate 100 partially manufactured by applying the double-sided laminating method, and a hole corresponding to the second insulating layer 210 is provided on the upper part. The insulating layer 110 is stacked (Fig. (J)). The first circuit 120, the second circuit 220, and the connection circuit 500 are simultaneously formed (Fig. (K)), and the first insulating layer 110 and the second insulating layer 210 are laminated again by the same method (Fig. (L)). After that, as necessary, the first circuit 120, the second circuit 220, the first via 130, and the second via 230 are formed together with the connection via 510 (Fig. (M)). Finally, the solder resist layer 600 is laminated on the first substrate 100 and the second substrate 200, and a part of the first circuit 120 or the second circuit 220 at the top is a pad 220 ′ for mounting the element. Exposed (Figure (m)).

  FIG. 5 shows a transfer method in which the second insulating layer 210 is stacked on the partially manufactured first substrate 100. The second insulating layer 210 is temporarily attached to the lower surface of the roll-shaped transfer sheet P by a release layer or the like, and the transfer sheet P rotates while being in contact with the partially manufactured first substrate 100. The second insulating layer 210 can be stacked on the first substrate 100 by moving and separating the release layer. The transfer sheet P can be formed of a bendable material such as PI or PET.

  The production of printed circuit boards including transfer for process efficiency can be carried out in strip units and finally be separated into units.

  6 to 8 are views showing a method of manufacturing a printed circuit board according to another embodiment of the present invention.

  In a method of manufacturing a printed circuit board according to another embodiment of the present invention, after the first substrate 100 and the second substrate 200 are separately manufactured through separate processes, the second substrate 200 is placed in the cavity C of the first substrate 100. Adopt a method to insert.

  FIG. 6 shows a process of manufacturing the second substrate 200.

  Connecting circuits 500, connecting vias 510, and a second circuit 220 and a second via (not shown) are formed by a method such as tenting on a raw material in which metal foils M are laminated on both sides of the second insulating layer 210 (Figures (a) to (g)). The second insulating layer 210 is further stacked in one layer, and the adhesive layer A is formed on the lower portion of the second substrate 200 as necessary. The second substrate 200 thus manufactured can be temporarily attached to the lower surface of the transfer sheet P using a release layer.

  FIG. 7 shows a process of manufacturing the first substrate 100.

  The first circuit 120 and the first via 130 are formed in a raw material in which the metal foil M is laminated on both surfaces of the first insulating layer 110 by a method such as tenting using the etching resist R. This process can be repeated until the desired number of layers is reached (Figures (a) to (g)). This is similar to the method of manufacturing the printed circuit board described with reference to FIG. Thereafter, the first insulating layer 110 in which the holes are formed is stacked on the upper side, and the general first insulating layer 110 in which the holes are not formed is stacked on the lower side to form the cavity C (Fig. (H)). If necessary, it is also possible to adopt a method in which the processing step of the cavity C is performed after laminating the general first insulating layer 110 on both sides.

  FIG. 8 shows a process of inserting the second substrate 200 into the cavity C of the first substrate 100.

  The step of inserting the second substrate 200 into the cavity C of the first substrate 100 can be performed by a transfer method. The second substrate 200 temporarily attached to the lower surface of the transfer sheet P by the release layer is transferred into the cavity C of the first substrate 100. At this time, the first substrate 100 and the second substrate 200 may be adhered by the adhesive layer A.

  Thereafter, a process of forming the solder resist layer 600 may be added.

  While one embodiment of the present invention has been described above, those skilled in the art can add or change components without departing from the concept of the present invention described in the claims. The present invention can be variously modified and changed by deleting, adding, etc., and this can also be included within the scope of the present invention.

REFERENCE SIGNS LIST 1 terminal 10 printed circuit board 100 first substrate 110 first insulating layer 120, 120 ′ first circuit 130 first via C cavity 200 second substrate 210 second insulating layer 220 second circuit 220 ′ pad 230 second via A Adhesive layer 300 1st element 400 2nd element 410 3rd element 500 connection circuit 510 connection via 600 solder resist layer M metal foil P transfer paper R etching resist

Claims (20)

A first substrate formed of a plurality of first insulating layers and having a cavity open to the upper side;
And a second substrate formed of a plurality of second insulating layers and located in the cavity.
A printed circuit board, wherein a dielectric loss tangent of the plurality of second insulating layers is smaller than a dielectric loss tangent of the plurality of first insulating layers.   The printed circuit board according to claim 1, wherein a dielectric constant of the plurality of second insulating layers is smaller than a dielectric constant of the plurality of first insulating layers. A first element and a second element mounted on at least one of the first substrate and the second substrate;
A coupling circuit for electrically coupling the first element and the second element;
The printed circuit board according to claim 1, wherein at least a part of the connection circuit is formed in the second substrate. The first element and the second element are connected to the connection circuit through a connection via,
The printed circuit board of claim 3, wherein the connection via is formed in the second substrate.   The printed circuit board according to claim 4, wherein the entire connection circuit is formed in the second substrate. The first substrate includes a first circuit,
The printed circuit board according to any one of claims 3 to 5, wherein the first circuit and the connection circuit are not electrically connected. The second substrate further includes a second circuit not electrically connected to the connection circuit,
The printed circuit board according to claim 6, wherein the second circuit is connected to the first circuit.   The printed circuit board according to claim 6, wherein a part of the first circuit contacts the plurality of second insulating layers. The first element includes an RF processor.
The printed circuit board according to any one of claims 3 to 8, wherein the second element includes an IF processing unit.   The printed circuit board according to any one of claims 3 to 9, wherein the signal transmitted through the connection circuit has a frequency of 10 GHz or more. A plurality of connection circuits are formed,
The printed circuit board according to any one of claims 3 to 10, wherein at least one of the plurality of connection circuits is formed in the second substrate. A plurality of first elements are formed,
The printed circuit board according to claim 11, wherein each of the first elements is connected to the second element by a respective connection circuit.   The printed circuit board according to claim 11, wherein a connection circuit formed to have a predetermined length or more among the plurality of connection circuits is formed in the second substrate.   The printed circuit board of claim 13, wherein a connection circuit formed less than a predetermined length among the plurality of connection circuits is formed in the first substrate.   The printed circuit board according to any one of claims 1 to 14, wherein an upper surface of the first substrate and an upper surface of the second substrate are located on the same plane.   The printed circuit board according to any one of claims 1 to 15, further comprising a solder resist layer formed on the upper surface of the first substrate and the upper surface of the second substrate.   The printed circuit board according to any one of claims 1 to 16, wherein a thickness of the first substrate is thicker than a thickness of the second substrate.   The printed circuit board according to any one of claims 1 to 17, wherein an adhesive layer is interposed between the first substrate and the second substrate.   The printed circuit board according to claim 18, wherein the dielectric loss tangent of the adhesive layer is smaller than the dielectric loss tangent of the plurality of first insulating layers. The plurality of first insulating layers are formed of epoxy resin,
The second insulating layers are formed of at least one of LCP (Liquid Crystal Polymer), PTFE (Polytetrafluoroethylene), PPE (Polyphenylene Ether), COP (Cyclo Olefin Polymer), and PFA (Perfluoroalkoxy). The printed circuit board according to any one of 1 to 19.