JP3676885B2 - Chip type multilayer filter - Google Patents

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JP3676885B2
JP3676885B2 JP19669796A JP19669796A JP3676885B2 JP 3676885 B2 JP3676885 B2 JP 3676885B2 JP 19669796 A JP19669796 A JP 19669796A JP 19669796 A JP19669796 A JP 19669796A JP 3676885 B2 JP3676885 B2 JP 3676885B2
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conductor
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chip
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type multilayer
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JPH1041701A (en
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謙二 遠藤
敏之 阿部
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TDK Corp
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TDK Corp
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【0001】
【発明の属する技術分野】
本発明は、チップ型積層フィルタ、詳しくは、携帯電話等の移動体通信機器に使用される一素子で二つの通過帯域を有するチップ型積層フィルタに関する。
【0002】
【従来の技術】
近年の携帯電話等の爆発的普及により、使用される周波数帯域(例えば、PDC方式では800MHz帯(送信は810〜826MHz、受信は940〜956MHz)1.5GHz帯(送信は1.429〜1.453GHz、受信は1.477〜1.501GHz)、PHS方式では1.9GHz帯(送受信とも1.895〜1.918GHz))に不足を生じ、1台の携帯通信端末で2つのシステムの周波数帯域(例えば、上記したようにPDC方式で使用される800MHz帯とPHS方式で使用される1.9GHz帯)に対応することが必要となり、従来は各々の周波数帯域に対応する2つのフィルタを使用している。
【0003】
また、従来の携帯電話等に使用されるRFフィルタは主にTEMモード共振を利用した誘電体フィルタが用いられている。ところで、TEMモード共振を使用したフィルタは、所定の仕様値に設定された一つの通過帯域だけではなく、その周波数の略奇数倍の周波数の通過帯域を持つ。これは、アンプの歪みにより発生する不要輻射(主に3倍の周波数)をそのまま通過させてしまうため問題となる。このような問題を解決するために、例えば特公平1−34402号公報に記載されているように略奇数倍の通過帯を高域にずらしたり、略奇数倍の周波数を除去するためのLPF(ローパスフィルタ)を組み込むことにより対処している。
【0004】
一方で、近年、携帯電話等の移動体通信機器は小型化軽量化が進んでおり、誘電体フィルタもまた小型化が進んでいる。中でも誘電体と電極を交互に積層したチップ型のフィルタは特に小型化が可能であり現在実用化されている。
【0005】
【発明が解決しようとする課題】
しかしながら、以上のような従来の誘電体フィルタには、以下のような問題がある。
【0006】
(1)2つのシステムに対応するためには2つのフィルタが必要でありセットの小型化の妨げとなることや、この2つのフィルタを互いに接続するために更にインピーダンスの整合手段が必要である。
【0007】
(2)必要に応じて所望周波数の略奇数倍の周波数帯を抑圧する何らかの手段を別途必要としていた。
【0008】
そこで、本発明は一素子で携帯電話で使用される2つの通過帯域を持ち、所望周波数の略奇数倍の周波数帯を抑圧し、かつ、表面実装や小型化に有利である積層チップ型の新規な誘電体フィルタを提供するものである。
【0009】
【課題を解決するための手段】
具体的には、下記(1)〜(3)の構成により達成される。
【0010】
(1)誘電体の内部に共振器となる中心導体が少なくとも2層にわたり構成され、各層の導体の間に内部接地電極を、外部表面に外部接地電極を有するチップ型積層フィルタにおいて、
短絡端側の導体を挟む接地電極の間隔を、積層面に平行な他の導体を挟む接地電極の間隔に比べて狭くすることにより、基本波及び基本波の3倍より低い周波数帯域からなる任意の2つの通過帯域を持たせたことを特徴とするチップ型積層フィルタ。
【0011】
(2)誘電体の内部に共振器となる中心導体が少なくとも2層にわたり構成され、各層の導体の間に内部接地電極を、外部表面に外部接地電極を有するチップ型積層フィルタにおいて、
短絡端側の導体の幅を、積層面に平行な他の導体の幅に比べて広くすることにより、基本波及び基本波の3倍より低い周波数帯域からなる任意の2つの通過帯域を持たせたことを特徴とするチップ型積層フィルタ。
【0012】
(1)、(2)の構成により、通常、問題となる設定周波数の約3倍の周波数を低周波数側にシフトさせることができ、任意の2つの通過帯域を持つフィルタを得ることができる。
【0013】
(3)短絡端側の導体の幅を、積層面に平行な他の導体の幅に比べて広くすることを特徴とする(1)に記載のチップ型積層フィルタ。
【0014】
これは、(1)(2)に比べて設定周波数の約3倍の周波数を低周波数側にさらに大きくシフトさせることができ、より近接した2つの通過帯域を持つフィルタを得ることができる。
【0015】
【発明の実施の形態】
以下に図1〜図3を参照しながら、本発明に係るチップ型積層フィルタについて具体的に説明する。
【0016】
図1(a)に本発明に係るチップ型積層フィルタの中心導体及び内部電極の構成の概略を表す透視斜視図を示す。共振器となる中心導体は導体11と導体12とそれら導体を接続する導体13とからなる。導体11は積層面に対し平行に構成され、下記に示すように外部接地電極(図1(b)22)に接続し短絡している(以下、短絡端側の導体とする)。また、導体12は積層面に対し平行に構成され、開放端を有しており(以下、開放端側の導体とする)、さらに、該導体は信号入出力引出電極31を介して信号入出力端子電極(図1(b)32)に接続するような構成となり、かつ、相互の共振器の結合を形成すべく容量結合が起こるような形状に調整されている。ここで、図中で信号入出力引出電極31は開放端側の導体12とコンデンサを介するように形成されているが、中心導体から直接引出電極を形成してもよい。直接引き出す場合は、必ず開放端側の導体から引き出さなければならないと言うことはなく、通過帯域の広さやインピーダンス等の設計上の制約から開放端側の導体以外の導体から引き出す場合もある。導体13は積層面に対し垂直に構成され、積層面に平行に構成された導体を接続するものである。導体11と導体12の間には、それら導体と平行になるように内部接地電極21が設けられる。3層にわたり中心導体を形成する場合は、さらに内部接地電極が必要である。よって、積層面に平行な導体の層間には必ず接地電極を有することになる。図1(b)に同図(a)に係るチップ型積層フィルタの外観斜視図を示す。外部には信号入出力引出電極に接続される信号入出力端子電極32並びに、内部接地電極21及び導体11に接続し、信号入出力端子電極32に接続されない外部接地電極22が素体を覆うように形成される。ここで、信号入出力端子電極32は外部接地電極22と導通しないよう形成されればどのような形であってもよい。例えば、同図や図3(b)に示すように、外部接地電極に覆われない部分に信号入出力引出電極を引き出して、外部接地電極に接続しないように信号入出力端子電極を形成したり、図2(b)に示すように、信号入出力引出電極の引き出される部分に凸部を設け、外部接地電極に接続しないように凸部の一部に信号入出力端子電極を設けてもよい。
【0017】
本発明に係るチップ型積層フィルタは、以上のようなチップ型積層フィルタにおいて更に以下の特徴を有する。
【0018】
図1(c)に同図(a)のA−A’線断面図を示す。上記導体11を挟む接地電極の間隔、即ち、短絡端側の導体11に隣接し対向する、内部接地電極21と外部接地電極面22bとの間隔t1は、上記導体12を挟む接地電極の間隔、即ち、短絡端側の導体以外の導体で積層面に対して平行の導体である導体12に隣接し対向する、内部接地電極21と外部接地電極面22aとの間隔t2に比べて狭い構成になっている。これより、本発明に係るフィルタは、共振器を構成する中心導体のうち導体11、即ち短絡端側の導体においてはその特性インピーダンスを低く、中心導体のうち導体12、即ち開放端側の導体においてはその特性インピーダンスを高くすることができ、基本波の1/4波長に対するよりも、基本波の高次モードである3/4波長に対する波長短縮効果を大きく持たせることができるため、高次モードを基本波の3倍よりも大幅に低い周波数に設定することが可能となる。よって、本来不要共振として問題となるべき基本波の約3倍にある高次モードの共振を2倍前後の周波数に設定することができる。
【0019】
特に、中心導体が2層にわたり構成されている場合において、短絡端側の接地電極の間隔をtaとし開放端側の接地電極の間隔をtbとしたときにta/tbが1/10〜1/2にあることが好ましい。これは、ta/tbが1/10に満たないものはフィルタの外形設計値等の制約(現状では小型化が進み、3〜5mm×3〜5mm×2mm程度の寸法にする必要がある)から図1(c)のt1を形成する誘電体の薄層化が必要となり、Q値等の電気特性や製造上に問題を生ずるからである。一方、ta/tbが1/2を超えるものは高次モードの共振に対する波長短縮効果がほとんど現れず、アンプの歪みにより発生する不要輻射を通過させるという問題を生ずるからである。
【0020】
また、図2(a)に示すような共振器を構成する中心導体のものも同様な効果がある。即ち、同図では短絡端側の導体14の幅w3が短絡端側の導体以外の導体で積層面に平行の導体である導体15の幅w4(但し、容量結合が起こるような形状に調整された部分は含まず)よりも広くなっている。これは、前記の導体を挟む接地導体の間隔が異なることにより特性インピーダンスを変えることができるように、これもまた、導体幅の広い短絡端側の導体においてはその特性インピーダンスが低くなり、導体幅の狭い開放端側の導体においてはその特性インピーダンスが高くなる。これより、基本波の1/4波長に対するよりも基本波の高次モードである3/4波長に対する波長短縮効果を大きく持たせることができるため、高次モードを基本波の3倍よりも大幅に低い周波数に設定することが可能となる。ここで、図2(b)には同図(a)に係るチップ型積層フィルタの外観斜視図を、図2(c)に同図(a)のB−B’線断面図を示す。また、同図中16は導体、23は内部接地電極、24は外部接地電極、33は信号入出力引出電極、34は信号入出力端子電極である。
【0021】
特に、中心導体が2層にわたり構成されている場合において、短絡端側の導体幅をwaとし開放端側の導体幅をwbとしたときのwa/wbが2〜3であることが好ましい。これは、wa/wbが2に満たないものは高次モードの共振に対する波長短縮効果がほとんど現れず、アンプの歪みにより発生する不要輻射を通過させるという問題を生じる。また、wa/wbが3を超えるものはフィルタの外形設計値等の制約(現状では小型化が進み、3〜5mm×3〜5mm×2mm程度の寸法にする必要がある)から導体幅を極めて細くする必要があり、Q値等の電気特性や製造上に問題を生ずるからである。
【0022】
さらに、図3に示すように、前記二つの構成を組み合わせること、即ち、短絡端側の導体を挟む接地電極の間隔(図3(c)t5)が、短絡端側の導体以外の導体で積層面に対して平行の導体を挟む接地電極の間隔(図3(c)t6)に比べ狭く、かつ、短絡端側の導体17の幅が、短絡端側の導体以外の導体で積層面に対して平行の導体である導体18の幅に比べ広くなるように設定することにより、前記構成に比べ更に2つの周波数帯域を近づけることができる。ここで、図3(b)には本同図(a)に係るチップ型積層フィルタの外観斜視図を、図3(c)に同図(a)のC−C’線断面図を示す。また、同図中19は導体、25は内部接地電極、26は外部接地電極、35は信号入出力引出電極、36は信号入出力端子電極である。
【0023】
次に、本発明の製造方法を図4の分解斜視図を参照しながら説明する。
【0024】
ドクターブレード法等により所定の厚さに成形した誘電体シートに、例えば図4中、11、12、21、31に示すような所定の形状となるように電極ペーストをスクリーン印刷法により印刷し、誘電体シート及び上記電極ペーストが印刷された誘電体シートを所定の構成となるように積層する。ここで、同図中の最上部のシートは他のシートに比べて厚いが、同図中4に示すように所定の厚さの誘電体シートを目的の厚さとなるような枚数だけ積層して作製したものである。積層面に対して垂直となる導体13は、誘電体シートに予めスルーホールを設けて積層後に電極ペーストを注入することにより形成する。その後所定の大きさに切断後、外部接地電極として、積層面に対し平行な外部表面及び積層面に対して垂直な外部表面に所定の形状となるように電極ペーストを、信号入出力端子電極32を所定の位置に印刷したものを焼成する。また、積層面に対し平行な外部接地電極は内部接地電極のように電極を印刷した誘電体シートを積層することにより構成してもよい。さらに、信号入出力端子電極32は、外部接地電極を印刷後焼成した後にゴム転写等により電極ペーストを塗布し焼付けしてもよい。ここで、シート工法において説明したが、印刷工法においても製造できることはいうまでもない。
【0025】
使用される誘電体は一般的な高周波用の誘電体(誘電率、Q値が高く、温度特性の良好なもの)であれば特に限定はない。例えばBaTiO3系等である。しかし、電極と同時焼成するために、導体材料よりも低い温度で焼結が可能でなければならない。中心導体や電極を形成するための前記電極ペーストの導電性材料もまた一般的な高周波用のものであれば特に限定はない。例えば、Ag、Au、Cu、Ag−Pd等が使用される。また、チップ型フィルタを構成する誘電体の層はセラミックに限らず高周波用樹脂系の基板であっても良い。この場合は導体や電極は銅箔等により形成される。
【0026】
以上に中心電極が2層にわたり構成しているものについて説明したが、3層以上にわたり構成されるものについても、短絡端側の導体を挟む接地電極の間隔が、積層面に平行な他の導体を挟む接地電極の間隔に比べて狭くすることにより、または、短絡端側の導体の幅が、他の導体の幅に比べて広くすることにより、基本波及び基本波の3倍より低い周波数帯域からなる任意の2つの通過帯域に設定できることはいうまでもない。
【0027】
【実施例】
以下、本発明の具体的実施例を示す。
【0028】
(実施例1)
実施例1の試料として、図1に示す構成のチップ型フィルタを前記の通りのシート工法により作製した。得られたチップ型積層フィルタの形状は5mm×5mm×1.8mmであり、使用した誘電体の誘電率εrは92である。また、中心導体及び電極を形成する導電性材料はAgを使用した。共振器を形成する導体の上下に位置する接地電極の間隔は、短絡端側(図1(c)t1)で0.2mm、開放端側(図1(c)t2)で1.6mmである。また、導体幅は、短絡端側(図1(a)w1)、開放端側(図1(a)w2)共に0.5mmである。また、比較例として、共振器を形成する導体の上下に位置する接地電極の間隔を開放端側、短絡端側で共に同一間隔(0.9mm)にした以外は実施例1と同一の構成としたものも作製した。
【0029】
図5に本実施例の電気的特性を、図10に比較例の電気的特性を示す。各グラフにおいてX軸は周波数をY軸は減衰量を示す。これより、比較例では、第二の通過帯は第一の通過帯の約930MHzの約3倍にあたる約2800MHzにあるが、本実施例では、第二の通過帯は約1950MHzと、第一の通過帯が約950MHzの約2倍にあることがわかる。これより、短絡端側の接地電極の間隔を開放端側の接地電極の間隔より狭くすることのみで、基本波の1/4波長に対するよりも、基本波の高次モードである3/4波長に対する波長短縮効果を大きく持たせることができることがわかる。また、本実施例の構成によりPDC方式及びPHS方式の2つのシステムに対応することが可能である。
【0030】
(実施例2)
また、実施例2の試料として、短絡端側の接地電極の間隔と開放端側の接地電極の間隔との比を1:2に設定した以外は実施例1と同一の構成としたチップ型積層フィルタを作製し、その電気的特性を図6に示す。これより、第二の通過帯は2150MHzと第一の通過帯の約800MHzの約2.7倍となり、基本波の1/4波長に対するよりも、基本波の高次モードである3/4波長に対する波長短縮効果を大きく持たせることができることがわかる。
【0031】
(実施例3)
実施例3の試料として、図2に示す構成のチップ型フィルタを前記の通りのシート工法により作製した。共振器を形成する導体のうち、短絡端側の導体幅(図2(a)w3)が1.1mmで開放端側の導体幅(図2(a)w4)が0.5mmである。また、各導体の上下に位置する接地電極の間隔は短絡端側(図2(c)t3)、開放端側(図2(c)t4)で共に同一間隔(0.9mm)である。製造方法、使用材料等は実施例1と同様である。
【0032】
図7に本実施例の電気的特性を示す。これより、第一の通過帯が約830MHzに、第二の通過帯が約2150MHzにあり、3倍の共振周波数を2.6倍程度にシフトすることができ十分な効果が得られている。
【0033】
(実施例4)
また、実施例4の試料として、短絡端側の導体幅のと開放端側の導体幅との比を2:1に設定した以外は実施例3と同一の構成としたチップ型積層フィルタを作製し、その電気的特性を図8に示す。これより、第二の通過帯は2700MHzと第一の通過帯の約1000MHzの約2.7倍となり、基本波の1/4波長に対するよりも、基本波の高次モードである3/4波長に対する波長短縮効果を大きく持たせることができることがわかる。
【0034】
(実施例5)
実施例5の試料として図3示す構成のチップ型フィルタを前記の通りのシート工法により作製した。これは、実施例1と実施例2を組み合わせた構成となっている。即ち、共振器を構成する導体を挟む接地電極の間隔が実施例1、2と同様に開放端側と短絡端側では異なって設定され、更に実施例3、4と同様に短絡端側の導体の幅が開放端側に比べて広く形成されている。具体的には、共振器を形成する導体の上下に位置する接地電極の間隔は短絡端側(図3(c)t5)で0.2mmであり、開放端側(図3(c)t6)で1.6mmであり、さらに短絡端側の導体幅(図3(a)w5)が1.1mmで開放端側の導体幅(図3(a)w6)が0.5mmである。製造方法、使用材料等は前記各実施例と同様である。
【0035】
図9に本実施例の電気的特性を示す。これより、第一の通過帯が約900MHzに、第二の通過帯が約1500MHzにあることがわかる。前記2つの実施例に比べ基本波の高次モードである3/4波長に対する波長短縮効果を大きくすることができるために、PDC方式で使用される二つの周波数帯域を持たせることができる。
【0036】
【発明の効果】
以上説明した本発明に係るチップ型積層フィルタは次のような効果がある。
【0037】
(1)一素子で二種のシステムに対応できるため従来フィルタが2ヶ必要であったところが1ヶで済むために、セットの小型化が可能である。
【0038】
(2)一素子で2ヶ分のフィルタの働きをするため2ヶのフィルタを接続するための整合回路は不要となる。
【0039】
(3)第二の通過帯域の周波数は第一の通過帯域の周波数の2倍程度に設定されており第一の通過帯域の約3倍には通過帯域がなく、更に第二の通過帯域の約3倍にも通過帯域がないので3倍高調波対策が不要である。
【図面の簡単な説明】
【図1】 (a)は本発明に係るチップ型積層フィルタの中心導体及び内部電極の構成の概略の一例を表す透視斜視図である。(b)は同図(a)に係るチップ型積層フィルタの外観斜視図である。(c)は同図(a)のA−A’線断面図である。
【図2】 (a)は本発明に係るチップ型積層フィルタの中心導体及び内部電極の構成の概略の一例を表す透視斜視図である。(b)は同図(a)に係るチップ型積層フィルタの外観斜視図である。(c)は同図(a)のB−B’線断面図である。
【図3】 (a)は本発明に係るチップ型積層フィルタの中心導体及び内部電極の構成の概略の一例を表す透視斜視図である。(b)は同図(a)に係るチップ型積層フィルタの外観斜視図である。(c)は同図(a)のC−C’線断面図である。
【図4】 本発明に係るチップ型積層フィルタの分解斜視図である。
【図5】 実施例1に係るチップ型積層フィルタの電気特性を示す図である。
【図6】 実施例2に係るチップ型積層フィルタの電気特性を示す図である。
【図7】 実施例3に係るチップ型積層フィルタの電気特性を示す図である。
【図8】 実施例4に係るチップ型積層フィルタの電気特性を示す図である。
【図9】 実施例5に係るチップ型積層フィルタの電気特性を示す図である。
【図10】 比較例に係るチップ型積層フィルタの電気特性を示す図である。
【符号の説明】
11、14、17;短絡端側の導体
12、15、18;開放端側の導体(短絡端側以外の導体)
13、16、19;導体(積層面に垂直な導体)
21、23、25;内部接地電極
22、24、26、22a、22b;外部接地電極
31、33、35;信号入出力引出電極
32、34、36;信号入出力端子電極
4;誘電体シート
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a chip-type multilayer filter, and more particularly to a chip-type multilayer filter having two passbands as one element used in mobile communication equipment such as a mobile phone.
[0002]
[Prior art]
Due to the explosive spread of mobile phones and the like in recent years, the frequency band used (for example, 800 MHz band in the PDC system (transmission is 810 to 826 MHz, reception is 940 to 956 MHz), 1.5 GHz band (transmission is 1.429 to 1. 453 GHz, reception 1.477 to 1.501 GHz), and 1.9 GHz band (1.895 to 1.918 GHz for both transmission and reception) in the PHS system) and the frequency band of two systems with one mobile communication terminal (For example, as described above, the 800 MHz band used in the PDC system and the 1.9 GHz band used in the PHS system) are required, and conventionally, two filters corresponding to each frequency band are used. ing.
[0003]
In addition, dielectric filters using TEM mode resonance are mainly used as RF filters used in conventional mobile phones and the like. By the way, a filter using TEM mode resonance has not only one pass band set to a predetermined specification value, but also a pass band having a frequency that is substantially an odd multiple of that frequency. This is a problem because unnecessary radiation (mainly three times the frequency) generated by amplifier distortion is passed as it is. In order to solve such a problem, for example, as described in Japanese Examined Patent Publication No. 1-33402, an LPF for shifting an approximately odd multiple pass band to a high frequency range or removing an approximately odd multiple frequency ( This is addressed by incorporating a low-pass filter.
[0004]
On the other hand, in recent years, mobile communication devices such as mobile phones have been reduced in size and weight, and dielectric filters have also been reduced in size. In particular, a chip-type filter in which dielectrics and electrodes are alternately stacked can be particularly downsized and is currently in practical use.
[0005]
[Problems to be solved by the invention]
However, the conventional dielectric filter as described above has the following problems.
[0006]
(1) In order to support two systems, two filters are required, which hinders the downsizing of the set, and impedance matching means is further required to connect the two filters to each other.
[0007]
(2) If necessary, some means for suppressing a frequency band that is approximately an odd multiple of the desired frequency is separately required.
[0008]
Therefore, the present invention provides a novel multilayer chip type that has two passbands used in a mobile phone with one element, suppresses a frequency band that is approximately an odd multiple of a desired frequency, and is advantageous for surface mounting and miniaturization. A dielectric filter is provided.
[0009]
[Means for Solving the Problems]
Specifically, it is achieved by the following configurations (1) to (3).
[0010]
(1) In a chip-type multilayer filter in which a center conductor serving as a resonator is formed in at least two layers inside a dielectric, and an internal ground electrode is provided between conductors of each layer, and an external ground electrode is provided on an external surface.
Arbitrary frequency band lower than three times the fundamental wave and fundamental wave by narrowing the distance between the ground electrodes sandwiching the short-circuit-end-side conductor as compared with the distance between the ground electrodes sandwiching another conductor parallel to the laminated surface A chip-type multilayer filter characterized by having two pass bands.
[0011]
(2) In a chip-type multilayer filter in which a central conductor serving as a resonator is formed in at least two layers inside a dielectric, an internal ground electrode is provided between conductors of each layer, and an external ground electrode is provided on an external surface.
By making the width of the conductor on the short-circuited end side wider than the width of other conductors parallel to the laminated surface, it has any two passbands consisting of a fundamental wave and a frequency band lower than three times the fundamental wave. A chip-type multilayer filter characterized by the above.
[0012]
With the configurations (1) and (2), it is possible to shift a frequency that is approximately three times the set frequency in question to the low frequency side, and it is possible to obtain a filter having any two pass bands.
[0013]
(3) The chip-type multilayer filter according to (1), wherein the width of the conductor on the short-circuit end side is made wider than the width of another conductor parallel to the laminated surface.
[0014]
As compared with (1) and (2), the frequency about three times the set frequency can be further shifted to the low frequency side, and a filter having two closer passbands can be obtained.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
The chip-type multilayer filter according to the present invention will be specifically described below with reference to FIGS.
[0016]
FIG. 1A is a perspective view schematically showing the configuration of the center conductor and internal electrodes of the chip-type multilayer filter according to the present invention. A central conductor serving as a resonator includes a conductor 11, a conductor 12, and a conductor 13 connecting the conductors. The conductor 11 is configured in parallel to the laminated surface, and is short-circuited (hereinafter referred to as a short-circuit side conductor) connected to the external ground electrode (FIG. 1B) 22 as shown below. The conductor 12 is configured in parallel to the laminated surface and has an open end (hereinafter referred to as an open end side conductor). The conductor is further connected to a signal input / output via a signal input / output lead electrode 31. It is configured to be connected to the terminal electrode (FIG. 1 (b) 32), and is adjusted to have a shape in which capacitive coupling occurs to form mutual resonator coupling. Here, in the figure, the signal input / output lead electrode 31 is formed so as to pass through the conductor 12 and the capacitor on the open end side, but the lead electrode may be formed directly from the center conductor. When directly pulling out, it is not always necessary to pull out from the conductor on the open end side, and it may be pulled out from a conductor other than the conductor on the open end side due to design restrictions such as the width of the passband and impedance. The conductor 13 is configured to be perpendicular to the laminated surface and connects the conductors formed parallel to the laminated surface. An internal ground electrode 21 is provided between the conductor 11 and the conductor 12 so as to be parallel to the conductors. When the central conductor is formed over three layers, an internal ground electrode is further required. Therefore, a ground electrode is always provided between the layers of the conductor parallel to the laminated surface. FIG. 1B shows an external perspective view of the chip-type multilayer filter according to FIG. Externally, the signal input / output terminal electrode 32 connected to the signal input / output lead electrode, the internal ground electrode 21 and the conductor 11 are connected, and the external ground electrode 22 not connected to the signal input / output terminal electrode 32 covers the element body. Formed. Here, the signal input / output terminal electrode 32 may have any shape as long as it is formed so as not to be electrically connected to the external ground electrode 22. For example, as shown in FIG. 3 or FIG. 3B, the signal input / output lead electrode is drawn out to a portion not covered by the external ground electrode, and the signal input / output terminal electrode is formed so as not to be connected to the external ground electrode. As shown in FIG. 2B, a convex portion may be provided in a portion where the signal input / output lead electrode is drawn, and a signal input / output terminal electrode may be provided in a part of the convex portion so as not to be connected to the external ground electrode. .
[0017]
The chip type multilayer filter according to the present invention further has the following characteristics in the above chip type multilayer filter.
[0018]
FIG. 1C shows a cross-sectional view taken along line AA ′ of FIG. The distance between the ground electrodes sandwiching the conductor 11, that is, the distance t 1 between the internal ground electrode 21 and the external ground electrode surface 22 b adjacent to and facing the conductor 11 on the short-circuit end side is the distance between the ground electrodes sandwiching the conductor 12. That is, a configuration that is narrower than the interval t 2 between the internal ground electrode 21 and the external ground electrode surface 22a that is adjacent to and faces the conductor 12 that is a conductor other than the short-circuit-end-side conductor and is parallel to the laminated surface. It has become. Accordingly, the filter according to the present invention has a low characteristic impedance in the conductor 11, that is, the short-circuit end side conductor among the central conductors constituting the resonator, and in the conductor 12, that is, the open-end side conductor among the center conductors. Can increase its characteristic impedance, and can have a greater wavelength shortening effect for the 3/4 wavelength, which is the higher order mode of the fundamental wave, than for the 1/4 wavelength of the fundamental wave. Can be set to a frequency significantly lower than three times the fundamental wave. Therefore, it is possible to set the resonance of the higher order mode, which is about three times the fundamental wave, which should be a problem as an unnecessary resonance, to a frequency around twice.
[0019]
In particular, when the center conductor is formed of two layers, when the distance between the ground electrodes on the short-circuit end side is t a and the distance between the ground electrodes on the open end side is t b , t a / t b is 1 / It is preferable that it exists in 10-1 / 2. This is because when the value of t a / t b is less than 1/10, there is a restriction on the external design value of the filter (currently miniaturization has progressed, and the size needs to be about 3 to 5 mm × 3 to 5 mm × 2 mm. 1), it is necessary to reduce the thickness of the dielectric forming t 1 in FIG. 1C, which causes problems in electrical characteristics such as the Q value and in manufacturing. On the other hand, if t a / t b exceeds ½, the wavelength shortening effect on the higher-order mode resonance hardly appears, and there arises a problem of passing unnecessary radiation generated by amplifier distortion.
[0020]
The same effect can be obtained with the central conductor constituting the resonator as shown in FIG. That is, in this figure, the width w 3 of the conductor 14 on the short-circuit end side is the width w 4 of the conductor 15 that is a conductor other than the conductor on the short-circuit end side and is parallel to the laminated surface (however, in a shape that causes capacitive coupling to occur). It is wider than the adjusted part. This also means that the characteristic impedance of the conductor on the short-circuited end side with a large conductor width is low, so that the characteristic impedance can be changed by changing the distance between the ground conductors sandwiching the conductor. The narrower open end side conductor has a higher characteristic impedance. As a result, the wavelength shortening effect for the 3/4 wavelength, which is the higher order mode of the fundamental wave, can be made larger than that for the 1/4 wavelength of the fundamental wave, so the higher order mode is significantly larger than 3 times the fundamental wave. It is possible to set a low frequency. Here, FIG. 2B shows an external perspective view of the chip-type multilayer filter according to FIG. 2A, and FIG. 2C shows a cross-sectional view taken along line BB ′ of FIG. In the figure, 16 is a conductor, 23 is an internal ground electrode, 24 is an external ground electrode, 33 is a signal input / output lead electrode, and 34 is a signal input / output terminal electrode.
[0021]
In particular, when the central conductor is composed of two layers, w a / w b is 2 to 3 when the conductor width on the short-circuit end side is w a and the conductor width on the open end side is w b. Is preferred. This causes a problem that when w a / w b is less than 2, the wavelength shortening effect on the resonance of the higher-order mode hardly appears, and unnecessary radiation generated by amplifier distortion is allowed to pass. Also, when w a / w b exceeds 3, the width of the conductor due to restrictions such as the external design value of the filter (currently downsizing is required and the size needs to be about 3-5 mm × 3-5 mm × 2 mm) This is because it is necessary to make the thickness extremely small, which causes problems in electrical characteristics such as the Q value and manufacturing.
[0022]
Further, as shown in FIG. 3, the two structures are combined, that is, the distance between the ground electrodes sandwiching the conductor on the short-circuit end side (FIG. 3 (c) t 5 ) is a conductor other than the conductor on the short-circuit end side. distance of the ground electrodes sandwiching the parallel conductors to the stacking surface smaller than in the (FIG. 3 (c) t 6), and the width of the conductor 17 of the short-circuit end side, the laminated surface of a conductor other than the conductor of the short-circuit end side By setting the width to be wider than the width of the conductor 18 which is a parallel conductor, two frequency bands can be made closer to those of the above configuration. Here, FIG. 3B is an external perspective view of the chip-type multilayer filter according to FIG. 3A, and FIG. 3C is a cross-sectional view taken along the line CC ′ of FIG. In the figure, 19 is a conductor, 25 is an internal ground electrode, 26 is an external ground electrode, 35 is a signal input / output lead electrode, and 36 is a signal input / output terminal electrode.
[0023]
Next, the manufacturing method of the present invention will be described with reference to the exploded perspective view of FIG.
[0024]
On the dielectric sheet molded to a predetermined thickness by a doctor blade method or the like, an electrode paste is printed by a screen printing method so as to have a predetermined shape as shown in FIG. 4, for example, 11, 12, 21, 31 in FIG. The dielectric sheet and the dielectric sheet printed with the electrode paste are laminated so as to have a predetermined configuration. Here, the uppermost sheet in the figure is thicker than the other sheets, but as shown in FIG. 4, a predetermined number of dielectric sheets are laminated so as to have the desired thickness. It was produced. The conductor 13 perpendicular to the laminated surface is formed by previously providing a through hole in the dielectric sheet and injecting an electrode paste after the lamination. Then, after cutting to a predetermined size, an electrode paste is formed as an external ground electrode so as to have a predetermined shape on an external surface parallel to the laminated surface and an external surface perpendicular to the laminated surface. Is printed at a predetermined position. Further, the external ground electrode parallel to the laminated surface may be constituted by laminating dielectric sheets on which electrodes are printed, like the internal ground electrode. Further, the signal input / output terminal electrode 32 may be baked by applying an electrode paste by rubber transfer or the like after printing and baking the external ground electrode. Here, although it demonstrated in the sheet construction method, it cannot be overemphasized that it can manufacture also in a printing construction method.
[0025]
The dielectric used is not particularly limited as long as it is a general high-frequency dielectric (having a high dielectric constant and Q value and good temperature characteristics). For example, BaTiO 3 type. However, it must be possible to sinter at a lower temperature than the conductor material in order to co-fire with the electrode. The conductive material of the electrode paste for forming the central conductor and the electrode is not particularly limited as long as it is a general high-frequency material. For example, Ag, Au, Cu, Ag-Pd, etc. are used. The dielectric layer constituting the chip type filter is not limited to ceramic, but may be a high-frequency resin-based substrate. In this case, the conductor and the electrode are formed of copper foil or the like.
[0026]
Although the center electrode has been described as having two layers as described above, other conductors in which the gap between the ground electrodes sandwiching the conductor on the short-circuited end side is parallel to the laminated surface also for those having three or more layers. The frequency band is lower than three times the fundamental wave and the fundamental wave by narrowing the gap between the ground electrodes sandwiching the gap, or by making the width of the conductor on the short-circuited end side wider than the width of the other conductors. Needless to say, any two passbands can be set.
[0027]
【Example】
Specific examples of the present invention will be described below.
[0028]
(Example 1)
As a sample of Example 1, a chip-type filter having the configuration shown in FIG. 1 was produced by the sheet method as described above. The shape of the obtained chip-type multilayer filter is 5 mm × 5 mm × 1.8 mm, and the dielectric constant εr of the dielectric used is 92. Further, Ag was used as the conductive material for forming the central conductor and the electrode. The distance between the ground electrodes positioned above and below the conductor forming the resonator is 0.2 mm on the short-circuit end side (FIG. 1 (c) t 1 ) and 1.6 mm on the open end side (FIG. 1 (c) t 2 ). It is. The conductor width is 0.5 mm on both the short-circuit end side (FIG. 1 (a) w 1 ) and the open end side (FIG. 1 (a) w 2 ). Further, as a comparative example, the same configuration as in Example 1 except that the distance between the ground electrodes positioned above and below the conductor forming the resonator is the same distance (0.9 mm) on the open end side and the short-circuit end side. Also made.
[0029]
FIG. 5 shows the electrical characteristics of this example, and FIG. 10 shows the electrical characteristics of the comparative example. In each graph, the X axis represents frequency and the Y axis represents attenuation. Thus, in the comparative example, the second passband is at about 2800 MHz, which is about three times the 930 MHz of the first passband, but in this example, the second passband is about 1950 MHz, It can be seen that the passband is about twice as high as about 950 MHz. Thus, the 3/4 wavelength which is a higher order mode of the fundamental wave than the quarter wavelength of the fundamental wave is obtained only by making the distance between the ground electrodes on the short-circuit end side smaller than the distance between the ground electrodes on the open end side. It can be seen that the effect of shortening the wavelength can be greatly increased. In addition, the configuration of this embodiment can support two systems of the PDC system and the PHS system.
[0030]
(Example 2)
Further, as a sample of Example 2, a chip-type laminate having the same configuration as Example 1 except that the ratio of the distance between the ground electrodes on the short-circuit end side and the distance between the ground electrodes on the open end side was set to 1: 2. A filter is produced and its electrical characteristics are shown in FIG. As a result, the second passband is about 2.7 times as high as 2150 MHz and about 800 MHz of the first passband, and the 3/4 wavelength which is the higher order mode of the fundamental wave than to the 1/4 wavelength of the fundamental wave. It can be seen that the effect of shortening the wavelength can be greatly increased.
[0031]
Example 3
As a sample of Example 3, a chip type filter having the configuration shown in FIG. 2 was produced by the sheet method as described above. Of the conductors forming the resonator, the conductor width on the short-circuit end side (FIG. 2 (a) w 3 ) is 1.1 mm and the conductor width on the open end side (FIG. 2 (a) w 4 ) is 0.5 mm. . The distance between the ground electrodes located above and below each conductor is the same (0.9 mm) on both the short-circuited end side (FIG. 2 (c) t 3 ) and the open end side (FIG. 2 (c) t 4 ). . The manufacturing method, materials used, and the like are the same as in Example 1.
[0032]
FIG. 7 shows the electrical characteristics of this example. As a result, the first passband is about 830 MHz and the second passband is about 2150 MHz, so that the triple resonance frequency can be shifted to about 2.6 times, and a sufficient effect is obtained.
[0033]
(Example 4)
Further, as a sample of Example 4, a chip-type multilayer filter having the same configuration as that of Example 3 except that the ratio of the conductor width on the short-circuit end side and the conductor width on the open end side was set to 2: 1 was manufactured. The electrical characteristics are shown in FIG. As a result, the second passband is 2700 MHz, which is about 2.7 times as high as the first passband, about 1000 MHz, and the 3/4 wavelength which is the higher order mode of the fundamental wave than the 1/4 wavelength of the fundamental wave. It can be seen that the effect of shortening the wavelength can be greatly increased.
[0034]
(Example 5)
As a sample of Example 5, a chip-type filter having the configuration shown in FIG. 3 was produced by the sheet method as described above. This is a combination of the first and second embodiments. That is, the distance between the ground electrodes sandwiching the conductor constituting the resonator is set differently on the open end side and the short-circuit end side as in the first and second embodiments, and the conductor on the short-circuit end side as in the third and fourth embodiments. Is formed wider than the open end side. Specifically, the distance between the ground electrodes located above and below the conductor forming the resonator is 0.2 mm on the short-circuited end side (FIG. 3 (c) t 5 ), and the open end side (FIG. 3 (c) t 6 ) 1.6 mm, the conductor width on the short-circuit end side (FIG. 3 (a) w 5 ) is 1.1 mm, and the conductor width on the open end side (FIG. 3 (a) w 6 ) is 0.5 mm. is there. The manufacturing method, materials used, and the like are the same as those in the above embodiments.
[0035]
FIG. 9 shows the electrical characteristics of this example. From this, it can be seen that the first passband is at about 900 MHz and the second passband is at about 1500 MHz. Since the wavelength shortening effect for the 3/4 wavelength, which is the higher order mode of the fundamental wave, can be increased as compared with the two embodiments, two frequency bands used in the PDC method can be provided.
[0036]
【The invention's effect】
The chip type multilayer filter according to the present invention described above has the following effects.
[0037]
(1) Since one element can be used for two types of systems, only one filter is required for two conventional filters, so the set can be downsized.
[0038]
(2) Since one element functions as two filters, a matching circuit for connecting two filters becomes unnecessary.
[0039]
(3) The frequency of the second pass band is set to about twice the frequency of the first pass band, and there is no pass band in about three times the first pass band. Since there is no pass band as much as about 3 times, it is not necessary to take measures against 3rd harmonics.
[Brief description of the drawings]
FIG. 1A is a transparent perspective view showing an example of a schematic configuration of a center conductor and internal electrodes of a chip-type multilayer filter according to the present invention. (B) is an external perspective view of the chip-type multilayer filter according to FIG. (C) is the sectional view on the AA 'line of the same figure (a).
FIG. 2A is a transparent perspective view showing an example of a schematic configuration of a central conductor and internal electrodes of a chip-type multilayer filter according to the present invention. (B) is an external perspective view of the chip-type multilayer filter according to FIG. (C) is the BB 'sectional view taken on the line of the figure (a).
FIG. 3A is a transparent perspective view showing an example of a schematic configuration of a center conductor and internal electrodes of a chip-type multilayer filter according to the present invention. (B) is an external perspective view of the chip-type multilayer filter according to FIG. (C) is CC 'sectional view taken on the line of the figure (a).
FIG. 4 is an exploded perspective view of a chip-type multilayer filter according to the present invention.
5 is a graph showing electrical characteristics of the chip-type multilayer filter according to Example 1. FIG.
6 is a graph showing electrical characteristics of the chip-type multilayer filter according to Example 2. FIG.
7 is a graph showing electrical characteristics of the chip-type multilayer filter according to Example 3. FIG.
8 is a graph showing electrical characteristics of the chip-type multilayer filter according to Example 4. FIG.
9 is a graph showing electrical characteristics of the chip-type multilayer filter according to Example 5. FIG.
FIG. 10 is a diagram showing electrical characteristics of a chip-type multilayer filter according to a comparative example.
[Explanation of symbols]
11, 14, 17: Short-circuit end side conductors 12, 15, 18; Open end-side conductor (conductor other than short-circuit end side)
13, 16, 19; conductor (conductor perpendicular to the laminated surface)
21, 23, 25; internal ground electrodes 22, 24, 26, 22a, 22b; external ground electrodes 31, 33, 35; signal input / output lead electrodes 32, 34, 36; signal input / output terminal electrodes 4;

Claims (2)

誘電体の内部に共振器となる中心導体が少なくとも2層にわたり構成され、各層の導体の間に内部接地電極を、外部表面に外部接地電極を有するチップ型積層フィルタにおいて、
短絡端側の導体を挟む接地電極の間隔を、積層面に平行な他の導体を挟む接地電極の間隔に比べて狭くした
ことを特徴とするチップ型積層フィルタ。
In a chip-type multilayer filter in which a central conductor serving as a resonator is formed in at least two layers inside a dielectric, and an internal ground electrode is provided between conductors of each layer, and an external ground electrode is provided on an external surface.
Chip type laminated filter, wherein a distance between the ground electrodes sandwiching the conductor of the short-circuit end side, and narrower than the distance between the ground electrodes sandwiching the other conductors parallel to the stacking plane.
短絡端側の導体の幅を、積層面に平行な他の導体の幅に比べて広くした
ことを特徴とする請求項1に記載のチップ型積層フィルタ。
Chip type laminated filter according to claim 1, characterized in that the width of the conductor of the short-circuit end side, and wider than the width of the parallel other conductor to the laminated surface.
JP19669796A 1996-07-25 1996-07-25 Chip type multilayer filter Expired - Lifetime JP3676885B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19669796A JP3676885B2 (en) 1996-07-25 1996-07-25 Chip type multilayer filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19669796A JP3676885B2 (en) 1996-07-25 1996-07-25 Chip type multilayer filter

Publications (2)

Publication Number Publication Date
JPH1041701A JPH1041701A (en) 1998-02-13
JP3676885B2 true JP3676885B2 (en) 2005-07-27

Family

ID=16362091

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19669796A Expired - Lifetime JP3676885B2 (en) 1996-07-25 1996-07-25 Chip type multilayer filter

Country Status (1)

Country Link
JP (1) JP3676885B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5464864B2 (en) 2009-02-25 2014-04-09 京セラ株式会社 Filter circuit and wireless communication module and wireless communication device using the same

Also Published As

Publication number Publication date
JPH1041701A (en) 1998-02-13

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