JPH05109923A - Composite multilayer circuit board - Google Patents

Composite multilayer circuit board

Info

Publication number
JPH05109923A
JPH05109923A JP30110791A JP30110791A JPH05109923A JP H05109923 A JPH05109923 A JP H05109923A JP 30110791 A JP30110791 A JP 30110791A JP 30110791 A JP30110791 A JP 30110791A JP H05109923 A JPH05109923 A JP H05109923A
Authority
JP
Japan
Prior art keywords
conductor pattern
circuit board
filter
dielectric
distributed constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30110791A
Other languages
Japanese (ja)
Inventor
Hiroshi Hayashi
洋志 林
Shozo Otomo
省三 大友
Susumu Nishigaki
進 西垣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Steel and Sumikin Electronics Devices Inc
Original Assignee
Sumitomo Metal Ceramics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Metal Ceramics Inc filed Critical Sumitomo Metal Ceramics Inc
Priority to JP30110791A priority Critical patent/JPH05109923A/en
Publication of JPH05109923A publication Critical patent/JPH05109923A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor

Landscapes

  • Control Of Motors That Do Not Use Commutators (AREA)
  • Filters And Equalizers (AREA)

Abstract

PURPOSE:To realize a wide range of attenuation with only a small number of devices, by incorporating multistage filter circuits, each made up of a signal conductor pattern and a grounding conductor pattern opposed through a dielectric, and forming a distributed constant noise filter by connecting the multistage filter circuits in series. CONSTITUTION:A distributed constant filter circuit 2 is provided between deposited green tapes 3, 3. The distributed constant filter circuit 2 is made by connecting multistage filter circuits, each made up of a signal conductor pattern 5 and a grounding conductor pattern 6 with a dielectric 7 in between, in series along each filter circuit board. The signal conductor pattern 5 and grounding conductor pattern 6 are made of Ag, Cu, or Au-based conducting paste in a winding-shaped pattern, such as a spiral pattern oppositely located to each other. The filter circuit 8 consists of the inductance and capacitance components of these patterns 5 and 6.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、多層回路基板に係り、
より詳細には、フィルタ回路を内蔵した複合セラミック
多層回路基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer circuit board,
More specifically, the present invention relates to a composite ceramic multilayer circuit board containing a filter circuit.

【0002】[0002]

【従来の技術】近年、ディジタル機器の進展により、多
くのノイズ対策用チップ部品が提供されている。しかし
ながら、該機器のポータブル化等の小型化に伴った電源
用ノイズ対策部品は十分に小さいとは言い難く、アセン
ブリメーカーで集中定数素子であるチップコンデンサー
やチップインダクタを用いてT型やπ型等のフィルタを
回路基板上に組み立てているのが現状である。
2. Description of the Related Art In recent years, with the progress of digital equipment, many chip parts for noise suppression have been provided. However, it is hard to say that the noise suppression parts for power supply accompanying the miniaturization of the equipment such as portable equipment are not sufficiently small. The current situation is to assemble the above filter on a circuit board.

【0003】しかし、この構成の場合、多くの部品点数
を組み合わせる形態となるため、前記機器の小型化に限
度が生じており、前記フィルタの一層の小型化、高性能
化が求められている。
However, in the case of this configuration, since a large number of parts are combined, there is a limit to downsizing of the device, and further downsizing and high performance of the filter are required.

【0004】そこで、本発明者は、この課題を解決する
ために、先に、『信号導体層とアース導体層とを絶縁層
を介在させて交互に積層し、かつ該信号導体層とアース
導体層とを、それぞれ多段に直列接続した構成』(特願
平2ー191000号明細書参照)の分布定数素子を用
いたノイズフィルタと、『高誘電体層の片面に渦巻状の
インダクタ導体層を、また他面に渦巻状コンデンサ導体
層を形成し、更にこれらの両側には絶縁体層を積層し、
かつこれらは一体的に焼成してなる構成』(特願平2ー
229640号明細書参照)の分布定数素子を用いた内
蔵型LCフィルタを提案した。
Therefore, in order to solve this problem, the present inventor firstly "laminates a signal conductor layer and an earth conductor layer alternately with an insulating layer interposed therebetween, and further, the signal conductor layer and the earth conductor. And a noise filter using a distributed constant element having a configuration in which layers are connected in series in multiple stages "(see Japanese Patent Application No. 2-191000), and" a spiral inductor conductor layer is provided on one surface of a high dielectric layer. , And form a spiral-shaped capacitor conductor layer on the other surface, and further laminate insulator layers on both sides of these layers,
In addition, a built-in LC filter using a distributed constant element having a structure in which these are integrally fired "(see Japanese Patent Application No. 2-229640) was proposed.

【0005】そして、これらのフィルタは、前記各導体
層がチップ内部に内蔵され、外気に非接触状態の構成と
しているので、その信頼性を向上させ得ると共に、その
構成を一層、コンパクト化できるという利点を有する。
Further, in these filters, since each of the conductor layers is built in the inside of the chip and is in a non-contact state with the outside air, the reliability can be improved and the structure can be made more compact. Have advantages.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、前述し
たフィルタの場合、次のような課題が残る。すなわち、 高インダクタンスが必要な電源用フィルタとする場
合、チップ自体の小型化に限度がある。 小型化された回路基板上にチップを載せると、該基
板上のスペースが狭くなる。 等の課題が残る。
However, in the case of the above-mentioned filter, the following problems remain. That is, in the case of a power supply filter that requires high inductance, there is a limit to miniaturization of the chip itself. Placing a chip on a miniaturized circuit board reduces the space on the board. Issues such as remain.

【0007】ところで、低温焼成のセラミック回路基板
においては、小型化のために、内蔵コンデンサを作り、
バイパスコンデンサとしてフィルタの代わりに使用する
試みがされている。しかし、この構成の場合、該フィル
タが集中定数型フィルタであるため、十分なノイズ除去
特性を得られないという問題が指摘されている。
By the way, in a low temperature fired ceramic circuit board, a built-in capacitor is formed to reduce the size.
Attempts have been made to use it as a bypass capacitor instead of a filter. However, in the case of this configuration, since the filter is a lumped constant type filter, it has been pointed out that a sufficient noise removal characteristic cannot be obtained.

【0008】そこで、本発明者は、このような点に鑑
み、種々・研究した結果、分布定数素子を用いてフィル
タ回路を構成すると共に、該フィルタ回路を回路基板内
部に取り込み、これを一体焼成することで、任意のイン
ダクタンス値を得ることができ、かつ回路基板の表面の
スペースを大きくとることが可能で、ディジタル機器等
の大幅な小型化を実現できることを究明した。
Therefore, the present inventor has variously studied in view of such a point, and as a result, constructs a filter circuit using a distributed constant element, takes the filter circuit into a circuit board, and integrally burns it. By doing so, it has been clarified that an arbitrary inductance value can be obtained, a large space can be provided on the surface of the circuit board, and a drastic downsizing of a digital device or the like can be realized.

【0009】本発明は、以上の課題に対処して創作した
ものであって、その目的とする処は、回路基板表面にチ
ップ部品を組み合わせてフィルタを構成する必要がな
く、かつノイズ除去特性を向上させ得ることができると
共に、回路基板表面のスペースを有効に使用できるよう
にした複合多層回路基板を提供することにある。
The present invention has been made in response to the above-mentioned problems, and its object is to eliminate the need to form a filter by combining chip parts on the surface of a circuit board and to have a noise elimination characteristic. Another object of the present invention is to provide a composite multilayer circuit board that can be improved and can effectively use the space on the surface of the circuit board.

【0010】[0010]

【課題を解決するための手段】そして、上記目的を達成
するための手段としての本発明の複合多層回路基板は、
800〜1000℃で同時焼成可能な導体を内層導体と
して有する多層回路基板において、該回路基板内部に信
号導体パターンとアース導体パターンとを誘電体を介し
て対向させたフィルタ回路を組み込み、一体的に焼成
し、かつ該フィルタ回路は多段に直列接続され、分布定
数型ノイズフィルタを形成した構成としたものである。
The composite multi-layer circuit board of the present invention as a means for achieving the above object,
In a multilayer circuit board having a conductor that can be simultaneously fired at 800 to 1000 ° C. as an inner layer conductor, a filter circuit in which a signal conductor pattern and an earth conductor pattern are opposed to each other through a dielectric is incorporated into the circuit board, and integrated. The filter circuit is fired, and the filter circuits are connected in series in multiple stages to form a distributed constant type noise filter.

【0011】また、本発明の他の多層回路基板は、前記
発明において、前記信号導体パターンとアース導体パタ
ーンとを、誘電体を介して対応する巻線状導体パターン
によって形成した構成よりなる。
Further, another multilayer circuit board of the present invention is the same as the above-mentioned invention, wherein the signal conductor pattern and the ground conductor pattern are formed by corresponding winding conductor patterns via a dielectric.

【0012】[0012]

【作用】本発明の多層回路基板は、基板内部に組み込ま
れている信号導体パターンとアース導体パターンとを誘
電体を介して対向させていることより、両パターンによ
りコンデンサを形成し、該コンデンサによるキャパシタ
ンス成分と、該両パターンのインダクタンス成分とによ
ってフィルタを構成し、かつ該フィルタを多段に直列接
続するようにしているので分布定数型フィルタを構成す
ることより、少ない素子数でもって広帯域で大きな減衰
を得ることができる。
In the multi-layer circuit board of the present invention, the signal conductor pattern and the ground conductor pattern incorporated in the board are opposed to each other through the dielectric, so that a capacitor is formed by both patterns and A filter is composed of a capacitance component and an inductance component of both patterns, and the filters are connected in series in multiple stages. Therefore, by configuring a distributed constant type filter, a large number of elements can be used for large attenuation in a wide band. Can be obtained.

【0013】また、フィルタ回路を基板内部に組み込
み、一体的に焼成した構成としていることより、回路基
板自体の構成をコンパクト化でき、かつ該回路基板表面
のスペースを有効に利用できるように作用する。
Further, since the filter circuit is built in the substrate and integrally fired, the structure of the circuit board itself can be made compact and the space on the surface of the circuit board can be effectively used. ..

【0014】[0014]

【実施例】以下、図面を参照しながら、本発明を具体化
した実施例について説明する。ここに、図1〜図5は、
本発明の実施例を示し、図1は断面図、図2は一対のフ
ィルタ回路部分の概略拡大展開斜視図、図3は図1の等
価回路図、図4は本実施例の回路基板に内蔵したフィル
タの減衰特性を示す減衰曲線図、図5は他の実施例の断
面図である。
Embodiments of the present invention will be described below with reference to the drawings. Here, FIG. 1 to FIG.
FIG. 1 is a sectional view, FIG. 2 is a schematic enlarged exploded perspective view of a pair of filter circuit parts, FIG. 3 is an equivalent circuit diagram of FIG. 1, and FIG. 4 is a built-in circuit board of this embodiment. FIG. 5 is an attenuation curve diagram showing the attenuation characteristics of the above filter, and FIG. 5 is a sectional view of another embodiment.

【0015】本実施例の複合多層回路基板は、概略する
と、回路基板1の内部に分布定数型LC複合フィルタ1
を組み込み、これを一体的に焼成した構成よりなる。そ
して、該焼成は、800〜1000℃の温度で低温焼成
(同時焼成)し、回路基板1の内部に分布定数型LC複
合フィルタ2を複合化している。ここで、分布定数型と
は、L素子と、C素子が分割された形で多数のL・C定
数が分布していること(図3(a))と、高周波領域で
は、それぞれ分割L・C内に、あるいはL・C間に分布
容量や分布インダクタンスが発生し、図3(b)のよう
な等価回路になっていることの両者の意味を有する。
The composite multi-layer circuit board of the present embodiment is roughly described in which the distributed constant type LC composite filter 1 is provided inside the circuit board 1.
And is integrally fired. Then, the firing is performed at a low temperature (simultaneous firing) at a temperature of 800 to 1000 ° C., and the distributed constant type LC composite filter 2 is compounded inside the circuit board 1. Here, the distributed constant type means that a large number of L · C constants are distributed in a form in which the L element and the C element are divided (FIG. 3A), and in the high frequency region, each is divided into L · C constants. This means that a distributed capacitance or a distributed inductance is generated in C or between L and C to form an equivalent circuit as shown in FIG. 3B.

【0016】回路基板1は、セラミック多層回路基板で
あって、CaO (またはMgO)−Al2 O3−SiO2−B2O 系ガラ
ス粉末:40〜80重量%と、アルミナ粉末:20〜6
0重量%とからなる低温焼成材料をドクターブレード法
により100μm厚みのグリーンテープ3とし、これを
所定サイズに切断・積層した基板よりなる。ここで、各
グリーンテープ3には、通常の基板と同様に、Ag導体ペ
ーストによる配線回路(パターン)4が印刷され多層回
路を形成している。そして、積層されているグリーンテ
ープ3,3間には、分布定数型フィルタ回路2が形成さ
れている。
The circuit board 1 is a ceramic multi-layer circuit board, and comprises CaO (or MgO) -Al 2 O 3 -SiO 2 -B 2 O based glass powder: 40 to 80% by weight and alumina powder: 20 to 6%.
A low temperature firing material consisting of 0% by weight was used as a green tape 3 having a thickness of 100 μm by a doctor blade method, and the green tape 3 was cut and laminated into a predetermined size. Here, a wiring circuit (pattern) 4 made of Ag conductor paste is printed on each green tape 3 to form a multi-layer circuit, similar to a normal substrate. A distributed constant type filter circuit 2 is formed between the stacked green tapes 3 and 3.

【0017】分布定数型フィルタ回路2は、信号導体パ
ターン5とアース導体パターン6とを誘電体7を介して
対向させた一対のフィルタ回路8を、多層化されている
回路基板に沿って多段に直列接続することで形成されて
いる。ここで、信号導体パターン5とアース導体パター
ン6としては、Ag系、Cu系、あるいはAu系導体ペースト
を用い、両パターン5,6が対向・対応するスパイラル
状等の巻線状パターンとしている。そして、両導体パタ
ーン5,6のインダクタンス成分と、両パターン5,6
間誘電体によるキャパシタンス成分により、フィルタ回
路8を得ている。また、前記誘電体7としては、誘電率
εが80程度の鉛・チタン・硼酸系誘電体(PbO −TiO2
−B2O3)を用いている。
In the distributed constant type filter circuit 2, a pair of filter circuits 8 in which a signal conductor pattern 5 and an earth conductor pattern 6 are opposed to each other with a dielectric 7 in between are arranged in multiple stages along a multilayered circuit board. It is formed by connecting in series. Here, as the signal conductor pattern 5 and the ground conductor pattern 6, Ag-based, Cu-based, or Au-based conductor paste is used, and both patterns 5 and 6 are in a spiral-shaped winding pattern in which the patterns 5 and 6 face and correspond to each other. Then, the inductance components of both conductor patterns 5 and 6
The filter circuit 8 is obtained by the capacitance component of the inter-dielectric. As the dielectric 7, a lead / titanium / boric acid-based dielectric (PbO 2 —TiO 2 ) having a dielectric constant ε of about 80 is used.
-B 2 O 3 ) is used.

【0018】そして、分布定数型フィルタ回路2を構成
する信号導体パターン5は、スルーホール(あるいは、
ビアホール等)9を介して信号ラインまたは電源ライン
に接続され、またアース導体パターン6は、スルーホー
ル10を介してアースラインに接続されている。
The signal conductor pattern 5 constituting the distributed constant type filter circuit 2 is provided with a through hole (or
A signal line or a power supply line is connected via a via hole 9), and the ground conductor pattern 6 is connected to a ground line via a through hole 10.

【0019】ところで、本実施例の複合多層回路基板
は、前述したグリーンテープ3の上面にAg導体ペースト
でスパイラル状のアース導体パターン6をスクリーン印
刷し、該アース導体パターン6の上部に誘電体ペースト
をスクリーン印刷して誘電体層7を形成すると共に、該
誘電体層7の上面にアース導体パターン6に対向し、か
つ対応するスパイラル状の信号導体パターン5をスクリ
ーン印刷し、両パターン5,6により一対のフィルタ回
路8を形成し、該フィルタ回路を形成したグリーンテー
プをラミネートし、800〜1000℃で低温焼成する
ことで製作している。また各層の信号導体パターンはス
ルーホールを介して直列に信号ラインへ、アース導体パ
ターンもスルーホールを介して直列にアースラインへ接
続される。なお、前記誘電体層7は、必要に応じて、誘
電率εの異なる複合ペロブスカイト等の約900℃で同
時焼成できる材料を用い、厚さが約30〜100μmの
グリーンテープとしたものを用い、これを積層するよう
にしてもよい。
By the way, in the composite multilayer circuit board of this embodiment, a spiral earth conductor pattern 6 is screen-printed on the upper surface of the green tape 3 with Ag conductor paste, and the dielectric paste is formed on the earth conductor pattern 6. Is screen-printed to form a dielectric layer 7, and a spiral signal conductor pattern 5 facing the earth conductor pattern 6 and corresponding to the ground conductor pattern 6 is screen-printed on the upper surface of the dielectric layer 7 to form both patterns 5, 6 A pair of filter circuits 8 are formed by, the green tape on which the filter circuits are formed is laminated, and low temperature firing is performed at 800 to 1000 ° C. to manufacture. The signal conductor pattern of each layer is connected to the signal line in series through the through hole, and the ground conductor pattern is connected to the earth line in series through the through hole. The dielectric layer 7 is made of a material such as a composite perovskite having a different permittivity ε that can be simultaneously fired at about 900 ° C., and a green tape having a thickness of about 30 to 100 μm is used as the dielectric layer 7, You may make it laminate | stack this.

【0020】そして、本実施例の複合多層回路基板によ
れば、信号導体パターンとアース導体パターンとを誘電
体を介して対向させて形成したフィルタ回路を基板内部
に組み込む構成としていることより、グリーンテープ3
上を広く利用できるので、大きいインダクタンスが容易
に得られ、高特性フィルタを得ることができように作用
する。また、フィルタ回路を基板内部に組み込み、一体
的に焼成した構成としていることより、回路基板自体の
構成をコンパクト化でき、かつ該回路基板表面のスペー
スを有効に利用できるように作用する。
According to the composite multi-layer circuit board of this embodiment, the filter circuit formed by the signal conductor pattern and the ground conductor pattern facing each other with the dielectric interposed therebetween is incorporated into the board. Tape 3
Since the upper part can be widely used, a large inductance can be easily obtained, and a high characteristic filter can be obtained. Further, since the filter circuit is built into the substrate and integrally fired, the structure of the circuit board itself can be made compact and the space on the surface of the circuit board can be effectively used.

【0021】ところで、本実施例の複合多層回路基板に
ついて、その減衰特性について調べた処、図4に示すよ
うに、前述した本発明者が先に提案した内蔵型LCフィ
ルタと同様に、2つの大きな共振が、離れた周波数帯域
に現れ、広帯域の減衰が発現することが確認できた。こ
のことより、基板内に分布定数型フィルタ回路を組み込
んだ構成であっても、例えば、先に本発明者が提案した
フィルタチップと同様の作用をさせ得ることが確認でき
た。
By the way, when the attenuation characteristics of the composite multilayer circuit board of the present embodiment were examined, as shown in FIG. 4, it was found that the two characteristics were the same as the built-in LC filter previously proposed by the present inventor. It was confirmed that a large resonance appeared in the distant frequency band and a wide-band attenuation appeared. From this, it was confirmed that even the configuration in which the distributed constant type filter circuit is incorporated in the substrate can cause the same action as, for example, the filter chip previously proposed by the present inventor.

【0022】なお、本発明は、上述した実施例に限定さ
れるものでなく、本発明の要旨を変更しない範囲内で変
形実施できるものを含む。因みに、分布定数型フィルタ
回路としては、図5に示すような構成としてもよいこと
は当然である。
The present invention is not limited to the above-described embodiments, but includes modifications that can be implemented without changing the gist of the present invention. Incidentally, it goes without saying that the distributed constant type filter circuit may be configured as shown in FIG.

【0023】[0023]

【発明の効果】以上の説明より明らかなように、本発明
の複合多層回路基板によれば、基板内部に組み込まれて
いる信号導体パターンとアース導体パターンとを誘電体
を介して対向させていることより、両パターンによりコ
ンデンサを形成し、該コンデンサによるキャパシタンス
成分と、該両パターンのインダクタンス成分とによって
フィルタを構成し、かつ該フィルタを多段に直列接続す
るようにしているので分布定数型フィルタを構成するこ
とより、少ない素子数でもって広帯域の減衰を発現で
き、高特性フィルタを得ることができるという効果を有
する。
As is apparent from the above description, according to the composite multilayer circuit board of the present invention, the signal conductor pattern and the ground conductor pattern incorporated in the board are opposed to each other via the dielectric. Therefore, a capacitor is formed by both patterns, a filter is configured by the capacitance component of the capacitor and the inductance component of both patterns, and the filters are connected in series in multiple stages. With the configuration, it is possible to obtain wideband attenuation with a small number of elements and obtain a high characteristic filter.

【0024】また、本発明の複合多層回路基板によれ
ば、フィルタ回路を基板内部に組み込み、一体的に焼成
した構成としていることより、回路基板自体の構成をコ
ンパクト化でき、かつ該回路基板表面のスペースを有効
に利用できるという効果を有する。
Further, according to the composite multilayer circuit board of the present invention, since the filter circuit is built in the board and integrally fired, the structure of the circuit board itself can be made compact, and the surface of the circuit board can be made compact. This has the effect that the space can be effectively used.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の実施例の断面図である。FIG. 1 is a cross-sectional view of an embodiment of the present invention.

【図2】 一対のフィルタ回路部分の概略拡大展開斜視
図である。
FIG. 2 is a schematic enlarged exploded perspective view of a pair of filter circuit portions.

【図3】 図1の等価回路図である。FIG. 3 is an equivalent circuit diagram of FIG.

【図4】 本実施例の回路基板に内蔵したフィルタの減
衰特性を示す減衰曲線図である。
FIG. 4 is an attenuation curve diagram showing an attenuation characteristic of a filter built in the circuit board of this embodiment.

【図5】 他の実施例の断面図である。FIG. 5 is a cross-sectional view of another embodiment.

【符号の説明】[Explanation of symbols]

1・・・回路基板、2・・・分布定数型LC複合フィル
タ、3・・・グリーンテープ、4・・・配線回路、5・
・・信号導体パターン、6・・・アース導体パターン、
7・・・誘電体、8・・・一対のフィルタ回路、9,1
0・・・スルーホール(あるいは、ビアホール等)
1 ... Circuit board, 2 ... Distributed constant type LC composite filter, 3 ... Green tape, 4 ... Wiring circuit, 5 ...
..Signal conductor pattern, 6 ... Ground conductor pattern,
7 ... Dielectric material, 8 ... Pair of filter circuits, 9, 1
0 ... Through hole (or via hole, etc.)

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H01L 25/18 H01P 1/203 9183−5J 7220−4M H01L 23/52 B 7220−4M 25/04 Z ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Internal reference number FI Technical display location H01L 25/18 H01P 1/203 9183-5J 7220-4M H01L 23/52 B 7220-4M 25/04 Z

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 800〜1000℃で同時焼成可能な導
体を内層導体として有する多層回路基板において、該回
路基板内部に信号導体パターンとアース導体パターンと
を誘電体を介して対向させたフィルタ回路を組み込み、
一体的に焼成し、かつ該フィルタ回路は多段に直列接続
され、分布定数型ノイズフィルタを形成していることを
特徴とする複合多層回路基板。
1. A multi-layer circuit board having a conductor that can be simultaneously fired at 800 to 1000 ° C. as an inner layer conductor, wherein a filter circuit in which a signal conductor pattern and a ground conductor pattern are opposed to each other through a dielectric substance inside the circuit board. Embedded,
A composite multi-layer circuit board, characterized in that it is fired integrally and the filter circuits are connected in series in multiple stages to form a distributed constant type noise filter.
【請求項2】 信号導体パターンとアース導体パターン
とが、誘電体を介して対応する巻線状導体パターンより
なる請求項1に記載の複合多層回路基板。
2. The composite multilayer circuit board according to claim 1, wherein the signal conductor pattern and the ground conductor pattern are formed of corresponding winding-shaped conductor patterns with a dielectric interposed therebetween.
JP30110791A 1991-10-20 1991-10-20 Composite multilayer circuit board Pending JPH05109923A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30110791A JPH05109923A (en) 1991-10-20 1991-10-20 Composite multilayer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30110791A JPH05109923A (en) 1991-10-20 1991-10-20 Composite multilayer circuit board

Publications (1)

Publication Number Publication Date
JPH05109923A true JPH05109923A (en) 1993-04-30

Family

ID=17892930

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30110791A Pending JPH05109923A (en) 1991-10-20 1991-10-20 Composite multilayer circuit board

Country Status (1)

Country Link
JP (1) JPH05109923A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5831331A (en) * 1996-11-22 1998-11-03 Philips Electronics North America Corporation Self-shielding inductor for multi-layer semiconductor integrated circuits
WO2000074142A1 (en) * 1999-06-01 2000-12-07 Alcatel Usa Sourcing, L.P. Multiple level spiral inductors used to form a filter in a printed circuit board
KR100364926B1 (en) * 1999-06-03 2002-12-16 사단법인 고등기술연구원 연구조합 Leadless Type LTCC Module And Manufacturing Method Thereof
WO2006090611A1 (en) * 2005-02-25 2006-08-31 Murata Manufacturing Co., Ltd. Lc filter
US20230036907A1 (en) * 2020-05-07 2023-02-02 Murata Manufacturing Co., Ltd. Multilayer substrate module

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5831331A (en) * 1996-11-22 1998-11-03 Philips Electronics North America Corporation Self-shielding inductor for multi-layer semiconductor integrated circuits
WO2000074142A1 (en) * 1999-06-01 2000-12-07 Alcatel Usa Sourcing, L.P. Multiple level spiral inductors used to form a filter in a printed circuit board
KR100364926B1 (en) * 1999-06-03 2002-12-16 사단법인 고등기술연구원 연구조합 Leadless Type LTCC Module And Manufacturing Method Thereof
WO2006090611A1 (en) * 2005-02-25 2006-08-31 Murata Manufacturing Co., Ltd. Lc filter
US20230036907A1 (en) * 2020-05-07 2023-02-02 Murata Manufacturing Co., Ltd. Multilayer substrate module

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