JPH06244418A - Semiconductor device and its production - Google Patents

Abstract

PURPOSE:To provide a semiconductor device such as a TFT whose durability and reliability are improved through the improvement of gate breakdown strength characteristics and its production method. CONSTITUTION:After an oxidized film 19 is applied with an oxidization barrier film 25 thereon in order to prevent its oxidization, the part facing a channel area 15 of an active layer 3 is covered and reoxidized, then the oxidized film 19 of the part which has not been covered with the film 25 is reoxidized so that an insulation film 5 may be formed thicker than the part covered with the film 25. Thus, the film 5 in the channel edge part of the semiconductor device can be thickened, thereby improving the gate breakdown strength. Furthermore, since the film 5 of the part corresponding to the area 15 is covered with the film 25, the film thickness of the film 5 can be kept as it is.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a semiconductor device having improved durability and reliability by improving a gate breakdown voltage and a method of manufacturing the same.

[0002]

2. Description of the Related Art Recently, a semiconductor device formed on an insulating film or an insulating substrate using an amorphous silicon film or a polycrystalline silicon film as an active layer and a manufacturing technique thereof have been actively researched.

Such a semiconductor device is a thin film transistor (Thin Film Transistor) in order to pursue particularly high integration.
Stor; abbreviated as TFT hereinafter) has been studied, and some have already put it to practical use. TF like this
Attention has been paid to T, which is preferably used as a driving circuit including a switching element of an active matrix liquid crystal display device.

[0004]

However, unlike a transistor element such as an integrated circuit formed directly on a single crystal silicon substrate, such a TFT has a low gate breakdown voltage and is not always reliable. There is a problem. This is one of the technical problems to be solved when the TFT is used in an active matrix type liquid crystal display device in which a relatively high voltage is applied to the gate electrode.

It is considered that the reason why the gate breakdown voltage of the TFT is low is that the breakdown voltage between the gate electrode and the channel region in the vicinity of the channel edge portion of the active layer of the TFT is low. That is, in the TFT, the active layer and the insulating film that covers the active layer are patterned into a substantially rectangular shape to isolate the elements into islands. It is considered that the film thickness of the insulating film to be provided is inevitably thin in the conventional technique, and the withstand voltage near that portion is low.

This means that in the case of a transistor element such as an integrated circuit formed directly on a single crystal silicon substrate, the insulating film is LOCOS (Local Oxidat).
Since the element is separated by a method called ion of silicon), the above-mentioned channel edge portion is formed rather thick, so that the gate withstand voltage can be relatively high, and the gate withstand voltage test is actually performed on the TFT to cause dielectric breakdown. At that time, when the TFT element is verified, it is proved from the experimental results and the like that it is confirmed that the above-mentioned edge portion is destroyed.

FIG. 4 shows a planar structure of a conventional forward stagger type TFT. Further, FIG. 5A is a cross-sectional view taken along the line AA ′,
FIG. 5B is a sectional view taken along the line BB ′.

In the conventional TFT, an active layer 403 is formed on an insulating substrate 401, and an insulating film 405 is formed so as to cover the active layer 403.
Is formed, and the channel region 40 of the active layer 403 is formed thereon.
7, the gate electrode 409 is formed so as to cover the gate electrode 409, the drain electrode 413 is connected to the drain region 411 of the active layer 403, the source electrode 417 is connected to the source region 415, and the gate electrode 409 and the active layer 403 are covered. Thus, the interlayer insulating film 419 is formed.

In the conventional TFT, the insulating film 405 near the channel edge portion 421 is thinly formed as shown in FIG. This is thinly formed both when the insulating film 405 is deposited and formed and when the surfaces of the active layer 403 and the gate electrode 409 are thermally oxidized. Alternatively, a method may be considered in which an insulating film is separately attached and attached only to the vicinity of the channel edge portion 421 and the side wall portion of the active layer 403, but this method complicates the manufacturing process and further reduces the yield of TFTs. There's a problem.

On the other hand, the vicinity 423 of the boundary between the channel region 407 and the drain region 411 as shown in FIG.
Etc., there is a problem that the electric field is concentrated when a voltage is applied to the gate electrode 409, and the electric field is destroyed from this portion. A so-called LDD (Lightly Doped Drain) structure has been attempted as a measure for solving this problem. This is the channel region 407 and the drain region 4.
This is a technique for reducing the concentration of an electric field by providing a region doped with an impurity at a low concentration between the region 11 and 11. However, in this method, in order to form the channel region, the LDD region, and the ohmic contact region, it is necessary to dope the respective regions with impurities at different concentrations, and there is a problem that the process becomes complicated. . For example, when there are n and p type doped regions such as a CMOS structure TFT, two masks are prepared for each of the n and p type doped regions, and ion implantation is performed twice. Therefore, there is a problem that the manufacturing process is further complicated.

The present invention has been made in order to solve such a problem, and an object thereof is to improve the gate breakdown voltage characteristics and to improve the durability and reliability of a semiconductor device such as a TFT. It is to provide the manufacturing method.

[0012]

The semiconductor device of the present invention comprises:
An island-shaped element isolation was formed on the first insulating layer or the insulating substrate to form a substantially rectangular shape, and the channel region was arranged in the central portion, and the source region and the drain region were arranged on both sides of the channel region. An active layer, a second insulating layer covering the active layer, the active layer facing the channel region of the active layer via the second insulating layer, and the active layer via the second insulating layer A gate electrode covering at least a part of a side end face along the carrier movement direction, and a source electrode and a drain electrically connected to the source region and the drain region on both sides of the channel region of the active layer, respectively. In the semiconductor device having an electrode, the second insulating layer has a layer thickness of at least one side end portion along the carrier movement direction of the active layer, the layer thickness of the gate electrode and the active layer. It is characterized in that the serial is a single layer which is to thicker compared to the layer thickness of the portion which is sandwiched between the channel region. Alternatively, island-shaped element isolations are formed on the first insulating layer or the insulating substrate to form a substantially rectangular shape, and the channel region is disposed in the central portion, and the source region and the drain region are disposed on both sides of the channel region. The active layer, a second insulating layer covering the active layer, and a second insulating layer
Is electrically connected to the gate electrode covering at least a part of the channel region of the active layer through the insulating layer, and the source region and the drain region on both sides of the channel region of the active layer. In the semiconductor device having a source electrode and a drain electrode, the second
The insulating layer has a layer thickness of a portion corresponding to at least one of the boundary portion between the channel region and the source region of the active layer and the boundary portion between the channel region and the drain region of the gate electrode and the active layer. It is characterized in that it is a single layer formed thicker than the layer thickness of the portion sandwiched between the channel region and the region.

Alternatively, the source region and the drain region are formed on the first insulating layer or the insulating substrate in the shape of an island, which is formed into a substantially rectangular shape, and the channel region is arranged in the central portion. An active layer each of which is disposed, a second insulating layer that covers the active layer, and a channel region of the active layer that faces the second insulating layer,
And a gate electrode covering at least a part of a side end face of the active layer along the carrier movement direction via the second insulating layer, and the source region and the drain on both sides of the channel region of the active layer. In a semiconductor device including a source electrode and a drain electrode electrically connected to the region, the second insulating layer is a layer at a side end portion of at least one side along a carrier movement direction of the active layer. A thickness is formed thicker than a layer thickness of a portion sandwiched between the gate electrode and the channel region of the active layer, and a boundary portion between the channel region and the source region of the active layer and a channel region. A portion in which a layer thickness of a portion corresponding to at least one of the boundary portions with the drain region is sandwiched between the gate electrode and the channel region of the active layer. It is characterized by a single layer which is to thicker compared layer thickness of the.

Alternatively, the source region and the drain region are formed on the first insulating layer or the insulating substrate in island-like element-isolated and formed in a substantially rectangular shape, and the channel region is arranged in the central portion. An active layer each of which is disposed, a second insulating layer that covers the active layer, and a channel region of the active layer that faces the second insulating layer,
Further, both the gate electrode covering at least a part of the active layer so as to intersect the carrier moving direction of the active layer through the second insulating layer in an oblique direction and the channel region of the active layer. In a semiconductor device including a source electrode and a drain electrode electrically connected to the source region and the drain region, respectively, the second insulating layer includes at least one of the second insulating layers along the carrier movement direction of the active layer. Is formed thicker than the layer thickness of a portion sandwiched between the gate electrode and the channel region of the active layer, and the channel region and the source region of the active layer are formed. Of the gate electrode and the active layer, the layer thickness of a portion corresponding to at least one of the boundary portion between the gate electrode and the channel region and the drain region is defined as It is characterized by a single layer which is to thicker compared to the layer thickness of the portion which is sandwiched between the Le region.

The method of manufacturing a semiconductor device according to the present invention is
A step of forming a semiconductor film on an insulating film or an insulating substrate and separating island-shaped elements to form an approximately rectangular active layer; and a step of forming an insulating film made of an oxide film so as to cover the active layer. And forming an oxidation barrier film on the insulation film to prevent oxidation of the insulation film to cover a portion of the active layer corresponding to the channel region, and subjecting the insulation film to reoxidation treatment to form the oxidation barrier film. A step of selectively reoxidizing a portion avoiding coating to form a film thickness of the reoxidized portion larger than that of the portion covered with the oxidation barrier film; Removing the oxidation barrier film, and facing at least a channel region of the active layer through the insulating film and covering at least a part of a side end face of the active layer along the carrier moving direction through the insulating film. The step of forming the gate electrode It is characterized in that Bei.

Alternatively, a step of forming a gate electrode on the insulating film or the insulating substrate, a step of forming an insulating film made of an oxide film so as to cover the gate electrode, and a step of forming the insulating film on the insulating film. An oxidation barrier film that prevents oxidation is formed to cover a portion of the active layer, which is formed in a later step of the insulation film, facing the channel region, and the insulation film is subjected to reoxidation treatment to be covered with the oxidation barrier film. A step of selectively oxidizing the insulating film in a portion avoiding the above to form a film thicker than a film thickness of a portion covered with the oxidation barrier film; and a step of removing the oxidation barrier film after the reoxidation treatment, A semiconductor film is formed and elements are separated into substantially rectangular islands, a channel region facing the gate electrode is formed in the center of the semiconductor film with the insulating film interposed therebetween, and a source region and a drain are provided on both sides of the channel region. Area It is characterized by comprising the step of forming the active layer form.

The so-called gate insulating film may be formed by further depositing an insulating film such as a SiN _x film on the above-mentioned insulating film as another layer. However, in this case, it goes without saying that it is desirable to set the film thickness of the above-mentioned insulating film and the insulating film such as the SiN _x film of another layer so as to have a suitable film thickness as a so-called gate insulating film.

[0018]

According to the method of manufacturing a semiconductor device of the present invention, the portion of the insulating film that faces the channel region is covered with the oxidation barrier film, and the insulating film is reoxidized to cover the portion with the oxidation barrier film. Since only the insulating film in the portion avoiding the above is selectively oxidized to form a film thicker than the film covered with the oxide barrier film, the insulating film in the channel edge portion of the semiconductor device obtained by this is formed. The film thickness increases, and the gate breakdown voltage improves. Moreover, since the insulating film in the portion corresponding to the channel region is covered with the oxidation barrier film during reoxidation,
The film thickness of that portion can be maintained at a preferable thickness as a so-called gate insulating film.

In both the forward stagger type TFT and the reverse stagger type TFT, the insulating film is formed of an oxide film, and the channel region is formed when the insulating film is reoxidized. It goes without saying that it can be realized by covering the corresponding portion with an oxidation barrier film.

Further, as the thickened portion of the insulating film, the thin portion having a low gate breakdown voltage may be thickened, so that the boundary portion between the channel region and the source region of the active layer and the channel region and the drain region are formed. It goes without saying that at least one of the boundary portion and the portion of the active layer near the side end surface along the carrier movement direction may be thickened, or all of them may be thickened.

[0021]

Embodiments of a semiconductor device and a method of manufacturing the same according to the present invention will be described below in detail with reference to the drawings. Figure 1
FIG. 2 is a plan view showing the structure of the semiconductor device of this embodiment, and FIG. 2 is a sectional view showing the structure and manufacturing process.

(Embodiment 1) As shown in the left side of FIGS. 1 and 2, the semiconductor device of the first embodiment has a quartz substrate 1
An active layer 3, an insulating film 5 which is a gate insulating film, a gate electrode 7, an interlayer insulating film 9, and wirings 11 (a) and (b).
And the passivation film 13 is the main part of the TFT.

The insulating film 5 is formed by thermally oxidizing the surface of the active layer 3 and then re-oxidizing so that only the film thickness at the side end of the channel region 15 becomes thick. The insulating film 5 serves as a gate electrode 7 and a channel region 15 of the active layer 3.
The thickness of the part sandwiched between and is about 700 Å,
Other portions, that is, the film thickness of the insulating film 5 and the boundary portion between the channel region 15 and the source region 21 of the active layer 3 corresponding to the vicinity of the side end portion 17 along the carrier movement direction of the active layer 3 and the channel region 15. The insulating film 5 corresponding to the boundary with the drain region 23 is a single-layer film having a film thickness of about 1300 angstroms.

As described above, since the thickness of the insulating film 5 at the end of the active layer 3 on the channel side is as thick as 1300 angstroms, the gate breakdown voltage of this portion is improved, and the durability and reliability are improved. is doing. Moreover, the channel region 15
Since the film thickness of the insulating film 5 in the portion corresponding to is formed to a preferable thickness as a so-called gate insulating film,
The operating characteristics of (1) realize a predetermined optimum characteristic.

Next, a method of manufacturing such a semiconductor device according to the first embodiment of the present invention will be described. As shown in the left of FIG. 2A, an amorphous silicon film is LPCVD-coated on the quartz substrate 1.
Method to form a film with a film thickness of 1300 angstroms and perform solid phase growth for 15 hours in a nitrogen atmosphere at 600 ° C. Then, dry etching is performed to separate the elements into islands to form an almost rectangular active layer 3. obtain. Then, thermal oxidation at 950 ° C. is applied to the surface of the active layer 3 in an oxidation furnace to form an oxide film 19 made of SiO ₂ having a thickness of 700 Å on the surface. This oxide film 19 finally becomes the insulating film 5 as a gate insulating film through a re-oxidation process later. Then, As is ion-implanted to cover the channel region 15 with a resist 24, a source region 21 and a drain region 23 are formed. Then, the resist 24 is peeled off. This ion implantation is performed with SiN _x described later.
It may be performed after the oxidation barrier film 25 made of a film is formed.

And Si by dry oxygen which is an oxidant
To prevent oxidation of O _2, on the oxide film 19 as shown in FIG. 2 (b) left and the SiN _x film was deposited to a thickness of 1500 Å by LPCVD, which for example CF ₄ /
The oxide barrier film 25 is formed by patterning by plasma etching of O ₂ to cover the portion of the active layer 3 corresponding to the channel region 15.

Then, as shown on the left side of FIG. 2C, the dry oxide is used as an oxidant, and the oxide film 19 is subjected to a reoxidation process in a dry oxygen atmosphere at 1100 ° C. in an oxidizing furnace to carry out the above-mentioned process. By selectively reoxidizing the portion which is not covered with the oxidation barrier film 25, the film thickness is grown to about 1300 angstrom. On the other hand, the oxidation barrier film 2
Since the portion covered with 5 is not reoxidized, the film thickness hardly grows any more, and the thickness suitable for the gate insulating film can be maintained. Alternatively, if it is desired to further accelerate the oxidation, the reoxidation treatment may be performed in a steam atmosphere. In this way, the insulating film 5 is obtained.

Then, as shown in the left side of FIG. 2D, the oxidation barrier film 25 is removed after the reoxidation process. At this time, when the surface of the insulating film 5 that is in contact with the oxide barrier film 25 is roughened when the oxide barrier film 25 is removed, the insulating film 5 in that portion is temporarily peeled off and re-oxidized to be repaired. You may. Of course, if the process conditions are appropriately set so that the surface of the insulating film 5 is not roughened, such repair is not necessary.

After that, as shown in the left side of FIG. 2E, the side facing the channel region 15 of the active layer 3 through the insulating film 5 and along the carrier moving direction of the active layer 3 through the insulating film 5. The gate electrode 7 is formed to cover at least a part of the vicinity of the end face 17. In this embodiment, both ends are covered. Since the gate electrode 7 always overhangs on the active layer 3 due to the structure of the TFT as in the present embodiment, it is necessary to cover at least one side end portion 17 along the carrier moving direction of the active layer 3. Become.

Then, a low temperature oxide film is formed as the interlayer insulating film 9 by CVD to form a source region 21 and a drain region 23.
After forming a contact hole (not shown) for making a connection between the wiring 11 and the wiring 11, an Al film containing 0.5% Si is formed by sputtering and patterned to form the wiring 11a,
b is formed. Then, PS is used as the passivation film 13.
A G film is formed, and hydrogen passivation by hydrogen plasma irradiation, which is often performed in a polysilicon process, is also performed to complete the semiconductor device of the first embodiment according to the present invention.

An experiment was conducted to evaluate the gate breakdown voltage of the TFT of the first embodiment as the semiconductor device according to the present invention. The gate size of this TFT is W / L = 10 μm /
It was set to 10 μm.

For comparison, when a similar gate breakdown voltage test was conducted on a conventional n-channel MOS structure TFT in which the film thickness of the insulating film 5 is 700 angstroms at both the channel edge portion and the channel region portion, a gate voltage of about The gate was destroyed at 22V. Therefore, the film thickness of the gate insulating film is 700 Å as described above, and the gate breakdown voltage at this time is about 3.1 MV / cm.

On the other hand, in the TFT according to the present invention, the gate voltage is 40 V which is as high as 8 V as compared with the conventional TFT.
No damage occurred even when raised to. Therefore, the gate breakdown voltage is about 5.7 MV / cm or more, and the TFT of the present invention is
It was confirmed that the gate breakdown voltage of the device was dramatically improved as compared with the conventional TFT.

(Embodiment 2) FIG. 1 is a plan view showing the structure of a semiconductor device of this embodiment, and the right side of FIG. 2 is a sectional view showing its layer structure and manufacturing process. The semiconductor device of the second embodiment is a TFT whose main part has a planar structure similar to that of the above-mentioned first embodiment, but its cross-sectional structure is shown on the right side of FIG. 2 which is a BB ′ cross-sectional view. As described above, in at least the latter of the boundary line between the source region 21 and the channel region 15 and the boundary line between the drain region 23 and the channel region 15, the insulating film 5 at a portion not covered by the gate electrode 7 is
It is characterized in that it is formed thicker than the film thickness of the insulating film 5 on the channel region 15.

The insulating film 5 thermally oxidizes the surface of the active layer 3 to form an oxide film 19, and the drain region 2 of the oxide film 19 is formed.
3 and the source region 21 are reoxidized to be formed thicker than the region on the channel region 15, and the thickness of the portion sandwiched between the gate electrode 7 and the channel region 15 is about It is a single layer film having a thickness of 700 angstroms and a maximum film thickness of 1200 angstroms on the drain region 23 and the source region 21.

Since the thickness of the insulating film 5 at the side edge of the channel region 15 of the active layer 3 is formed to be as thick as 1200 angstroms at maximum in this way, when a voltage is applied to the gate electrode 7, a channel / drain boundary is formed. The gate electric field strength in the vicinity is relaxed. This makes it possible to suppress the occurrence of breakdown due to crystal defects or the like. As a result, the gate breakdown voltage is improved and the reliability is improved. Moreover, since the interface between the channel and the gate insulating film can be formed to have an appropriate value for the gate insulating film in terms of film thickness and dimensions, the manufactured TFT can realize the characteristics as designed.

Next, a method of manufacturing such a semiconductor device of the second embodiment will be described.

As shown in the right part of FIG. 2 (a), an amorphous silicon film is formed on the quartz substrate 1 by LPCVD to a film thickness of 1300 angstroms, and solid phase growth is performed in a nitrogen atmosphere at 600 ° C. for 15 hours. After that, the element is separated into islands by dry etching to form a substantially rectangular shape, and the active layer 3 is obtained. Then, the surface of the active layer 3 is subjected to thermal oxidation at 950 ° C. in an oxidation furnace, and 700 Å of SiO _{2 is} formed on the surface.
An oxide film 19 made of is formed. This oxide film 19 finally becomes the insulating film 5 as a gate insulating film through a re-oxidation process later. Then, As is ion-implanted to cover the channel region 15 with a resist 24, a source region 21 and a drain region 23 are formed. Then, the resist 24 is peeled off. This ion implantation may be performed after the oxide barrier film 25 made of the SiN _x film described later is formed.

Then, as shown in the right side of FIG. 2B, a SiN _x film is formed on the oxide film 19 by LPCVD in order to prevent re-oxidation of SiO ₂ by dry oxygen as an oxidant.
The film is formed to a film thickness of 00 angstrom,
_The oxide barrier film 25 is formed by patterning by ₄ / O ₂ plasma etching to cover the portion of the active layer 3 corresponding to the channel region 15. At this time, unlike the first embodiment, the oxide barrier film 25 is patterned so that the region covering the oxide barrier film 25 is in the same direction as the gate electrode (which will be formed later), that is, the channel region 15. As described above, at least the drain region 23 of the source region 21 and the drain region 23 is removed by etching so that the oxidation barrier film 25 does not remain on the drain region 23, and at least the drain region 23 is exposed. Allow the agent to penetrate and re-oxidize the part to increase the oxide film thickness.

Thereafter, as shown in the right side of FIG. 2C, dry oxygen is used as an oxidant, and the oxide film 19 is subjected to reoxidation treatment in a dry oxygen atmosphere at 1100 ° C. in an oxidizing furnace to carry out the above-mentioned process. By selectively reoxidizing the portion which is not covered with the oxidation barrier film 25, the film thickness is grown to about 1200 angstrom. On the other hand, the oxidation barrier film 2
Since the portion covered with 5 is not reoxidized, the film thickness hardly grows any more, and the thickness suitable for the gate insulating film can be maintained. Alternatively, if it is desired to further accelerate the oxidation, the reoxidation treatment may be performed in a steam atmosphere. In this way, the insulating film 5 is obtained.

Then, as shown on the right side of FIG. 2D, the oxidation barrier film 25 is removed after the reoxidation process. At this time, when the surface of the insulating film 5 that is in contact with the oxide barrier film 25 is roughened or contaminated when the oxide barrier film 25 is removed, the insulating film 5 at that portion is once partially peeled and redone again. You may repair by doing. Of course, if the process conditions are appropriately set so that the surface of the insulating film 5 is not roughened, such repair is not necessary.

After that, as shown in the right side of FIG. 2E, the side facing the channel region 15 of the active layer 3 through the insulating film 5 and along the carrier moving direction of the active layer 3 through the insulating film 5. The gate electrode 7 is formed to cover at least a part of the vicinity of the end face 17. Since the gate electrode 7 always overhangs on the active layer 3 due to the structure of the TFT as in the present embodiment, it is necessary to cover at least one side end portion 17 along the carrier moving direction of the active layer 3. Become.

After that, a low temperature oxide film is formed by CVD as the interlayer insulating film 9 and the source region 21, the drain region 23 and the wirings 11a and 11b are formed in the same manner as in the general TFT element formation.
After making a contact hole for connecting with
An Al film added with 0.5% of Si is formed by a sputtering method and patterned to form wirings 11a and 11b. Then, a PSG film is formed as the passivation film 13, and hydrogen passivation by hydrogen plasma irradiation which is often performed in a polysilicon process is also performed to complete the semiconductor device of the first embodiment according to the present invention.

An experiment was conducted to evaluate the gate breakdown voltage of the TFT of the first embodiment as such a semiconductor device according to the present invention. The gate size of this TFT is W / L = 10 μm /
It was set to 10 μm. As a result, in the semiconductor device of the second embodiment according to the present invention, destruction did not occur even when the gate voltage was raised to 40V, which is 8V higher than that of the conventional TFT. Therefore, the gate breakdown voltage is approximately 5.7 MV /
It was confirmed that the gate withstand voltage of the TFT of the present invention was drastically improved as compared with the conventional TFT.

(Embodiment 3) In the semiconductor device of the third embodiment, the planar structure of the main part is the same as the above first and second embodiments.
2 is similar to that of the embodiment described above, except that the layer structure has a cross section taken along line AA ′ in FIG. 1 as shown on the left side of FIG. 2, and the cross section taken along line BB ′ in FIG. It is characterized by having a configuration as shown on the right of 2. That is, by covering the intersection of the channel region 15 and the gate electrode 7 with the oxidation barrier film 25, the channel region 15
The oxide film 19 in the vicinity of the intersection of the gate electrode and the source region 21 and the drain 23 region is selectively reoxidized to be thickened. Therefore, the method of manufacturing the semiconductor device of the third embodiment is basically the same as that of the above embodiment, and in particular, the pattern of the oxidation barrier film 25 may be changed. Therefore, in this embodiment, the detailed description of the process flow will be made with reference to the above embodiment, and will be omitted for the sake of brevity.

The T of the third embodiment according to the present invention as described above.
An experiment was conducted to evaluate the gate breakdown voltage of the FT. This TF
The gate size of T was W / L = 10 μm / 10 μm. As a result, in the TFT according to the present invention, destruction did not occur even when the gate voltage was raised to 40V, which is a voltage as high as 8V as compared with the conventional TFT. Therefore, the gate breakdown voltage was about 5.7 MV / cm or more, and it was confirmed that the gate breakdown voltage of the TFT of the present invention was dramatically improved as compared with the conventional TFT. In this experiment, the gate voltage could be applied only up to 40 V, so the difference between the examples could not be confirmed quantitatively, but in all cases, the gate breakdown voltage jumped as compared with the conventional one. It was confirmed that it has improved.

Example 4 An active matrix type liquid crystal display device was formed by using the TFT of the first example.
That is, n-channel TFTs were used as switching elements in the pixel portion of the liquid crystal display device, and n- and p-channel TFTs were used as so-called integrated drive circuits arranged around the TFT substrate. The structure of the main parts such as the active layer and insulating film of these TFTs is the same as that of the TFT of the first embodiment. Then, a signal line to which a display signal voltage is applied is connected as a wiring 11b to the source region 21 of the TFT as the switching element, and a pixel electrode made of an ITO (indium tin oxide) film is connected as a wiring 11a to the drain region 23. Connected In addition, auxiliary capacitors and a black matrix necessary for a liquid crystal display device were also formed.

In the active matrix type liquid crystal display device formed by using the TFT according to the present invention as described above, since the gate breakdown voltage is 40 V or more and there is a margin in the upper limit of the liquid crystal applied voltage, it is driven at a voltage higher than the conventional one. Therefore, it is possible to realize a display image with high contrast.

(Embodiment 5) In the above first embodiment and the like, the case where the present invention is applied to the forward stagger type TFT is shown. In the fifth embodiment, the present invention is applied to the reverse stagger type TFT. The case where it is applied will be described. FIG. 3 is a sectional view showing the structure of the semiconductor device according to the fifth embodiment. The semiconductor device of the fifth embodiment includes a quartz substrate 301, a gate electrode 303, an insulating film 305 which is a gate insulating film, an active layer 307 made of amorphous silicon, and an interlayer insulating film 30.
9, the wirings 311a and 311b, and the passivation film 313 are the main parts of the TFT.

The insulating film 305 has a film thickness of about 700 angstroms at a portion sandwiched between the gate electrode 303 and the channel region 315 of the active layer 307, and the other portion, that is, near the edge portion 317 of the gate electrode 303 (side end surface). The vicinity) is a single layer film with a film thickness of 1300 angstroms.
The fact that the film thickness of that portion is thick also means that the thickness of the portion of the active layer 307 corresponding to the channel edge portion 318 is thick due to the structure of the TFT.

As described above, the vicinity of the edge portion 317 of the gate electrode 303 and the channel edge portion 31 of the active layer 307 are formed.
Since the insulating film 305 in FIG. 8 is formed as thick as 1300 angstroms, the gate breakdown voltage of this portion is improved, and the durability and reliability are improved. Moreover, since the thickness of the insulating film 305 in the portion corresponding to the channel region 315 is formed to be a preferable thickness as a so-called gate insulating film, a predetermined optimum operating characteristic of the TFT is realized.

Next, a method of manufacturing the semiconductor device of the fifth embodiment will be described.

A polycrystalline silicon film doped with P (phosphorus) is formed on the quartz substrate 301 by the LPCVD method,
Patterning is performed to form the gate electrode 303.

Then, a 700 Å-thick oxide film of SiO _x is deposited by LPCVD so as to cover the gate electrode 303.

Then, SiN that prevents oxidation on the oxide film
_An oxide barrier film made of _x is formed and patterned to cover a portion of the active layer 307 formed in a later step, which faces the channel region 315, and then a reoxidation process is performed to cover the oxide barrier film. By selectively re-oxidizing the oxide film in the part avoiding the above, the film thickness of that part is formed to about 1300 angstroms which is thicker than 700 angstroms of the film covered with the oxidation barrier film. After performing the reoxidation process in this way, the oxidation barrier film is peeled off by CDE (chemical dry etching). Thus, the insulating film 305 is obtained.

Then, after wet pretreatment, LP
An amorphous silicon film is deposited to 1500 angstrom by the CVD method and solid phase growth is performed. Then, this is separated into islands to form a substantially rectangular active layer 307, and the insulating film 3 is formed in the center thereof.
A channel region 315 facing the gate electrode 303 is formed via the channel 05, and a source region 319 and a drain region 321 are formed on both sides of the channel region 315.

Then, As ions are implanted into the source region 319 and the drain region 321. At this time, the source region 319 and the drain region 321 have an offset structure, ion implantation is performed in two steps, and the LDD 323 for relaxing electric field concentration at the ends of the source region 319 and the drain region 321 is formed.

Then, the source region 319 and the drain region 3
21 are connected to the wiring 311a and the wiring 311b, respectively, and the passivation film 313 is formed in the same manner as in the first embodiment to obtain the TFT (semiconductor device) of the fifth embodiment according to the present invention.

The T of the fifth embodiment completed in this way
When the gate breakdown voltage of FT was measured, the gate voltage was 50V.
The device was not destroyed even when the temperature was raised to.

Needless to say, the present invention is effective for both n-channel TFTs and p-channel TFTs.

Further, in the above embodiment, the SiN _x film deposited by the LPCVD method was used as the oxidation barrier film, but besides this, the oxidation barrier film also functions as a barrier against the oxidant, and A material having no problem of contamination of impurities released from the oxidation barrier film can be preferably used. Alternatively, if a conductive material is used, it can be used as it is as a part of the gate electrode without peeling even after reoxidation. In this case, the step of removing the oxidation barrier film can be omitted.

In addition, when the surface of the insulating film that was in contact with the oxidation barrier film is roughened when the oxidation barrier film is removed, the insulating film in the roughened portion is once peeled off and then removed again. You may repair by oxidizing again. However, avoid cutting away the thick film portion of the insulating film near the channel edge portion. The material of the film to be attached again for repair is not limited to the oxide film, but may be a nitride film or a laminated structure of these. Needless to say, if there is no need for repair, the oxide barrier film may be simply removed as in the above-mentioned embodiment.

For example, in the case of an inverted stagger type TFT, a gate insulating film may be formed by depositing an insulating film such as SiN _x as another layer on the insulating film of the present invention. Further, as a gate insulating film formed by adding such a separate layer insulating film, not only a single-layer SiN _x film but also an ON
An insulating film having a laminated structure such as a two-layer laminated film such as a film or a three-layer laminated film such as an ONO film may be used.

Further, in this embodiment, the MOS type TFT using the polycrystalline silicon film or the amorphous silicon film as the active layer is exemplified, but in addition to this, a single crystal film by a bonding method or a single crystal by epitaxial growth. A film or a recrystallized film of an amorphous film formed by an energy beam can be used.

In addition, it goes without saying that various changes can be made to the material for forming each part of the semiconductor device of the present invention without departing from the scope of the present invention.

[0066]

As is clear from the detailed description above, according to the present invention, a semiconductor device such as a TFT having improved gate withstand voltage characteristics and improved durability and reliability, and a method for manufacturing the same. Can be provided.

[Brief description of drawings]

FIG. 1 is a plan view showing the structure of a semiconductor device according to a first embodiment.

FIG. 2 is a cross-sectional view showing the structure and manufacturing process of the semiconductor device of the first embodiment.

FIG. 3 is a sectional view showing a structure of a semiconductor device according to a third embodiment.

FIG. 4 is a plan view showing the structure of a conventional semiconductor device.

FIG. 5 is a cross-sectional view showing the structure of a conventional semiconductor device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Quartz substrate, 3 ... Active layer, 5 ... Insulating film, 7 ... Gate electrode, 9 ... Interlayer insulating film, 11a, b ... Wiring, 13 ... Passivation film, 25 ... Oxidation barrier film

Claims (6)

[Claims] 1. A source region and a drain region are formed on a first insulating layer or an insulating substrate by island-shaped element isolation and are formed in a substantially rectangular shape, and a channel region is arranged at a central portion. Are disposed respectively, a second insulating layer that covers the active layer, a second insulating layer that faces the channel region of the active layer through the second insulating layer, and Is electrically connected to the gate electrode that covers at least a part of the side end face of the active layer along the carrier movement direction, and the source region and the drain region on both sides of the channel region of the active layer. In the semiconductor device having a source electrode and a drain electrode, the second insulating layer has a layer thickness of at least one side end portion along the carrier movement direction of the active layer, the gate electrode Wherein a is a single layer which is to thicker compared to the layer thickness of the portion to be sandwiched between the channel region of the active layer. 2. A source region and a drain region are formed on a first insulating layer or an insulating substrate by island-shaped element isolation and are formed into a substantially rectangular shape, and a channel region is arranged at a central portion. A second insulating layer that covers the active layer, a gate electrode that covers at least a part of the channel region of the active layer through the second insulating layer, In a semiconductor device including a source electrode and a drain electrode electrically connected to the source region and the drain region on both sides of the channel region of the active layer, the second insulating layer is At least one of a boundary portion between the channel region and the source region and a boundary portion between the channel region and the drain region has a layer thickness corresponding to the gate electrode and the active layer. The semiconductor device is characterized in that it is a single layer thicker than the layer thickness of the portion sandwiched between the channel region and the channel region. 3. A source region and a drain region are formed on the first insulating layer or the insulating substrate in island-like element-isolated and formed in a substantially rectangular shape, and a channel region is arranged at a central portion. Are disposed respectively, a second insulating layer that covers the active layer, a second insulating layer that faces the channel region of the active layer through the second insulating layer, and Is electrically connected to the gate electrode that covers at least a part of the side end face of the active layer along the carrier movement direction, and the source region and the drain region on both sides of the channel region of the active layer. In the semiconductor device having a source electrode and a drain electrode, the second insulating layer has a layer thickness of at least one side end portion along the carrier movement direction of the active layer, the gate electrode The active layer is formed thicker than the layer sandwiched between the channel region and the channel region, and the boundary between the channel region and the source region and the boundary between the channel region and the drain region of the active layer. Of the single layer, the layer thickness of a portion corresponding to at least one of the boundary portions is thicker than the layer thickness of a portion sandwiched between the gate electrode and the channel region of the active layer. Characteristic semiconductor device. 4. A source region and a drain region are formed on the first insulating layer or on the insulating substrate in island-like element-isolated and formed in a substantially rectangular shape, and a channel region is arranged at a central portion. Are disposed respectively, a second insulating layer that covers the active layer, a second insulating layer that faces the channel region of the active layer through the second insulating layer, and A gate electrode covering at least a part of the active layer so as to intersect the carrier movement direction of the active layer in an oblique direction, and the source region and the drain on both sides of the channel region of the active layer. In a semiconductor device including a source electrode and a drain electrode electrically connected to the region, the second insulating layer has at least one side end portion along a carrier movement direction of the active layer. The layer thickness of the portion is formed thicker than the layer thickness of the portion sandwiched between the gate electrode and the channel region of the active layer, and the boundary portion between the channel region and the source region of the active layer and At least one of the boundary portions between the channel region and the drain region is thicker than the portion corresponding to the boundary portion as compared with the layer thickness sandwiched between the gate electrode and the channel region of the active layer. A semiconductor device having a formed single layer. 5. A step of forming a semiconductor film on an insulating film or an insulating substrate to separate island-shaped elements to form an active layer in a substantially rectangular shape, and an insulating film made of an oxide film so as to cover the active layer. A step of forming a film, and forming an oxidation barrier film on the insulating film to prevent oxidation of the insulating film to cover a portion of the active layer corresponding to a channel region, and subjecting the insulating film to reoxidation treatment. Selectively reoxidizing a portion that is not covered with the oxidation barrier film to form a film thickness of the reoxidized portion larger than a film thickness of the portion covered with the oxidation barrier film; A step of removing the oxidation barrier film after the reoxidation process, and at least a side end face of the active layer facing the channel region of the active layer via the insulating film and along the carrier movement direction of the active layer via the insulating film. Gate electrode to cover a part The method of manufacturing a semiconductor device characterized by comprising the step of forming. 6. A step of forming a gate electrode on an insulating film or an insulating substrate, a step of forming an insulating film made of an oxide film so as to cover the gate electrode, and a step of forming the insulating film on the insulating film. An oxidation barrier film that prevents oxidation is formed to cover a portion of the active layer, which is formed in a later step of the insulation film, facing the channel region, and the insulation film is subjected to reoxidation treatment to be covered with the oxidation barrier film. A step of selectively oxidizing the insulating film in a portion which is avoided to form a film thicker than a film thickness of a portion covered with the oxidation barrier film; and a step of removing the oxidation barrier film after the reoxidation treatment, A semiconductor film is formed and elements are separated into substantially rectangular islands, a channel region facing the gate electrode is formed in the center of the semiconductor film with the insulating film interposed therebetween, and a source region and a drain are provided on both sides of the channel region. Forming a region The method of manufacturing a semiconductor device characterized by comprising the step of forming the active layer.