JPH0621110A - Assembling jig for semiconductor chip - Google Patents

Abstract

PURPOSE:To prevent the osmosis of fused solder into the surrounding part by capillarity at the lower surface of an upper jig having the hole for holding a semiconductor chip. CONSTITUTION:A jig comprises a lower jig 5 having a recess part 4, which can determine the position of a substrate 1, and an upper jig 17 having a hole 6, wherein a semiconductor chip 2 is placed and held. A solder plate 3 is held between the substrate 1 and the semiconductor chip 2 and heated. Thus, the semiconductor chip 2 is soldered to the substrate 1. A gap recess part 11, which is caved upward in the range for securing the height for holding the semiconductor chip 2, is formed around the hole 6 at the lower surface of the upper jig 17. Therefore, the gap between the lower surface of the upper jig 17 and the substrate 1 becomes large at the gap recess part 11 around the semiconductor chip 2 and the solder plate 3, and the flowing of the fused solder on the upper surface of the substrate 1 caused by capillarity is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an assembly jig for positioning and inserting a semiconductor chip on a circuit board having a copper electrode plate and inserting it in a heating furnace.

[0002]

2. Description of the Related Art FIG. 4 is a sectional view of a main part of a conventional example. In the figure, the structure of this assembly jig includes a lower jig 5 having a concave portion 4 for positioning the substrate 1 and an upper jig 7 having a hole 6 for dropping and holding the semiconductor chip 2 and having a flat lower surface. Consists of. The solder plate 3 is sandwiched between the substrate 1 and the semiconductor chip 2 and inserted into a heating furnace to melt the solder plate 3 and fix the semiconductor chip 2 to the substrate 1. There is a slight gap 8 between the lower jig 5 and the upper jig 7 due to a working error or the like. Although not shown in the figure, for example, DBC (direct bonding c
40 mm × 20 for the circuit board 1 such as an opper board
With respect to one concave portion 4 having a square shape of 2 mm to 0 mm,
A plurality of holes 6 for the semiconductor chip 2 having a thickness of 2 mm are provided, and the thickness of the solder plate is 0.1 mm. The material for the jigs 5 and 7 is graphite carbon or stainless steel, which does not wet the molten solder.

[0003]

In the above-mentioned conventional example, since it is necessary to hold the thin semiconductor chip 2 mounted on the thin solder plate 3 in the hole 6 of the upper jig 7, the lower surface of the upper jig 7 and the substrate There are few gaps with 1. Therefore, when the component is set on the jig and inserted into the heating furnace and the solder plate 3 is melted, the molten solder flows on the upper surface of the substrate 1 due to a capillary phenomenon, resulting in poor electrical characteristics. In some cases, the molten solder may penetrate into the gap 8 between the lower jig 5 and the upper jig 7, and may be electrically connected to the adjacent substrate 1 or semiconductor chip 2 (not shown), resulting in a complete product failure.

An object of the present invention is to provide a semiconductor chip assembling jig which can prevent molten solder from permeating the lower surface of an upper jig having a hole for holding a semiconductor chip into the surroundings by a capillary phenomenon.

[0005]

A jig for assembling a semiconductor chip according to the present invention comprises a lower jig having a recess for positioning a substrate and an upper jig having a hole for dropping and holding the semiconductor chip. , A semiconductor chip assembly jig for soldering the semiconductor chip to the substrate by heating by sandwiching a solder plate between the substrate and the semiconductor chip, around the hole on the lower surface of the upper jig. A gap recessed upward is formed in a range that secures the height for holding the semiconductor chip. At this time, it is preferable that the area of the gap recess is made larger than the area of the recess, or the gap recess and the hole form an edge surrounding the semiconductor chip.

[0006]

Operation Referring to FIG. Semiconductor chip 2 and solder plate 3
The gap between the lower surface of the upper jig 17 and the substrate 1 becomes larger in the gap concave portion 11 at the periphery of the area, and molten solder is prevented from flowing on the upper surface of the substrate 1 by the capillary phenomenon. At this time,
When the area of the gap concave portion 21 is made larger than the area of the concave portion 4, the solder flow is more surely prevented, and the gap 8 does not penetrate. The gap recess 31 and the hole 6 form the semiconductor chip 1
By forming the edge 31a that surrounds the semiconductor chip 2, the gap between the lower surface of the upper jig 37 and the substrate 1 becomes larger in the gap concave portion 31 with respect to the hole 6 whose height is limited for holding the semiconductor chip 2. Therefore, the molten solder is reliably prevented from flowing on the upper surface of the substrate 1 due to the capillary phenomenon.

[0007]

FIG. 1 is a sectional view of an essential part of the first embodiment, FIG. 2 is a sectional view of an essential part of the second embodiment, and FIG. 3 is a sectional view of an essential part of the third embodiment. In the drawings, the conventional example and the parts to which the same reference numerals are attached have approximately the same function, and duplicated description may be omitted. In FIG. 1, the structure of this assembly jig is as follows: a lower jig 5 having a concave portion 4 for positioning the substrate 1 and an upper jig 17 having a hole 6 for holding the semiconductor chip 2 dropped therein.
Consists of. The semiconductor chip 2 is soldered to the substrate 1 by sandwiching and heating the solder plate 3 between the substrate 1 and the semiconductor chip 2.

The above structure is approximately the same as the conventional example.
As a characteristic structure of the first embodiment, a gap recess 11 is formed around the hole 6 on the lower surface of the upper jig 17 so as to be recessed upward within a range that secures a height for holding the semiconductor chip 2. According to such a structure, the gap between the lower surface of the upper jig 17 and the substrate 1 becomes large in the gap concave portion 11 around the semiconductor chip 2 and the solder plate 3, and the molten solder is capillarized to cause Flowing over the top surface is prevented.

At this time, as in the second embodiment, the upper jig 27
When the area of the gap concave portion 21 is larger than the area of the concave portion 4, the solder flow is more reliably prevented and the gap 8 does not penetrate. As in the third embodiment, the gap concave portion 31 of the upper jig 37 and the hole 6 surround the edge 31a surrounding the semiconductor chip 1.
When the semiconductor chip 2 is held, the lower surface of the upper jig 37 and the substrate 1 are formed in the holes 6 whose height is limited.
The gap between and becomes larger in the gap concave portion 31, and the molten solder is reliably prevented from flowing on the upper surface of the substrate 1 by the capillary phenomenon.

[0010]

According to the semiconductor chip assembling jig of the present invention, the gap between the lower surface of the upper jig and the substrate becomes large in the gap concave portion around the semiconductor chip and the solder plate, and the molten solder is capillarized. It is possible to prevent the phenomenon from flowing on the upper surface of the substrate and to prevent the phenomenon from penetrating into the gap. At this time, if the region of the gap recess is larger than the region of the recess, solder flow is more reliably prevented, and if the gap recess and the hole form an edge surrounding the semiconductor chip, the lower surface of the upper jig is There is an effect that the gap between the substrate and the substrate becomes larger in the gap concave portion, and molten solder is reliably prevented from flowing on the upper surface of the substrate due to the capillary phenomenon.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a main part of a first embodiment.

FIG. 2 is a cross-sectional view of a main part of the second embodiment.

FIG. 3 is a cross-sectional view of a main part of the third embodiment.

FIG. 4 is a sectional view of a main part of a conventional example.

[Explanation of symbols]

 1 substrate 2 semiconductor chip 3 solder plate 4 recess 5 lower jig 6 hole 7 upper jig 8 gap 11 gap recess 17 upper jig 21 gap recess 27 upper jig 31 gap recess 37 upper jig 39a edge

Claims (3)

[Claims] 1. A lower jig having a recess for positioning a substrate and an upper jig having a hole for dropping and holding a semiconductor chip, wherein a solder plate is sandwiched between the substrate and the semiconductor chip. In a jig for assembling a semiconductor chip for soldering the semiconductor chip to the substrate by heating at, the upper surface of the lower surface of the upper jig is secured within a range that secures a height for holding the semiconductor chip around the hole. A jig for assembling a semiconductor chip, characterized in that a recess is formed. 2. The jig for assembling a semiconductor chip according to claim 1, wherein a region of the gap recess is larger than a region of the recess. 3. The jig for assembling a semiconductor chip according to claim 1, wherein the gap recess and the hole form an edge surrounding the semiconductor chip.