JPS60182189A - Soldering method - Google Patents
Soldering methodInfo
- Publication number
- JPS60182189A JPS60182189A JP3595484A JP3595484A JPS60182189A JP S60182189 A JPS60182189 A JP S60182189A JP 3595484 A JP3595484 A JP 3595484A JP 3595484 A JP3595484 A JP 3595484A JP S60182189 A JPS60182189 A JP S60182189A
- Authority
- JP
- Japan
- Prior art keywords
- soldering
- solder
- printed circuit
- circuit board
- parts
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔技術分野〕
本発明は印刷回路基板にフレキシブルプリント基板等の
印刷回路基板及び電子部品などの被はんだ部材を電気的
に接続するためのはんだ付は方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a soldering method for electrically connecting a printed circuit board, such as a flexible printed circuit board, and a member to be soldered, such as an electronic component, to a printed circuit board.
この様な印刷回路基板と被はんだ部材とのはんだ付は方
法は、従来、例えば第１図乃至第３図に示した様に行な
われている。Conventionally, such a method for soldering a printed circuit board and a member to be soldered is performed as shown in FIGS. 1 to 3, for example.
すなわち、第１図及び第２図において、印刷回路基板１
の配線パターン２とフレキシブルプリント基板等の印刷
回路基板３の配線ノやターン４をはんだで接続するには
配線パターン２，４の少くとも一方に予備はんだを施し
ておき、図示した例では４つのはんだ付は部位の全部を
カバーする温度調節機能を持ったコテ６（第２図）を基
板３に押し付け、はんだ５を溶融させてはんだ付けを行
う接触加熱方法がある。この場合コテ６と基板１の平行
度が出てないと１つのはんだは溶融するが、もう１つの
はんだは溶融しないといったはんだの溶融むらによυ、
はんだ付は不良が生じる。また予備はんだ量がはんだ付
は部位によシ異る場合、予備はんだ量がある部位で適正
量よシ少い時は未はんだが起こり、多い時は隣接するは
んだ部位間ではんだブリッジが生じる。したがって、こ
れｌらのはんだ付は不良を予防するため、配線・ぐター
ンを狭くとれないのが現状である。また未溶融はんだを
溶融するため溶着回数を多くすると、コテ６にフラック
スが固着するためコテ６と印刷回路基板４との熱抵抗が
増加し作業性が悪くなったシコテ６の寿命が短くなった
シする。That is, in FIGS. 1 and 2, the printed circuit board 1
To connect the wiring pattern 2 and the wiring or turn 4 of the printed circuit board 3 such as a flexible printed circuit board with solder, pre-solder is applied to at least one of the wiring patterns 2 and 4. In the illustrated example, four For soldering, there is a contact heating method in which a soldering iron 6 (FIG. 2) with a temperature control function that covers the entire part is pressed against the board 3 to melt the solder 5 and perform soldering. In this case, if the iron 6 and the board 1 are not parallel, one solder will melt but the other will not, resulting in uneven melting of the solder.
Soldering causes defects. Furthermore, if the amount of pre-solder differs depending on the location, if the amount of pre-solder is less than the appropriate amount in a certain location, unsoldering will occur, and if it is large, solder bridges will occur between adjacent solder locations. Therefore, in order to prevent defects in these soldering methods, it is currently impossible to make the wiring/guts narrow. In addition, when the number of welding is increased to melt the unmolten solder, the flux sticks to the solder iron 6, which increases the thermal resistance between the solder iron 6 and the printed circuit board 4, resulting in poor workability and shortening the life of the solder iron 6. I will do it.
一方、第３図に示すように印刷回路基板１の配線・リー
ン２と電子−品３′の電極部４′とをはんだ５で接続す
る場合、ホ、ドブレート、赤外線等の加熱源を用いてリ
フローはんだ付けする方法、あるいは、電子部品ぎを接
着剤で仮止めしフローはんだ付けする方法が採られる。On the other hand, when connecting the wiring line 2 of the printed circuit board 1 and the electrode part 4' of the electronic component 3' with the solder 5 as shown in FIG. Reflow soldering is used, or electronic components are temporarily fixed with adhesive and flow soldered.
これらの方法では、基板１の配線パターン２と隣接する
配線・やターン２との間隔が狭い場合、容易にはんだブ
リッジが生じるために、ノ臂ターンの間隔をある程度広
くとる必要があシ、基板の高密度実装ができないという
欠点があった。In these methods, if the spacing between the wiring pattern 2 on the board 1 and the adjacent wiring/turn 2 is narrow, solder bridging will easily occur, so it is necessary to make the spacing between the lower turns a certain degree wide. The drawback was that high-density packaging was not possible.
本発明の１つは、はんだの溶融むら、未はんだ、はんだ
ブリ、ジ等のはんだ不良を良好に防止することのできる
はんだ付は方法を提供することにある。One object of the present invention is to provide a soldering method that can effectively prevent solder defects such as uneven melting of solder, unsoldered material, solder blots, and cracks.
本発明の他の１つの目的は、はんだ付は部位の間隔を狭
くしてもはんだ付は不良が生じないため、基板の高密度
実装が可能となる、はんだ付は方法を提供することにあ
る。Another object of the present invention is to provide a soldering method that enables high-density mounting of boards because soldering does not cause defects even when the distance between soldering parts is narrowed. .
本発明の他のもう１つの目的は、はんだ付けの作業性、
効率、はんだ用治具の維持等にすぐれたはんだ付は方法
を提供することにある。Another object of the present invention is to improve soldering workability.
The object of the present invention is to provide a method for soldering that is efficient, maintains the soldering jig, etc.
上記目的は、印刷回路基板と被はんだ部材とを予め決め
られた単一もしくは複数の部位ではんだ付けする方法に
おいて、少なくとも前記はんだ付は部位を接続するのに
必要な位置にはんだを保持したはんだ保持部材を、前記
印刷回路基板と被はんだ部材との間にはさんではんだ付
けを行なうことによシ、達成される。The above object is to provide a method of soldering a printed circuit board and a soldered member at a single or multiple predetermined locations, at least the soldering is performed using solder that holds solder in the position necessary to connect the locations. This is achieved by sandwiching the holding member between the printed circuit board and the member to be soldered and performing soldering.
以下、本発明の好適な実施態様を、添付した図面第４図
乃至第６図を参照して説明する。Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings 4 to 6.
第４図は本発明の一実施例を説明するための図であシ、
１１は印刷回路基板、１２は基板１１の配線パターンで
ある。配線パターン１２は等しい間隔Ａをあけて基板１
１上に配設されている。また、１３は基板１１にはんだ
付けされるフレキシブルプリント基板等の印刷回路基板
であυ、１４は基板１３の配線ノ１ターンである。配線
パターン１４はパターン１２の間隔と等しい間隔Ａ′ｆ
：あけて基板１３上に配設されている。第４図の例では
これらノ（ターン１２．１４を相対向させて４つのはん
だ付は部位を形成している。本発明のはんだ付は部位の
個数はこれに限定されず、１つ又は２つ以上のどの個数
でもよい。FIG. 4 is a diagram for explaining one embodiment of the present invention.
11 is a printed circuit board, and 12 is a wiring pattern of the board 11. The wiring patterns 12 are connected to the substrate 1 at equal intervals A.
It is located on 1. Further, 13 is a printed circuit board such as a flexible printed circuit board which is soldered to the board 11, and 14 is one turn of the wiring of the board 13. The wiring pattern 14 has an interval A'f equal to the interval of the pattern 12.
: Disposed on the board 13 with a gap. In the example of FIG. 4, these four soldering parts (with turns 12 and 14 facing each other) form a soldering part.The number of soldering parts of the present invention is not limited to this, but one or two Any number greater than or equal to one is acceptable.
第４図中１５ははんだ保持部材であシ、はんだ１６を保
持するための厚み方向に貫通した複数の孔１７を有する
電気絶縁板で構成されている。第６図に示した様に、貫
通孔１７は絶縁板の上下左右方向に等しい間隔Ｂで配置
されており、それぞし等しい孔径Ｃを有している。Reference numeral 15 in FIG. 4 denotes a solder holding member, which is composed of an electrically insulating plate having a plurality of holes 17 passing through in the thickness direction for holding solder 16. As shown in FIG. 6, the through holes 17 are arranged at equal intervals B in the vertical and horizontal directions of the insulating plate, and have the same hole diameter C.
第４図及び第５図の例のように複数のはんだ付は部位を
はんだ付けする場合には、パターン１２゜１４のピッチ
、即ちパターンの間隔Ａにパターンの幅を足した長さに
対し、貫通孔１７０間隔Ｂをより狭くとることは必須で
あるが、更に、間隔Ａに対して貫通孔１７の径Ｃをよ−
り小さくすることにより、はんだ保持部材の不必要な位
置決めを省略できるために好ましい。この様な条件のも
とて各対向パターン１２．１４間を貫通孔１７内に保持
されたはんだ１６の少なくとも１つで接続できる様に、
はんだ付は部位及び貫通孔の配置を適宜選択することが
できる。When soldering multiple parts as in the example of Figs. 4 and 5, the pitch of the pattern 12°14, that is, the length of the pattern interval A plus the width of the pattern, Although it is essential to make the interval B between the through holes 170 narrower, it is also necessary to make the diameter C of the through holes 17 narrower with respect to the interval A.
By making the solder holding member smaller, unnecessary positioning of the solder holding member can be omitted, which is preferable. Under such conditions, each of the opposing patterns 12 and 14 can be connected with at least one of the solders 16 held in the through hole 17.
For soldering, the location and arrangement of the through holes can be selected as appropriate.
この様にはんだを保持した保持部材１５を基板１１．１
３間にはさんではんだ付けするとき、貫通孔１７の径Ｃ
が、溶融はんだが毛細管現象によシ脱落しない程度に小
さな径とされている場合、あるいは脱落しても基板１１
．１３に何ら支障をきたさない場合には、はんだ保持部
材の全体を加熱する様に、例えば、第２図に示した方法
でコテ６を基板１３に当接してはんだ付けを行なうこと
ができる。The holding member 15 holding the solder in this way is attached to the substrate 11.1.
When soldering between 3 and 3, the diameter C of the through hole 17
However, if the diameter is small enough that the molten solder does not fall off due to capillary action, or even if it falls off, the board 11
．． 13, the soldering iron 6 can be brought into contact with the substrate 13 by the method shown in FIG. 2, for example, so as to heat the entire solder holding member.
また、逆に、貫通孔１７の径Ｃが、溶融はんだが脱落し
てしまう程の大きさであり、脱落により基板１１．１３
に支障をきたす場合は、各はんだ部位を基板１３の上方
からレーザー光を照射してスポット加熱によシはんだ付
けして、はんだ部位以外のはんだの脱落を防ぐことが好
ましい。また、この様に、溶融はんだの脱落による短絡
故障等を防ぐことなどを企図して、基板１１．１３の少
なくとも一方のはんだ付は部位以外の部分をはんだレジ
ストで被覆しておくと、好ましい。In addition, on the contrary, the diameter C of the through hole 17 is large enough to allow the molten solder to fall off, causing the board 11.
If this is the case, it is preferable to irradiate each solder portion with a laser beam from above the substrate 13 and perform spot heating to solder the solder portions to prevent the solder from falling off at other portions. Further, in order to prevent short-circuit failures due to falling of molten solder, it is preferable to cover the parts other than the soldering parts of at least one of the boards 11 and 13 with a solder resist.
第４図及び第５図に示した例によれ、Ｉ 前記配線パタ
ーンのピッチが０．０６ＷＭ程度にｌっ７４場合でも、
貫通孔の孔径を０．０６ｍｍ以下とすることは可能であ
り、狭ピッチ、例えば１６ ｐｅｔ実装でも使用可能な
高密度実装が可能である。According to the example shown in FIGS. 4 and 5, even if the pitch of the wiring pattern is about 0.06 WM,
It is possible to make the hole diameter of the through hole 0.06 mm or less, and high-density mounting that can be used even with a narrow pitch, for example, 16 pet mounting is possible.
前記はんだ保持部材の材質は、特に制限されないが、電
気絶縁体、とくに非導電性の樹脂又はエラストマーが好
適である。このうち、はんだ溶融時にも熱変形、融解、
分解を起こさない樹脂又はニジストマー、とりわけふっ
素樹脂、ふっ素ゴム、シリコーン樹脂、シリコーンゴム
、ポリカーボネート樹脂、エポキシ樹脂、ポリイミド樹
脂、ポリインライミダゾール樹脂、ポリイミドアミド樹
脂、ポリジフェニルエーテル樹脂などを賞月することが
できる。The material of the solder holding member is not particularly limited, but an electrical insulator, particularly a non-conductive resin or elastomer, is suitable. Of these, thermal deformation, melting, and
Resins or distomers that do not decompose, especially fluororesins, fluororubbers, silicone resins, silicone rubbers, polycarbonate resins, epoxy resins, polyimide resins, polyimidazole resins, polyimide amide resins, polydiphenyl ether resins, etc. can be used. .
第５図は、本発明の他の実施例を説明するための図であ
る。この例は印刷回路基板２１の配線パターン２２．に
例えばチップ抵抗、積層セラミックコンデンサー、フラ
ットノ５ノケージ型ＩＣ等のチップ部品、リード部品な
どの電子部品２３の電極部２４をはんだ付けする場合で
あシ、この場合には、第３図に示した様なりフローはん
だ付けを行なうことなしに、第４図及び第６図に示して
説明したはんだ保持部材１５を用い、スポット加熱、は
んだごてによる加熱等で貫通孔１７内のはんだ１６を溶
融して、はんだ付けを行なう。FIG. 5 is a diagram for explaining another embodiment of the present invention. In this example, the wiring pattern 22 of the printed circuit board 21. For example, when soldering an electrode portion 24 of an electronic component 23 such as a chip resistor, a multilayer ceramic capacitor, a flat five-no-cage type IC, a chip component, or a lead component, as shown in FIG. Using the solder holding member 15 shown and explained in FIGS. 4 and 6, the solder 16 in the through hole 17 is melted by spot heating, heating with a soldering iron, etc. without performing flow soldering. Then, perform soldering.
なお、第４図及び第５図の例で、はんだ保持部材１５自
体を配線パターンにしてジャンパー線にも利用できる。In addition, in the examples shown in FIGS. 4 and 5, the solder holding member 15 itself can be used as a wiring pattern and used as a jumper wire.
またこの部材１５の貫通孔１７の内壁にメッキ等の処理
を施しておけばはんだが配線ノ臂ターン２および被はん
だ部材３のパターンおよび電子部品７の電極部１２には
んだが吸いよせられても電気的導通がとれることより良
質なはんだ付けが可能と彦る。In addition, if the inner wall of the through hole 17 of this member 15 is subjected to a treatment such as plating, even if the solder is absorbed into the wiring arm turn 2, the pattern of the soldered member 3, and the electrode portion 12 of the electronic component 7, Since electrical continuity can be achieved, high-quality soldering is possible.
本発明によれば、未はんだ、はんだブリツノ等のはんだ
付は不良を未然に防ぐことができると共に、はんだ付は
部位が互いに近接している場合でもはんだブリ、ジが生
じないため基板の高密度実装を可能にすることができる
。また、はんだゴテ等の治具へのフラックスの固着など
も良好に防止されるため、はんだ付けの作業性、効率、
はんだ用治其の維持等の面ですぐれたはんだ付は方法と
いえる。According to the present invention, it is possible to prevent soldering defects such as unsolder and solder spots, and also to prevent soldering defects from occurring even when the soldering parts are close to each other, so that the board is densely packed. implementation can be made possible. It also effectively prevents flux from sticking to jigs such as soldering irons, improving soldering workability and efficiency.
Soldering can be said to be an excellent method in terms of maintaining soldering properties.
第１図乃至第３図は、従来のはんだ付は方法を説明する
ための図であシ、第１図は印刷回路基板とフレキシブル
プリント基板等の被はんだ基板とを複数のはんだ付は部
位ではんだ付けした状態を示した模式図、第２図は第１
図のはんだ付けをはんだごてで行なう場合の態様を示し
た断面図、第３図は印刷回路基板と電子部品とをはんだ
付けした状態を示した断面図である。
第４図乃至第６図は本発明のはんだ付は方法を説明する
ための図であシ、第４図は印刷回路基板゛ とフレキシ
ブルプリント基板等の被はんだ基板とを複数のはんだ付
は部位ではんだ付けした状態を示した断面図、第５図は
印刷回路基板と電子部品とをはんだ付けした状態を示し
た断面図、第６図は本発明で使用するはんだ保持部拐の
形状を示した模式図である。
１．１１．２１・・・印刷回路基板、２．２’、１２゜
２２・・・配線パターン、３．１３・・・フレキシブル
プリント基板、３’、２３・・・電子部品、４．１４・
・・配線パターン、４’、２４・・・電極部、５．１６
・・・はんだ、６・・・はんだブチ、１５・・・はんだ
保持部材、１７・・・貫通孔〇
箪３図
第５図
＠６図
７Figures 1 to 3 are diagrams for explaining the conventional soldering method. A schematic diagram showing the soldered state, Figure 2 is the 1st
FIG. 3 is a cross-sectional view showing a state in which the soldering shown in the figure is performed with a soldering iron, and FIG. 3 is a cross-sectional view showing a state in which a printed circuit board and an electronic component are soldered. Figures 4 to 6 are diagrams for explaining the soldering method of the present invention, and Figure 4 shows a printed circuit board and a board to be soldered, such as a flexible printed circuit board, in which a plurality of soldering parts are connected. 5 is a sectional view showing a printed circuit board and an electronic component soldered together, and FIG. 6 shows the shape of a solder holding part used in the present invention. FIG. 1.11.21... Printed circuit board, 2.2', 12゜22... Wiring pattern, 3.13... Flexible printed circuit board, 3', 23... Electronic component, 4.14.
...Wiring pattern, 4', 24...Electrode part, 5.16
...Solder, 6...Solder socket, 15...Solder holding member, 17...Through hole
Claims (6)
た単一もしくは複数の部位ではんだ付けする方法におい
て、少なくとも前記はんだ付は部位を接続するのに必要
な位置にはんだを保持したはんだ保持部材を、前記印刷
回路基板と被はんだ部材との間にはさんではんだ付けを
行なうことを特徴とするはんだ付は方法。(1) In a method of soldering a printed circuit board and a member to be soldered at a single or multiple predetermined locations, at least the soldering involves a solder holder that holds the solder at the position necessary to connect the locations. A soldering method characterized in that soldering is performed by sandwiching a member between the printed circuit board and the member to be soldered.
方向に貫通した単一もしくは複数の孔を有する電気絶縁
板で構成されている特許請求の範囲第（１）項記載のは
んだ付は方法。(2) The soldering method according to claim (1), wherein the solder holding member is constituted by an electrically insulating plate having one or more holes penetrating in the thickness direction for holding the solder. .
はんだ付は部位の間隔よりも、貫通孔の径の方を特徴と
する特許請求の範囲第（２）項記載のはんだ付は方法。(3) When soldering multiple parts,
The soldering method according to claim 2, wherein the soldering method is characterized by the diameter of the through hole rather than the distance between the parts.
貫通孔の径が溶融はんだが脱落しない大きさとされてい
る場合には、はんだ保持部材全体を加熱してはんだ付け
を行なう特許請求の範囲第（２）項又は第（３）項記載
のはんだ付は方法。(4) When soldering multiple parts,
When the diameter of the through hole is set to a size that prevents molten solder from falling out, the soldering method according to claim 2 or 3, wherein the soldering is performed by heating the entire solder holding member. is the method.
貫通・孔の径が溶融はんだが脱落する大きさとされてい
る場合には、はんだ付は部位のスＩ。 ト加熱によルはんだ付けを行なう特許請求の範囲第（２
）項又は第（３）項記載のはんだ付は方法。(5) When soldering multiple parts,
If the diameter of the through hole is large enough to allow molten solder to fall out, soldering should be done at the location. Claim No. 2 (2) which performs soldering by heating
) or (3) is the soldering method.
はんだレジストで被覆されている特許請求の範囲第（１
）項乃至第（５）項の１に記載のはんだ付は方法。(6) For parts other than the soldering parts of the printed circuit board,
Claim No. 1 covered with solder resist
) to (5), the soldering method described in item 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59035954A JP2548691B2 (en) | 1984-02-29 | 1984-02-29 | Soldering method and electric circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59035954A JP2548691B2 (en) | 1984-02-29 | 1984-02-29 | Soldering method and electric circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60182189A true JPS60182189A (en) | 1985-09-17 |
| JP2548691B2 JP2548691B2 (en) | 1996-10-30 |
Family
ID=12456366
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59035954A Expired - Lifetime JP2548691B2 (en) | 1984-02-29 | 1984-02-29 | Soldering method and electric circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2548691B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS613497A (en) * | 1984-06-15 | 1986-01-09 | 富士通株式会社 | Electric connecting structure of different type composite printed board |
| JPH03151162A (en) * | 1989-11-06 | 1991-06-27 | Mitsubishi Electric Corp | Soldering sheet |
| GB2291625A (en) * | 1994-02-28 | 1996-01-31 | Kokuyo Company Limited | Document binding tool |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55142535U (en) * | 1979-03-29 | 1980-10-13 | ||
| JPS5835935A (en) * | 1981-08-28 | 1983-03-02 | Fujitsu Ltd | Semiconductor device and manufacture thereof |
-
1984
- 1984-02-29 JP JP59035954A patent/JP2548691B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55142535U (en) * | 1979-03-29 | 1980-10-13 | ||
| JPS5835935A (en) * | 1981-08-28 | 1983-03-02 | Fujitsu Ltd | Semiconductor device and manufacture thereof |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS613497A (en) * | 1984-06-15 | 1986-01-09 | 富士通株式会社 | Electric connecting structure of different type composite printed board |
| JPH03151162A (en) * | 1989-11-06 | 1991-06-27 | Mitsubishi Electric Corp | Soldering sheet |
| GB2291625A (en) * | 1994-02-28 | 1996-01-31 | Kokuyo Company Limited | Document binding tool |
| GB2291625B (en) * | 1994-02-28 | 1998-03-25 | Kokuyo Kk | Device for binding documents and the like |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2548691B2 (en) | 1996-10-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |