JPH088510A - Leadless chip carrier - Google Patents

Leadless chip carrier

Info

Publication number
JPH088510A
JPH088510A JP13897094A JP13897094A JPH088510A JP H088510 A JPH088510 A JP H088510A JP 13897094 A JP13897094 A JP 13897094A JP 13897094 A JP13897094 A JP 13897094A JP H088510 A JPH088510 A JP H088510A
Authority
JP
Japan
Prior art keywords
chip carrier
printed wiring
wiring board
leadless chip
electrode edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP13897094A
Other languages
Japanese (ja)
Inventor
Shuichi Furuichi
修一 古市
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP13897094A priority Critical patent/JPH088510A/en
Publication of JPH088510A publication Critical patent/JPH088510A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof

Abstract

PURPOSE:To provide a leadless chip carrier which has a mounting pad capable of improving solder adhesiveness between a mother board and the leadless chip carrier, and enables mounting with high continuity reliability. CONSTITUTION:In a leadless chip carrier having an electrode edge conductor 3 provided on a lateral side 2 of a printed wiring board 1 and a mounting pad 6 linked with the electrode edge conductor 3 and formed on a back side 5 of the printed wiring board 1, the minimum distance from every point on a curve 7 formed by a lateral side 4 of the electrode edge conductor 3 and the back side 5 to an end part 21 of the mounting pad 6 surrounding the curve 7 is not more than 0.6mm.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体チップなどの電
子部品や電気部品等の搭載に用いられるリードレスチッ
プキャリアに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a leadless chip carrier used for mounting electronic parts such as semiconductor chips and electric parts.

【0002】[0002]

【従来の技術】従来、図4、図5に示す如く、プリント
配線板1の表面には、半導体チップを搭載する窪み8、
側面2にはスルホールを軸方向に切断して残存してなる
電極エッジ導体3を設けて構成されたリードレスチップ
キャリア(以下、LCCと言う。)が知られている。こ
のようなLCC9は、プリント配線板1、このプリント
配線板1の表面10に半導体チップを搭載する窪み8、
この窪み8の周囲に形成した信号回路11、この信号回
路11と導通し、側面2に露出する電極エッジ導体3、
および、この電極エッジ導体3に連設して、プリント配
線板1の裏面5に形成された実装用パッド6を備える。
2. Description of the Related Art Conventionally, as shown in FIGS. 4 and 5, a recess 8 for mounting a semiconductor chip is formed on the surface of a printed wiring board 1.
There is known a leadless chip carrier (hereinafter, referred to as LCC) configured by providing an electrode edge conductor 3 formed by cutting a through hole in an axial direction and remaining on the side surface 2. Such an LCC 9 includes a printed wiring board 1, a recess 8 for mounting a semiconductor chip on a surface 10 of the printed wiring board 1,
A signal circuit 11 formed around the recess 8; an electrode edge conductor 3 that is electrically connected to the signal circuit 11 and is exposed on the side surface 2;
Further, a mounting pad 6 formed on the back surface 5 of the printed wiring board 1 is provided so as to be connected to the electrode edge conductor 3.

【0003】上記LCCをプリント配線板からなるマザ
ーボードに実装する場合、このLCCの裏面に形成され
た実装用パッドと、マザーボード上の接続用パッドと
を、接続材料として半田を用いて接続し、マザーボード
に実装する方法が知られている。
When the LCC is mounted on a mother board made of a printed wiring board, the mounting pads formed on the back surface of the LCC and the connecting pads on the mother board are connected by using solder as a connecting material, and the mother board is connected. It is known how to implement.

【0004】このLCCをマザーボードに実装する方法
は、図3に示す如く、マザーボード12に形成された接
続用パッド13に、一定量の半田クリーム14を塗布
し、このマザーボード12にLCC9を重ね合わせ、加
熱を行い、上記半田クリーム14を溶融し、さらに、除
熱して半田を再凝固して溶着する方法が知られている。
As shown in FIG. 3, a method of mounting this LCC on a mother board is to apply a fixed amount of solder cream 14 to a connecting pad 13 formed on the mother board 12 and superimpose the LCC 9 on the mother board 12. A method is known in which heating is performed to melt the solder cream 14, and then the heat is removed to re-solidify the solder for welding.

【0005】ところが、図7に示す如く、上述のLCC
とマザーボードを溶着する方法を使用する場合、LCC
9の実装用パッド6の、電極エッジ導体3の側面4と裏
面5とで形成される稜線7上の全ての点より、この稜線
7を囲む実装用パッド6の縁端部21までの最短距離L
1が、1mm〜1.5mmで、実装用パッド6の面積が
大きいので、接続用パッド13に塗布した半田クリーム
14が溶融するときに、LCC9の実装用パッド6の表
面に沿って流動する半田の量が、電極エッジ導体3の側
面4に沿って流動する半田の量に比べ多くなり、溶融し
た半田の電極エッジ導体3の側面4への表面張力による
上昇が少なくなり、電極エッジ導体3と接続用パッド1
3との境界部分に形成される半田フィレット15が充分
に形成されないことがあった。また、上記実装用パッド
6の金めっき16の厚さが、0.5μm以上になると、
接続用パッド13に塗布した半田を溶融した際に、溶融
した半田の中に金が拡散移行し、いわゆる半田の金食わ
れ現象が生じて半田の性能劣化が起こり、溶融した半田
の流動性が悪くなり、電極エッジ導体3と接続用パッド
13との境界部分に形成される半田フィレット15が充
分に形成されず、マザーボード12に対しほぼ平行な表
面を有する半田フィレット15が形成されることがあっ
た。このように、電極エッジ導体3への半田の持ち上が
りが少なく、その表面がマザーボード12に対しほぼ平
行な表面を有する半田フィレット15は、LCC9とマ
ザーボード12を接着する接着力が低く、接続不良が発
生し、導通信頼性を損なう問題があった。
However, as shown in FIG. 7, the LCC described above is used.
When using the method of welding the motherboard with the LCC
The shortest distance from all points of the mounting pad 6 of No. 9 on the ridge line 7 formed by the side surface 4 and the back surface 5 of the electrode edge conductor 3 to the edge portion 21 of the mounting pad 6 surrounding the ridge line 7. L
1 is 1 mm to 1.5 mm, and the area of the mounting pad 6 is large. Therefore, when the solder cream 14 applied to the connection pad 13 is melted, the solder flowing along the surface of the mounting pad 6 of the LCC 9 is used. Is larger than the amount of solder flowing along the side surface 4 of the electrode edge conductor 3, and the rise of the molten solder due to the surface tension of the side surface 4 of the electrode edge conductor 3 is small, and Connection pad 1
In some cases, the solder fillet 15 formed at the boundary portion with 3 was not sufficiently formed. Further, when the thickness of the gold plating 16 of the mounting pad 6 becomes 0.5 μm or more,
When the solder applied to the connection pad 13 is melted, gold diffuses and transfers into the melted solder, a so-called solder erosion phenomenon occurs, the performance of the solder deteriorates, and the fluidity of the melted solder increases. In some cases, the solder fillet 15 formed at the boundary between the electrode edge conductor 3 and the connection pad 13 is not sufficiently formed, and the solder fillet 15 having a surface substantially parallel to the mother board 12 may be formed. It was In this way, the solder fillet 15 having a small amount of solder lifted to the electrode edge conductor 3 and having a surface substantially parallel to the mother board 12 has a low adhesive force for bonding the LCC 9 and the mother board 12, resulting in poor connection. However, there is a problem that the reliability of conduction is impaired.

【0006】[0006]

【発明が解決しようとする課題】本発明は上記の事情に
鑑みてなされたものであり、その目的とするところは、
マザーボードとリードレスチップキャリアの半田接着力
の向上を図ることができる実装用パッドを有し、導通信
頼性の高い実装が行うことができるリードレスチップキ
ャリアを提供することにある。
The present invention has been made in view of the above circumstances, and its object is to:
An object of the present invention is to provide a leadless chip carrier which has a mounting pad capable of improving the solder adhesive force between the mother board and the leadless chip carrier and which can be mounted with high conduction reliability.

【0007】[0007]

【課題を解決するための手段】本発明の請求項1に係る
リードレスチップキャリアは、プリント配線板1の側面
2に電極エッジ導体3を有し、この電極エッジ導体3に
連設し、プリント配線板1の裏面5に形成された実装用
パッド6を有するリードレスチップキャリアにおいて、
電極エッジ導体3の側面4と裏面5とで形成される稜線
7上の全ての点より、この稜線7を囲む実装用パッド6
の縁端部21での最短距離が0.6mm以内であること
を特徴とする。
A leadless chip carrier according to claim 1 of the present invention has an electrode edge conductor 3 on a side surface 2 of a printed wiring board 1 and is connected to the electrode edge conductor 3 for printing. In a leadless chip carrier having a mounting pad 6 formed on the back surface 5 of the wiring board 1,
From all points on the ridge line 7 formed by the side surface 4 and the back surface 5 of the electrode edge conductor 3, the mounting pad 6 surrounding the ridge line 7 is formed.
The shortest distance at the edge portion 21 is within 0.6 mm.

【0008】さらに、本発明の請求項2に係るリードレ
スチップキャリアは、プリント配線板1の裏面5に形成
されている実装用パッド6の金めっき16の厚さが、
0.05μm〜0.1μmであることを特徴とする。
Further, in the leadless chip carrier according to claim 2 of the present invention, the thickness of the gold plating 16 of the mounting pad 6 formed on the back surface 5 of the printed wiring board 1 is
It is characterized by being 0.05 μm to 0.1 μm.

【0009】[0009]

【作用】本発明に係るリードレスチップキャリアは、プ
リント配線板1の側面2に電極エッジ導体3を有し、こ
の電極エッジ導体3に連設し、プリント配線板1の裏面
5に形成された実装用パッド6を有するリードレスチッ
プキャリアにおいて、電極エッジ導体3の側面4と裏面
5とで形成される稜線7上の全ての点より、この稜線7
を囲む実装用パッド6の縁端部21での最短距離が0.
6mm以内であるので、例えば、プリント配線板からな
るマザーボード12にこのリードレスチップキャリアを
接着するときに、マザーボード12の接続用パッド13
に塗布された半田クリーム14を溶融すると、溶融した
半田が実装用パッド6の表面に沿って流動するよりも電
極エッジ導体3の側面4に沿って流動していくのが著し
くなる。さらに、リードレスチップキャリアを構成する
プリント配線板1の裏面5に形成されている実装用パッ
ド6の金めっき16の厚さを、0.05μm〜0.1μ
mにすると、溶融した半田に拡散する金の量が少なく、
溶融した半田の性能劣化を減じ、溶融した半田の流動性
を維持することができる。
The leadless chip carrier according to the present invention has the electrode edge conductor 3 on the side surface 2 of the printed wiring board 1, is connected to the electrode edge conductor 3, and is formed on the back surface 5 of the printed wiring board 1. In the leadless chip carrier having the mounting pads 6, from all points on the ridge line 7 formed by the side surface 4 and the back surface 5 of the electrode edge conductor 3, the ridge line 7 is formed.
The shortest distance at the edge portion 21 of the mounting pad 6 that surrounds the.
Since the distance is within 6 mm, for example, when the leadless chip carrier is bonded to the mother board 12 formed of a printed wiring board, the connecting pad 13 of the mother board 12 is used.
When the solder cream 14 applied to is melted, the melted solder more remarkably flows along the side surface 4 of the electrode edge conductor 3 than the surface of the mounting pad 6. Further, the thickness of the gold plating 16 of the mounting pad 6 formed on the back surface 5 of the printed wiring board 1 which constitutes the leadless chip carrier is set to 0.05 μm to 0.1 μm.
When m, the amount of gold diffused in the molten solder is small,
It is possible to reduce the performance deterioration of the molten solder and maintain the fluidity of the molten solder.

【0010】以下、本発明を添付した図面に沿って詳細
に説明する。
Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

【0011】[0011]

【実施例】図4は本発明の一実施例に係るリードレスチ
ップキャリアの裏面の斜視図であり、図5は、このリー
ドレスチップキャリアの表面の斜視図である。
FIG. 4 is a perspective view of the back surface of a leadless chip carrier according to an embodiment of the present invention, and FIG. 5 is a perspective view of the front surface of this leadless chip carrier.

【0012】本発明の一実施例のリードレスチップキャ
リア(以下、LCCとする。)を構成するプリント配線
板1の表面10には、半導体チップを搭載する窪み8と
信号回路11、側面2には電極エッジ導体3、裏面5に
は実装用パッド6を備えている。この信号回路11は、
一端を上記半導体チップを搭載する窪み8の周囲に並設
し、他端をこのプリント配線板1の側面2に形成された
電極エッジ導体3に連設している。この電極エッジ導体
3は、例えば、プリント配線板1の表裏を貫くめっきさ
れたスルホールを軸方向に切断して残存してなるもの
で、プリント配線板1の表に形成された信号回路11
と、裏面5に形成された実装用パッド6とを、めっきに
より電気的導通を図っているもので、複数のスルホール
を組み合わせたものや、端部を切り欠き上面方形のもの
もある。
On a surface 10 of a printed wiring board 1 which constitutes a leadless chip carrier (hereinafter referred to as LCC) of one embodiment of the present invention, a recess 8 for mounting a semiconductor chip, a signal circuit 11, and a side surface 2 are formed. Is provided with an electrode edge conductor 3 and a back surface 5 with a mounting pad 6. This signal circuit 11 is
One end is provided side by side around the recess 8 for mounting the semiconductor chip, and the other end is provided continuously with the electrode edge conductor 3 formed on the side surface 2 of the printed wiring board 1. The electrode edge conductor 3 is formed, for example, by cutting a plated through hole that penetrates the front and back of the printed wiring board 1 in the axial direction and remains, and a signal circuit 11 formed on the front surface of the printed wiring board 1.
And the mounting pad 6 formed on the back surface 5 are electrically connected by plating, and there are a combination of a plurality of through holes and a rectangular top surface with a cutout end.

【0013】上記プリント配線板1としては、基材に樹
脂ワニスを含浸し乾燥して得られるプリプレグの樹脂を
硬化した絶縁樹脂基板、またはアルミナ等のセラミック
系の絶縁基板が用いられる。この絶縁樹脂基板の基材と
しては、特に限定するものではないが、ガラス繊維やア
ラミド繊維等の無機材料の方が耐熱性、耐湿性などに優
れて好ましい。また、耐熱性に優れる有機繊維の布やこ
れらの混合物を基材として用いることもできる。上記基
材に含浸するワニス中の樹脂としては、エポキシ樹脂、
ポリイミド樹脂、フッ素樹脂、フェノール樹脂、ポリエ
ステル樹脂、ポリフェニレンオキサイド樹脂等の単独、
変性物、混合物等が用いられる。
As the printed wiring board 1, an insulating resin substrate obtained by hardening a resin of a prepreg obtained by impregnating a base material with a resin varnish and drying it, or a ceramic insulating substrate such as alumina is used. The base material of the insulating resin substrate is not particularly limited, but an inorganic material such as glass fiber or aramid fiber is preferable because it is excellent in heat resistance and moisture resistance. Also, a cloth of organic fibers having excellent heat resistance or a mixture thereof can be used as a substrate. The resin in the varnish to be impregnated into the base material is an epoxy resin,
Polyimide resin, fluororesin, phenol resin, polyester resin, polyphenylene oxide resin, etc. alone,
Modified products and mixtures are used.

【0014】上記信号回路11、および実装用パッド6
は、プリント配線板1に貼着した金属箔をエッチングし
て形成したり、プリント配線板1の表面10に金属メッ
キで形成してもよく、その方法は特に制限はしない。
The signal circuit 11 and the mounting pad 6
May be formed by etching a metal foil attached to the printed wiring board 1 or may be formed by metal plating on the surface 10 of the printed wiring board 1. The method is not particularly limited.

【0015】本発明の特徴は、上述のプリント配線板の
裏面に形成される実装用パッドにあり、この実装用パッ
ドは、図1に示す如く、方形の実装用パッド6の一辺に
電極エッジ導体3を形成し、その辺に開口端17、17
を有する形状で、電極エッジ導体3の側面4とプリント
配線板1の裏面5で形成される稜線7を囲むように縁端
部21を有し、プリント配線板1の裏面5に形成されて
いる。この実装用パッド6は、直径0.35mmのスル
ホールを軸方向に切断して残存してなるもので、電極エ
ッジ導体3の側面4とプリント配線板1の裏面5で形成
される稜線7より、プリント配線板1の側面2から垂直
方向に0.3mm離れたところに、プリント配線板1の
側面2と平行な縁端部18を有し、さらに、電極エッジ
導体3の開口端17よりそれぞれ50μm離れたところ
に、上記縁端部18に対し垂直方向で、互いに向かい合
い、平行な縁端部19、20を有するものである。
The feature of the present invention resides in the mounting pad formed on the back surface of the above-mentioned printed wiring board. As shown in FIG. 1, the mounting pad is provided on one side of the rectangular mounting pad 6 with an electrode edge conductor. 3 is formed and the open ends 17, 17
Is formed on the back surface 5 of the printed wiring board 1 and has an edge portion 21 surrounding the ridge line 7 formed by the side surface 4 of the electrode edge conductor 3 and the back surface 5 of the printed wiring board 1. . The mounting pad 6 is formed by cutting a through hole having a diameter of 0.35 mm in the axial direction and remaining, and from the ridge line 7 formed by the side surface 4 of the electrode edge conductor 3 and the back surface 5 of the printed wiring board 1, An edge portion 18 parallel to the side surface 2 of the printed wiring board 1 is provided at a position 0.3 mm in the vertical direction from the side surface 2 of the printed wiring board 1. At a distance from each other, the edges 18 and 20 are parallel to each other in a direction perpendicular to the edge 18 and face each other.

【0016】この実装用パッド6の上記電極エッジ導体
3の側面4とプリント配線板1の裏面5で形成される稜
線7上の全ての点より、この稜線7を囲む実装用パッド
6の縁端部21までの最短距離L2が、0.6mm以内
であることが好ましく、その形状は、電極エッジ導体3
の形状、並びに、マザーボード12の接続用パッド13
の形状により決定される。また、電極エッジ導体3の開
口端17よりそれぞれ互いに向かい合い、平行な二辺1
9、20の間の寸法は、開口端17の幅と同寸法でも、
大きい寸法でも良く、このリードレスチップキャリア9
を搭載するマザーボード12の接続用パッド13の幅に
よって決められる。
From all points on the ridge line 7 formed by the side surface 4 of the electrode edge conductor 3 of the mounting pad 6 and the back surface 5 of the printed wiring board 1, the edge of the mounting pad 6 surrounding the ridge line 7 The shortest distance L2 to the portion 21 is preferably within 0.6 mm, and its shape is the electrode edge conductor 3
Shape, and the connecting pad 13 of the motherboard 12
Is determined by the shape of. In addition, two parallel sides 1 facing each other from the open end 17 of the electrode edge conductor 3 are parallel to each other.
Even if the dimension between 9 and 20 is the same as the width of the open end 17,
Large leadless chip carrier 9
The width is determined by the width of the connection pad 13 of the motherboard 12 on which is mounted.

【0017】上記実装用パッド6の表面に鍍着した金め
っき16のめっき厚は、0.07μmであり、このめっ
き厚は、半田により溶着する時に、溶融した半田に金が
拡散移行しないように0.1μm以下が好ましく、加え
て、接着性を向上するために0.05μm以上が好まし
い。
The gold plating 16 plated on the surface of the mounting pad 6 has a plating thickness of 0.07 μm. This plating thickness prevents gold from diffusing and transferring to the molten solder when the solder is welded. 0.1 μm or less is preferable, and in addition, 0.05 μm or more is preferable in order to improve adhesiveness.

【0018】次に、本発明の一実施例であるLCCを、
図6に示す如く、表面に信号回路や接続用パッドが形成
されたプリント配線板からなるマザーボードに実装する
方法を説明する。
Next, an LCC which is an embodiment of the present invention is
As shown in FIG. 6, a method of mounting on a mother board made of a printed wiring board having signal circuits and connection pads formed on the surface will be described.

【0019】まず、マザーボード12に形成された接続
用パッド13に、一定量の半田クリーム14をディスペ
ンサにより塗布する。次に、図3に示す如く、マザーボ
ード12の接続用パッド13とLCC9の実装用パッド
6が対向するように、LCC9を重ね合わせる。次に、
この重ね合わせ半田クリーム14が塗布された部分を加
熱し、上記半田クリーム14を溶融する。この溶融した
半田クリーム14は、図2に示す如く、LCC9の実装
用パッド6を介して、LCC9の側面2に形成された電
極エッジ導体3の側面2に沿って流動し、半田クリーム
14が表面張力で電極エッジ導体3の側面4に沿って上
昇し、電極エッジ導体3と接続用パッド13との境界部
分に半田フィレット15を形成する。さらに、除熱を行
い半田を再凝固してマザーボード12にLCC9を溶着
する。
First, a predetermined amount of solder cream 14 is applied to the connection pads 13 formed on the mother board 12 by a dispenser. Next, as shown in FIG. 3, the LCC 9 is superposed so that the connection pad 13 of the mother board 12 and the mounting pad 6 of the LCC 9 face each other. next,
The portion coated with the superposed solder cream 14 is heated to melt the solder cream 14. As shown in FIG. 2, the melted solder cream 14 flows along the side surface 2 of the electrode edge conductor 3 formed on the side surface 2 of the LCC 9 through the mounting pad 6 of the LCC 9, so that the solder cream 14 is on the surface. The tension rises along the side surface 4 of the electrode edge conductor 3 to form a solder fillet 15 at the boundary between the electrode edge conductor 3 and the connection pad 13. Further, heat is removed to re-solidify the solder and weld the LCC 9 to the mother board 12.

【0020】上記接続用パッド13へ半田を塗布する方
法は、上述のように半田クリーム14をディスペンサに
より塗布する方法でも、半田バンプを形成する方法で
も、リフロー浴に浸積する方法でも特にその方法は限定
しない。
The method of applying the solder to the connection pads 13 may be the method of applying the solder cream 14 with the dispenser as described above, the method of forming the solder bumps, or the method of dipping in the reflow bath. Is not limited.

【0021】このように、本発明のLCCを用いると、
加熱して溶融する半田の電極エッジ導体3の側面4への
持ち上がりが良好で、その半田の表面がマザーボード1
2に対しほぼ45°角の傾斜面を有する半田フィレット1
5を安定して形成することができ、強固な実装を行うこ
とができる。
Thus, using the LCC of the present invention,
The solder that is heated and melted is easily lifted to the side surface 4 of the electrode edge conductor 3, and the surface of the solder is the mother board 1
Solder fillet 1 that has an inclined surface at an angle of about 45 ° to 2
5 can be stably formed, and strong mounting can be performed.

【0022】[0022]

【発明の効果】以上、述べたように、本発明のリードレ
スチップキャリアによると、このリードレスチップキャ
リアを構成する実装用パッドが、電極エッジ導体3の側
面4と裏面5とで形成される稜線7上の全ての点より、
この稜線7を囲む実装用パッド6の縁端部21での最短
距離が0.6mm以内で形成され、さらに、この実装用
パッドのめっき厚が、0.05μm〜0.1μmである
ので、例えば、プリント配線板等のマザーボードに実装
するときに、加熱して溶融した半田が、表面張力で電極
エッジ導体の側面へ上昇し、その半田の表面がマザーボ
ードに対しほぼ45°角の傾斜面を有する半田フィレット
を安定して形成することができるので、強固で、半田接
着力の向上を図り、導通信頼性の高い実装をすることが
できる。
As described above, according to the leadless chip carrier of the present invention, the mounting pads constituting the leadless chip carrier are formed by the side surface 4 and the back surface 5 of the electrode edge conductor 3. From all points on ridge line 7,
Since the shortest distance at the edge portion 21 of the mounting pad 6 surrounding the ridge line 7 is formed within 0.6 mm, and the plating thickness of the mounting pad is 0.05 μm to 0.1 μm, for example, When mounting on a mother board such as a printed wiring board, the solder melted by heating rises to the side surface of the electrode edge conductor due to surface tension, and the surface of the solder has an inclined surface at an angle of about 45 ° to the mother board. Since the solder fillet can be formed in a stable manner, it is possible to mount the solder fillet with high strength, improved solder adhesion, and high conduction reliability.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る一実施例のリードレスチップキャ
リアの要部側面図である。
FIG. 1 is a side view of a main part of a leadless chip carrier according to an embodiment of the present invention.

【図2】本発明に係る一実施例のリードレスチップキャ
リアをマザーボードに実装した要部断面図である。
FIG. 2 is a cross-sectional view of a main part of a leadless chip carrier according to an embodiment of the present invention mounted on a motherboard.

【図3】リードレスチップキャリアをマザーボードに重
ねた要部断面図である。
FIG. 3 is a cross-sectional view of essential parts in which a leadless chip carrier is overlaid on a mother board.

【図4】本発明のリードレスチップキャリアの表面を上
にした斜視図である。
FIG. 4 is a perspective view of the leadless chip carrier of the present invention with the surface thereof facing upward.

【図5】本発明のリードレスチップキャリアの裏面を上
にした斜視図である。
FIG. 5 is a perspective view of the leadless chip carrier of the present invention with the back surface facing upward.

【図6】本発明のリードレスチップキャリアをマザーボ
ードに実装する方法を説明する斜視図である。
FIG. 6 is a perspective view illustrating a method of mounting the leadless chip carrier of the present invention on a motherboard.

【図7】従来のリードレスチップキャリアをマザーボー
ドに実装した要部断面図である。
FIG. 7 is a cross-sectional view of essential parts in which a conventional leadless chip carrier is mounted on a motherboard.

【符号の説明】[Explanation of symbols]

1 プリント配線板 2 側面 3 電極エッジ導体 4 側面 5 裏面 6 実装用パッド 7 稜線 8 窪み 9 リードレスチップキャリア 10 表面 11 信号回路 12 マザーボード 13 接続用パッド 16 金めっき 1 printed wiring board 2 side surface 3 electrode edge conductor 4 side surface 5 back surface 6 mounting pad 7 ridge line 8 recess 9 leadless chip carrier 10 surface 11 signal circuit 12 motherboard 13 connection pad 16 gold plating

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 プリント配線板(1)の側面(2)に電
極エッジ導体(3)を有し、この電極エッジ導体(3)
に連設し、プリント配線板(1)の裏面(5)に形成さ
れた実装用パッド(6)を有するリードレスチップキャ
リアにおいて、電極エッジ導体(3)の側面(4)と裏
面(5)とで形成される稜線(7)上の全ての点より、
この稜線(7)を囲む実装用パッド(6)の縁端部(2
1)までの最短距離が0.6mm以内であることを特徴
とするリードレスチップキャリア。
1. An electrode edge conductor (3) is provided on a side surface (2) of a printed wiring board (1), and the electrode edge conductor (3) is provided.
In a leadless chip carrier having a mounting pad (6) formed on the back surface (5) of a printed wiring board (1), the side surface (4) and the back surface (5) of an electrode edge conductor (3). From all points on the ridgeline (7) formed by
The edge portion (2) of the mounting pad (6) surrounding this ridge (7)
A leadless chip carrier characterized in that the shortest distance to 1) is within 0.6 mm.
【請求項2】 上記プリント配線板(1)の裏面(5)
に形成されている実装用パッド(6)の金めっき(1
6)の厚さが、0.05μm〜0.1μmであることを
特徴とする請求項1記載のリードレスチップキャリア。
2. A back surface (5) of the printed wiring board (1).
Of the mounting pad (6) formed on the
The leadless chip carrier according to claim 1, wherein the thickness of 6) is 0.05 μm to 0.1 μm.
JP13897094A 1994-06-21 1994-06-21 Leadless chip carrier Withdrawn JPH088510A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13897094A JPH088510A (en) 1994-06-21 1994-06-21 Leadless chip carrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13897094A JPH088510A (en) 1994-06-21 1994-06-21 Leadless chip carrier

Publications (1)

Publication Number Publication Date
JPH088510A true JPH088510A (en) 1996-01-12

Family

ID=15234437

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13897094A Withdrawn JPH088510A (en) 1994-06-21 1994-06-21 Leadless chip carrier

Country Status (1)

Country Link
JP (1) JPH088510A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007088190A (en) * 2005-09-22 2007-04-05 Sumitomo Metal Electronics Devices Inc Package for receiving high heat-dissipation electronic component
JP2011181700A (en) * 2010-03-01 2011-09-15 Molex Inc Spacer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007088190A (en) * 2005-09-22 2007-04-05 Sumitomo Metal Electronics Devices Inc Package for receiving high heat-dissipation electronic component
JP2011181700A (en) * 2010-03-01 2011-09-15 Molex Inc Spacer

Similar Documents

Publication Publication Date Title
KR101488996B1 (en) Connection structure between printed circuit board and electronic component
JPH06295962A (en) Electronic part mounting substrate and manufacture thereof as well as electronic part mounting device
US6101098A (en) Structure and method for mounting an electric part
JPH01319993A (en) Connecting method for printed circuit board
JPH088510A (en) Leadless chip carrier
JPH05327152A (en) Wiring substrate and manufacutring method thereof
JP2912308B2 (en) Soldering structure for surface mount components
JPH10284821A (en) Printed wiring board
JP2580607B2 (en) Circuit board and method of manufacturing circuit board
JP3800958B2 (en) Printed wiring board connection method and connection structure
JP2697987B2 (en) Electronic component with connection terminal and mounting method
JPH08264914A (en) Fpc with thermocompression bonded bump
JP3152230B2 (en) Manufacturing method of liquid crystal display device
JP3629600B2 (en) Manufacturing method of electronic component mounting board
JP2002026482A (en) Mounting structure of electronic component
JP2001148441A (en) Semiconductor package and its manufacturing method
JP3346215B2 (en) Printed wiring board and manufacturing method thereof
JP3060591B2 (en) Semiconductor device mounting method, electronic optical device manufacturing method, and electronic printing device manufacturing method
JPH11251477A (en) Semiconductor package, semiconductor device, and their manufacturing method
JPH0385750A (en) Semiconductor device and its mounting method
JP3721614B2 (en) Lead frame and electronic component mounting substrate manufacturing method
JP3267280B2 (en) Electronic printing device
JP3643399B2 (en) Manufacturing method of electronic component mounting board
JPH04186731A (en) Circuit board with terminal for mounting circuit parts and manufacture thereof
JPH08250843A (en) Electronic component device and its manufacture

Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20010904