JPH06204970A - Receiver for spread spectrum communication - Google Patents

Abstract

PURPOSE:To prevent step-out by making the signal frequency of pseudo noise series coincide with the frequency of reception signals, making a phase coincide with the phase of the reception signals based on a correlation gap and acquiring synchronization by the signals of the pseudo noise series. CONSTITUTION:A correlation detector 5 detects correlation while sliding the phase between the signals of the PN series of the frequency generated at a PN generator and the signals of the PN series of the frequency inputted from an input terminal 12 and outputs correlation signals to a correlation sampling part 6. The correlation gap detection circuit 10a of a control part 10 detects the correlation gap T based on the signals sampled at the part 6. When the gap T is detected, a synchronization acquiring circuit 10c outputs the signals to a gate part 9 and closes a gate. The signal frequency outputted from a pseudo noise series signal generation means VCO 3 is adjusted and the frequency of a generator 1 is made coincide with the frequency inputted from the terminal 12. Thus, since even a frequency difference is corrected, a synchronizing status is surely in a locked state and out-of-lock is not caused.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention speeds up the establishment of synchronization in spread spectrum communication and, at the same time, prevents the loss of synchronization which tends to occur at the time of shifting to tracking system processing after establishing synchronization. It is about.

[0002]

2. Description of the Related Art FIG. 7 is a block diagram showing a configuration of a DLL acquisition system in a conventional spread spectrum communication receiver.

In FIG. 7, reference numeral 51 is a PN generator composed of a shift register for generating a pseudo-noise (hereinafter referred to as PN) series signal for spread spectrum.
52 is a mixer circuit, 53 is a voltage controlled oscillator (hereinafter, V
It is called CO) and outputs a frequency signal according to the input voltage value. Reference numeral 54 denotes a voltage adder, which performs addition calculation of input voltage signals and outputs a voltage signal obtained as a result of the calculation.

A reference voltage generator 55 generates a reference voltage. This reference voltage corresponds to the voltage value when the signal frequency output from the VCO 53 is the specified frequency output.

Reference numeral 56 is an offset voltage generator, 57 is a bandpass filter, and 58 is a correlation detector. The correlation detector 58 correlates the PN series signal based on the phase difference between the PN series signal input from the input terminal 60 and the PN series signal generated by the PN generator 51. And outputs a correlation signal indicating the degree of coincidence.

Reference numeral 59 is a capture determination circuit, which is a correlation detector 5
It is determined whether or not the level of the correlation signal output from 8 is equal to or higher than a predetermined threshold value, and if it is determined to be equal to or higher than the predetermined threshold value, it is determined that the phases of the signals of the PN series match each other, This is a circuit that determines that a correlation has been established between both signals in the series.

Next, the operation will be described. In the DLL acquisition system in the spread spectrum communication, the voltage adder adds the offset voltage output from the offset voltage generator 56 to the reference voltage output from the VCO 53.

As a result, the signal frequency output from the VCO 53 is intentionally added with the offset frequency corresponding to the offset voltage to the specified frequency output from the VCO 53 corresponding to the reference voltage output from the reference voltage generator 55. It has become a frequency.

Then, a frequency signal obtained by adding the specified frequency and the offset frequency is supplied to the PN generator 51 to generate a PN series signal.

Therefore, the PN generated by the PN generator 51
The signal frequency of the series is the PN input from the input terminal 60.
Since the signal frequency of the series is different, a signal obtained by multiplying the PN series signal generated by the PN generator 51 and the PN series signal input from the input terminal 60 by the mixer circuit 52 is used as a bandpass filter. When the signal is detected by the correlation detector 58 after passing through 57, the correlation detection is performed while sliding the phase between the PN sequence signal generated by the PN generator 51 and the PN sequence signal input from the input terminal 60. The correlation detector 58 outputs a correlation signal indicating that the PN series signals match each other only at the moment when the chip phases of the PN series signals match each other.

Then, the acquisition / judgment circuit 59 includes the correlation detector 5
It is determined whether the level of the correlation signal output from 8 exceeds a predetermined threshold level.

As a result, when it is determined that the level of the correlation signal exceeds the predetermined threshold level, it is determined that the chip phase synchronization has been established for the PN series signal input from the input terminal 60, and the offset voltage generator 56 is set. Release the offset voltage output from the reference voltage generator 5
The PN generator 51 generates a PN series signal frequency at a specified frequency output from the VCO 53 corresponding to the reference voltage output from the VCO 5, and outputs the signal frequency to the mixer circuit 52. At this time, the signal frequency of the PN series generated by the PN generator 51 substantially matches the signal frequency of the PN series input from the input terminal 60.

Then, the subsequent synchronization maintenance is passed to a tracking system circuit (not shown), and the PN input from the input terminal 60 is input.
The synchronization of the chip phase with respect to the series of signals is maintained.

[0014]

The conventional DLL acquisition system in spread spectrum communication is configured as described above, and the PN sequence signal generated by the PN generator 51 and the PN sequence input from the input terminal 60 are used. Correlation detection is performed while sliding the phase between the signals, and the chip phase is synchronized with the PN series signal input from the input terminal 60. The tracking system circuit does not synchronize the frequency of the PN series signals with each other. The subsequent signal processing control is handed over to.

Further, when the signal processing control is transferred to the tracking system circuit, the offset voltage output from the offset voltage generator 56 is canceled. However, due to the limit of the response speed of the VCO 53, the offset frequency is generated when the tracking system circuit is transferred. Remains.

As described above, since the PN series signals are not frequency-synchronized with each other and the offset frequency remains at the time of shifting to the tracking system circuit, the input terminal 6
When chip phase synchronization is performed at high speed with respect to the PN series signal input from 0, and the capture establishment time is shortened (the offset voltage output from the offset voltage generator 56 is increased), PN generation during capture occurs. The signal frequency of the PN series output from the device 51 and the signal frequency of the PN series input from the input terminal 60 are significantly different, and the offset voltage after capture is released and the signal is input from the input terminal 60. Even if an attempt is made to match the signal frequency of the PN series with the signal frequency of the PN series output from the PN generator 51, the output signal frequency of the VCO 53 cannot immediately follow, and due to the limit of the response speed, the frequencies of both are instantaneously. Are not coincident with each other, and the phase is sliding when the deviation is large, the correlation detection causes the PN
Even if the synchronization of the chip phase between the two signals in the series is established, the state immediately returns to the out-of-synchronization state, which makes it difficult to speed up the chip phase synchronization.

The invention of claim 1 has been made to solve the above problems, and it is an object of the invention to obtain a spread spectrum communication receiver having a synchronization acquisition system capable of shortening the synchronization acquisition time. To aim.

According to a second aspect of the present invention, there is provided a spread spectrum communication receiving device having a synchronization tracking system capable of keeping the synchronization state by following the frequency fluctuation of the received signal without causing the synchronization loss due to the frequency fluctuation of the received signal. The purpose is to get.

[0019]

According to another aspect of the present invention, there is provided a synchronization acquisition system for a spread spectrum communication receiver according to the first aspect of the present invention, wherein a pseudo-noise series signal whose frequency is matched with the received signal frequency by the signal frequency adjusting means is further provided. Based on the correlation interval and the time when the correlation interval is detected, the timing of the phase of the received signal coincides with the phase of the signal of the pseudo noise sequence is known, and a synchronization acquisition means for acquiring synchronization with the received signal is provided. It is a thing.

According to a second aspect of the present invention, there is provided a spread spectrum communication receiving device which receives a synchronization acquisition system and a synchronization state acquired by the synchronization acquisition system so that the synchronization state is not out of synchronization due to fluctuations in a received signal frequency. The tracking system that keeps synchronization by following the frequency variation of the signal is provided, and the tracking system is based on this reference correlation interval with the first correlation interval detected by the tracking system correlation interval detection means as the reference correlation interval. , A correlation interval deviation detecting means for detecting a difference between the correlation intervals detected by the tracking system correlation interval detecting means after the second time with respect to the reference correlation interval, and eliminating the difference according to the difference with respect to the reference correlation interval. Tracking system signal frequency adjusting means for adjusting the signal frequency of the pseudo noise series generated by the tracking system pseudo noise series signal generating means.

[0021]

In the spread spectrum communication receiver according to the present invention, the signal frequency of the pseudo noise sequence is received based on the detected correlation interval and the signal frequency of the pseudo noise sequence used to obtain the sliding correlation. Based on the time point at which the correlation interval is detected and the detected correlation interval, the timing at which the phase of the received signal and the phase of the signal of the pseudo noise sequence match is known, and the pseudo noise sequence of By synchronizing the frequency and phase of the signal with the received signal, the synchronization with the received signal is captured and the synchronization acquisition time is shortened.

In the spread spectrum communication receiver according to the invention of claim 2, when the frequency of the received signal changes after the completion of the synchronization acquisition in the synchronization acquisition system, the correlation interval between the correlation signals obtained by the sliding correlation changes. , The first detected correlation interval after shifting to the tracking system is used as a reference correlation interval, and based on this reference correlation interval, a change in the correlation interval due to the frequency change detected after the second time is detected, and the change in the correlation interval is detected. The signal frequency of the pseudo-noise sequence of the tracking system is adjusted so as to follow, and the signal frequency of the pseudo-noise sequence is made to follow in accordance with the frequency fluctuation of the received signal, and synchronization loss due to the frequency fluctuation of the received signal is prevented. .

[0023]

EXAMPLES Example 1. An embodiment of the invention of claim 1 will be described below with reference to the drawings. FIG. 1 is a block diagram showing a synchronization acquisition system in a spread spectrum communication receiver of this embodiment. Reference numeral 1 denotes a PN generator (pseudo noise) composed of a shift register for generating a PN series signal for spread spectrum. Sequence signal generation means) 2 is a mixer circuit (correlation means).

Reference numeral 3 is a VCO (pseudo noise sequence signal generation means)
Is a circuit that outputs a frequency signal according to the input voltage value. Reference numeral 4 is a bandpass filter, and 5 is a correlation detector (correlation means).

The correlation detector 5 has a PN series signal input from the input terminal 12 and a P signal generated by the PN generator 1.
Based on the phase difference between the N-series signal and the PN-series signal, the correlation signal indicating the degree of coincidence is obtained as a detection output.

Reference numeral 6 denotes a correlation sampling unit (correlation interval detecting means), which samples the correlation signal output from the correlation detector 5 with a sampling clock signal having a predetermined frequency and outputs a sampling value of the correlation signal.

Reference numeral 7 is a sampling clock generation circuit, which is a circuit for generating and outputting the sampling clock signal of the predetermined frequency.

Reference numeral 8 denotes an A / D converter, which converts the sampling value of the correlation signal output from the correlation sampling unit 6 into digital data and outputs it.

Reference numeral 9 is a gate section (signal holding means, synchronization acquisition means) for gated on the frequency signal supplied from the VCO 3 to the shift register of the PN generator 1.

Reference numeral 10 is a control unit, which is a correlation interval detection circuit 1
0a (correlation interval detecting means), signal frequency adjusting circuit 10b
(Signal frequency adjusting means) and synchronization acquisition circuit 10c (synchronization acquisition means) are provided. A control signal for controlling the gate unit 9 is output from the synchronization acquisition circuit 10c.

Further, the signal frequency adjusting circuit 10b is
It outputs n-bit digital data for controlling the signal frequency output from O3.

Reference numeral 11 denotes a D / A converter, which converts the n-bit digital data output from the signal frequency adjusting circuit 10b of the control unit 10 into an analog voltage signal corresponding to the value and outputs the analog voltage signal.

Next, the operation will be described. FIG. 2 is an explanatory diagram of a correlation signal for explaining the operation of this embodiment according to a temporal flow.

From time t0 to time t2-time t0, the power is turned on, and the synchronization acquisition operation for the PN series signal which is the received signal input from the input terminal 12 is started.

Synchronization acquisition circuit 10c of control unit CPU10
Outputs a gate open signal to the gate section 9 to open the gate, while the signal frequency adjusting circuit 10b outputs n-bit digital data to the A / D converter 11.

From the A / D converter 11, an analog voltage signal corresponding to the value of the n-bit digital data is VC.
A frequency signal corresponding to the supplied analog voltage signal is supplied from OCO 3 to the shift register of the PN generator 1 via the gate unit 9 as a clock signal.

As a result, the frequency f1 is output from the PN generator 1.
The PN series signal is output to the mixer circuit 2.

The frequency f1 in this case is usually different from the signal frequency of the PN sequence input from the input terminal 12 in order to perform sliding correlation. The signal frequency of the PN series input from the input terminal 12 is f2.

In the mixer circuit 2, the PN series signal of frequency f1 supplied from the PN generator 1 and the PN series signal of frequency f2 input from the input terminal 12 are multiplied.

The output of the mixer circuit 2 is further passed through the bandpass filter 4 and supplied to the correlation detector 5.

The correlation detector 5 performs correlation detection while sliding the phase between the PN series signal of the frequency f1 generated by the PN generator 1 and the PN series signal of the frequency f2 input from the input terminal 12. Then, the correlation detector 5 detects the PN as shown in FIG. 2 only at the moments (time t1 and t2) when the chip phases of both the signals of the PN series match.
A correlation signal indicating that the signals in the series match each other is output to the correlation sampling unit 6.

The correlation sampling unit 6 samples the correlation signal supplied from the correlation detector 5 at a predetermined frequency by the sampling clock signal output from the sampling clock generation circuit 7.

-Time t2-The control section 10 detects the correlation signal sampled and converted into digital data. The correlation signal at the times t1 and t2 is identified from the digital data, and the correlation interval of the control section 10 is detected. The detection circuit 10a detects the interval between the correlation signal output from the correlation detector 5 at time t1 and the correlation signal output from the correlation detector 5 at time t2, that is, the correlation interval T (sec).

The detection of the correlation interval T is obtained as follows. That is, the correlation interval T is calculated from the sampling frequency N and the sampling frequency performed between the correlation signal first output from the correlation detector 5 at time t1 and the correlation signal output from the correlation detector 5 at time t2. Ask.

When the correlation interval T is detected in this way,
The synchronization acquisition circuit 10c of the momentary control unit 10 has the gate unit 9
A gate close signal is output to and the gate is closed.

As a result, the clock signal supplied to the shift register of the PN generator 1 is cut off, and the shift register holds the internal state value at time t2 when the correlation signal is detected.

-Time t2 to Time t3- In this period, the PN series signal of frequency f1 generated by the PN generator 1 is input from the input terminal 12 based on the correlation interval T obtained immediately after time t2. P of frequency f2
By calculating the frequency error Δf between the N-series signal,
The signal frequency of the PN series generated by the PN generator 1 is corrected to match the signal frequency of the PN series input from the input terminal 12.

The frequency error Δf is obtained as follows. That is, the signal frequency of the PN sequence generated by the PN generator 1 is f1, and the PN signal input from the input terminal 12 is PN.
If the signal frequency of the sequence is f2 and one cycle of the PN sequence is k chips, the correlation interval T shown in FIG.

[0049]

[Equation 1]

It becomes Since the control unit 10 knows the correlation interval T and the frequency f1, Δf can be obtained from the equation (1) with f2 = f1 + Δf.

If Δf can be obtained, the signal frequency adjusting circuit 10b changes the n-bit digital data that has been output to the A / D converter 11 up to that time to digital data that makes Δf zero, and A The signal frequency of the PN sequence generated by the PN generator 1 is output to the D / D converter 11, and the signal frequency output from the VCO 3 is adjusted.
To match.

The method of adjusting the signal frequency output from the VCO 3 in order to match the signal frequency of the PN sequence generated by the PN generator 1 with the signal frequency f2 of the PN sequence input from the input terminal 12 is as follows. Is done in this way.

That is, the n-bit digital data inputted for the VCO 3 to be used in advance and the data on the output signal frequency corresponding to the digital data are measured by the circuit shown in FIG. 3, and the input digital data shown in FIG. The output signal frequency correspondence table 23 is created and stored in the program table of the control unit 10 as information.

In FIG. 3, 19 is n-bit digital data output from the signal frequency adjusting circuit 10b of the control unit 10 to the A / D converter 11, and 22 is a measuring circuit of the signal frequency output from the VCO 3.

The control unit 10 controls the correlation interval T and the PN generator 1
Based on the information of the signal frequency f1 of the PN sequence generated in step (1), the frequency error Δf is obtained by the equation (1), and the signal frequency (PN (Corresponding to the signal frequency f1 of the PN sequence output by the generator 1), and Δf is added,
Find f1 + Δf = f2.

Then, n-bit digital data corresponding to the frequency f2 is output to the A / D converter 11 by referring to the input digital data vs. output signal frequency correspondence table 23, and the signal frequency output by the VCO 3 is input. Terminal 12
The signal frequency f2 of the PN series input from the input terminal 12 is matched with the signal frequency f2 of the PN series input from the input terminal 12.

The signal frequency of the PN sequence generated by the PN generator 1 in this way is input from the input terminal 12 to P.
At time t3 when the signal frequency f2 of the N sequence matches, VC
The signal frequency output from O3 is already in a stable state.

In this way, the correction of the frequency error is completed at time t3.

-Time t4-At the time t4 when the time corresponding to the correlation interval T has passed after the gate unit 9 was closed at the time t2, the synchronization acquisition circuit 10c of the control unit 10 sends the gate open signal to the gate unit 9 again. Output to.

At time t2, it is determined whether the time corresponding to the correlation interval T has passed since the gate unit 9 was closed at time t4 and the time t4 is reached. The number of samplings performed after the time t2 reaches N times. It is performed by determining whether or not it is done.

When the gate unit 9 is opened at time t4, at this time, the PN generator 1 again outputs a PN series signal of frequency f2 starting from the internal state value of the shift register of the PN generator 1 held at time t2. Is supplied to the mixer circuit 2.

At this time, the PN series signals supplied from the PN generator 1 and the input terminal 12 have the same chip phase and frequency. Therefore, after the time t4, the PN generator 1 and the input terminal 12 are connected. The frequency and phase of the PN sequence signals supplied from the two are the same, and the correlation signal continues to be established and synchronization is established.

When the capture of the PN series signal supplied from the input terminal 12 is completed in this way, the tracking control is transferred to the tracking system circuit in this state.

When passing the tracking control to the tracking system circuit,
The signal frequency output from VCO3 is already stable (already stable at time t3), and PN
Since the frequency error between the PN-series signal frequency generated by the generator 1 and the PN-series signal frequency input from the input terminal 12 is also corrected, the synchronization state is surely locked and locked. It will not come off.

As described above, in this embodiment, the time until the synchronization is established at time t4 can be set within the range of three times the response time of VCO3.

The reason for this is that the time required to establish synchronization is shown in FIG.
As shown in, the time is from time t0 to time t4, the time from time t1 to time t4 is 2T, time t0 to time t.
Since the time of 1 is the correlation interval T or less, the time required to establish synchronization from time t0 to time t4 is 3T or less.

Further, the time t3 when the correction of the signal frequency output from the VCO 3 is completed and the signal frequency output from the VCO 3 stabilizes is the time t passed to the tracking system circuit.
4, the synchronization is not lost, the time must be before time t4, and the correlation interval T must be equal to or longer than the response time of VCO3.

Therefore, it is sufficient for the synchronization establishment time from time t0 to time t4 to be three times the correlation interval T, and the VCO
Even if the response time of 3 is close to the correlation interval T, V
It is possible to speed up the establishment of synchronization up to three times the response speed of CO3.

Example 2. An embodiment of the invention of claim 2 will be described below with reference to the drawings. FIG. 5 is a block diagram showing the configuration of an embodiment of the spread spectrum communication receiver of the present invention.

FIG. 6 is an explanatory diagram showing a correlation signal when the correlation between the transmitted PN series signal and the PN series signal generated by the tracking system circuit is obtained.

In FIG. 5, reference numeral 29 is the same as the synchronization acquisition system circuit (synchronization acquisition system) shown in FIG. 1 and its explanation is omitted. Reference numeral 30 is a tracking system circuit (tracking system).

The tracking system circuit 30 includes a synchronization acquisition circuit 29.
Is a circuit that maintains the synchronization state with respect to the frequency fluctuation of the PN series signal whose synchronization is captured by the.

Reference numeral 31 is a frequency divider (tracking system pseudo-noise sequence signal generating means) which divides the output signal of the VCO 3 of the synchronization acquisition system circuit 29 at a predetermined rate and outputs the PN sequence input from the input terminal 12. This is a circuit for generating a frequency signal different from the signal frequency and outputting it to the tracking system PN generator 32 (tracking system pseudo noise sequence signal generation means).

The tracking system PN generator 32 generates a PN series signal from the frequency signal supplied from the frequency divider 31, and outputs it to the mixer circuit 33 (tracking system correlation means).

Reference numeral 34 is a tracking system bandpass filter, and 35 is a tracking system correlation detector (tracking system correlation means). The tracking system correlation detector 35 is provided with the PN input from the input terminal 12.
A correlation signal indicating the degree of correlation between the sequence signal and the PN sequence signal generated by the tracking PN generator 32 is output as a detection output.

Reference numeral 36 is a tracking system correlation sampling section (tracking system correlation interval detecting means), which samples the correlation signal output from the tracking system correlation detector 35 with a sampling clock signal of a predetermined frequency.

The tracking system correlation interval detecting section 37 (tracking system correlation interval detecting means) outputs from the tracking system correlation detector 35 from the data sampled by the tracking system correlation sampling section 36, the sampling frequency and the sampling frequency. It is a circuit for obtaining the correlation interval T of the correlation signal.

Reference numeral 38 denotes a correlation interval determination unit (correlation interval deviation detection means), which compares the correlation interval T obtained by the correlation interval detection unit 37 with the reference correlation interval Tth to determine the correlation interval T and the reference correlation interval Tth. It is a circuit that outputs a signal according to the magnitude relationship to the control unit 10 of the synchronization acquisition system circuit 29.

In this case, as the reference correlation interval Tth in the correlation interval determination unit 38, the correlation interval T1 first obtained after the tracking is started is adopted as shown in FIG. At the moment when tracking is started, synchronization is established with the PN series signal supplied from the input terminal 12, and the input terminal 1
This is because the signal frequency of the PN series supplied from 2 and the signal frequency of the PN series generated in the synchronization acquisition system circuit 29 match.

Here, the tracking system signal frequency adjusting circuit 10e of the control unit 10 is based on the signal according to the magnitude relationship between the correlation interval T and the reference correlation interval Tth sent from the correlation interval determination unit 38, and FIG. The value of the n-bit digital data to be output to the VCO 3 shown in (3) is adjusted, the output signal frequency of the VCO 3 is varied, and the fluctuation of the signal frequency of the transmitted PN sequence is tracked to prevent loss of synchronization.

In this case, the tracking system signal frequency adjusting circuit 10e of the control unit 10 outputs a signal according to the magnitude relationship between the correlation interval T and the reference correlation interval Tth sent from the correlation interval determination unit 38 with T> Th. If there is something, V
The value of the n-bit digital data output to CO3 is decremented to shorten the correlation interval. On the other hand, when it also indicates that T <Th, n output to the VCO 3
The value of bit digital data is decremented and the correlation interval is lengthened to perform tracking control.

[0082]

As described above, according to the first aspect of the present invention, the signal frequency of the pseudo noise sequence generated by the pseudo noise sequence signal generating means is matched with the frequency of the received signal, and further, based on the correlation interval, Since the synchronization acquisition system is provided with the synchronization acquisition means for matching the phase of the reception signal and acquiring the synchronization with the reception signal by the signal of the pseudo noise series, the synchronization acquisition is speeded up and the synchronization establishment time is shortened. At the same time, since the system shifts to the tracking system in a state where the synchronization with the received signal is established, there is an effect that a spread spectrum communication receiving device capable of preventing the out-of-synchronization that tends to occur when shifting to the tracking system is obtained.

According to the second aspect of the present invention, the first correlation interval detected by the tracking system correlation interval detecting means is used as a reference correlation interval, and based on the reference correlation interval, the tracking system correlation interval detecting means detects the second and subsequent times. Correlation interval deviation detection means for detecting the difference of the correlation interval detected with respect to the reference correlation interval, and generated by the tracking system pseudo noise sequence signal generation means so as to eliminate the difference according to the difference with respect to the reference correlation interval. Since the tracking system is provided with a tracking system signal frequency adjusting means for adjusting the signal frequency of the pseudo noise sequence, it follows the frequency fluctuation of the received signal without causing synchronization loss due to the frequency fluctuation of the received signal. As a result, there is an effect that a receiver for spread spectrum communication that can maintain the synchronization state is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing a synchronization acquisition system in a spread spectrum communication receiver according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram for explaining the operation of the synchronization acquisition system in the receiver for spread spectrum communication according to the first embodiment of the invention.

FIG. 3 is a block diagram showing an input digital data / output signal frequency correspondence table creation circuit for a VCO of a synchronization acquisition system in a spread spectrum communication receiver according to an embodiment of the present invention.

FIG. 4 is an explanatory diagram showing an input digital data vs. output signal frequency correspondence table for a VCO of a synchronization acquisition system in a spread spectrum communication receiver according to an embodiment of the present invention.

FIG. 5 is a block diagram showing a synchronization acquisition system and a tracking system in a spread spectrum communication receiver according to an embodiment of the present invention.

FIG. 6 is an explanatory diagram for explaining the operation of the tracking system in the spread spectrum communication receiving apparatus according to the second embodiment of the invention.

FIG. 7 is a block diagram showing a configuration of a DLL acquisition system in a conventional spread spectrum communication receiver.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 PN generator 2 Mixer circuit 3 VCO (pseudo noise sequence signal generation means) 5 Correlation detector (correlation means) 6 Correlation sampling unit (correlation interval detection means) 9 Gate unit (signal holding means, synchronization acquisition means) 10 Control section Reference Signs List 10a correlation interval detection circuit (correlation interval detection means) 10b signal frequency adjustment circuit (signal frequency adjustment means) 10c synchronization acquisition circuit (synchronization acquisition means) 10e tracking system signal frequency adjustment circuit (tracking system signal frequency adjustment means) 29 synchronization acquisition system Circuit (synchronization acquisition system) 30 Tracking system circuit (tracking system) 31 Frequency divider 32 Tracking system PN generator (tracking system pseudo-noise sequence signal generating means) 33 Mixer circuit 35 Tracking system correlation detector (tracking system correlating means) 36 Tracking system correlation sampling section 37 Tracking system correlation interval detecting section (tracking system correlation interval detecting means) 38 Correlation interval determining section (correlation interval deviation) Out means)

Claims (2)

[Claims] 1. A pseudo noise sequence signal generating means for generating a pseudo noise sequence signal for obtaining a sliding correlation with a received signal transmitted by spread spectrum communication, and a pseudo noise sequence signal generating means. Correlation means for taking a sliding correlation between the signal of the pseudo-noise sequence and the received signal, and the interval between the correlation signals indicating that the correlation obtained by the sliding correlation being maximized in the correlation means is maximum. Correlation interval detecting means for detecting, signal holding means for holding the signal of the pseudo noise sequence when the correlation becomes maximum, the correlation interval detected by the correlation interval detecting means and the signal frequency of the pseudo noise sequence Signal frequency adjusting means for matching the signal frequency of the pseudo noise sequence with the received signal frequency, the correlation interval and its correlation By knowing the timing at which the phase of the pseudo-noise series signal held by the signal holding means matches the phase of the received signal based on the time point at which the interval is detected, with respect to the received signal, the pseudo-noise series signal A spread spectrum communication receiver having a synchronization acquisition system, which comprises a synchronization acquisition means for matching the frequency and the phase with the received signal to acquire synchronization. 2. In a spread spectrum communication receiver having a synchronization acquisition system and a synchronization tracking system, a tracking system pseudo noise sequence signal generation means for generating a pseudo noise sequence signal and a tracking system pseudo noise sequence signal generation means therefor. The tracking system correlating means for taking a sliding correlation between the pseudo-noise sequence signal generated by the above and the received signal, and the correlation interval between the correlation signals obtained by the sliding correlation being taken in the tracking system correlating means are detected. The tracking system correlation interval detection means and the first correlation interval detected by the tracking system correlation interval detection means are used as reference correlation intervals, and the tracking system correlation interval detection means detects the second and subsequent times based on the reference correlation intervals. Correlation interval deviation detecting means for detecting the difference between the correlation intervals and the reference correlation interval, and the correlation interval deviation detecting means The synchronous tracking system and the tracking system signal frequency adjusting means for adjusting the signal frequency of the pseudo noise sequence generated by the tracking system pseudo noise sequence signal generating means so as to eliminate the difference according to the difference with respect to the reference correlation interval. A spread spectrum communication receiver characterized by being provided.