JP2001272453A - Demodulating method for gps signal and gps receiving device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a demodulating method for a GPS signal and a GPS receiving device which can follow up even large variation of the carrier frequency of a receive signal with simple constitution. SOLUTION: The device is equipped with an arithmetic circuit 10 which computes by a carrier loop discriminator 58a the phase difference θerr between an in-phase signal and an orthogonal signal QPS integrated by integrators 571 and 574 for a certain time after code components are removed and determines a control signal Nca for controlling a carrier numeric control oscillator 51 by detecting the frequency shift of a replica carrier fca from the tilt (differential value) dθerr/dt of the phase difference θerr. Large variation in carrier frequency due to fluctuations, etc., of a reference frequency can be followed up by not only adjusting the frequency by detecting the phase difference, but also monitoring the frequency shift as well as the phase difference and a carrier loop is prevented from being unlocked. Further, the arithmetic circuit 10 is only added to conventional constitution.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a GPS signal demodulation method and a GPS receiver.

[0002]

2. Description of the Related Art In a conventional GPS receiver, a code (code) synchronized with a pseudo-noise code unique to each GPS satellite included in a received signal is generated to perform spectrum despreading, and then a carrier (carrier) of the received signal is generated. ) Is reproduced to demodulate the navigation data from the GPS satellites. G
In order to capture radio waves from a PS satellite, the carrier replica frequency and code phase are sequentially changed using a carrier duplicate signal (replica) generated in the GPS receiver and a target GPS satellite code. While searching for the magnitude of the correlation with the signal from the GPS satellite, the radio wave of the target GPS satellite is captured. Target GP
After capturing the radio wave of the S satellite once, the phase difference between the received signal and the replica of the carrier generated in the GPS receiver is monitored, and the synchronous tracking of the carrier is performed by controlling the numerically controlled oscillator for the carrier. . Synchronous tracking of the carrier detects the phase difference of the Costas loop (Costas 1oop) and adjusts the frequency by PLL (Phase Locked Loo).
p) is used, and DLL (De1ey
Lock Loop) is used.

Referring to FIGS. 8 and 9, a conventional G
The configuration and operation of the PS receiving device will be described. FIG. 8 shows the entire block of the GPS receiver, and FIG.
The circuit converts the received signal into an IF (intermediate frequency) signal, and further converts the IF signal into an analog-to-digital signal (2).
Each digital signal processing the digital IF signal after
2 shows a reception signal processing block for each channel corresponding to a satellite. FIG. 10 is a block diagram of a signal processing circuit that performs code synchronization tracking and carrier synchronization tracking based on the output of the received signal processing block.

As shown in FIG. 8, a received signal from an antenna 1 is supplied to an RF circuit 2, where the received signal is frequency-converted (down-converted) into an intermediate frequency (IF) signal. That is, the RF circuit 2 includes a signal amplifier 2a for amplifying a reception signal from the antenna 1, a reference frequency generator 2b for generating a reference frequency signal, and a reception signal amplified by the signal amplifier 2a based on the reference frequency signal. IF
And a frequency converter 2c for converting the frequency into a signal. The analog IF output from the RF circuit 2
The signal is binarized by an analog / digital signal converter 3 and converted into a digital IF signal, and a received signal processing block 5 is provided for each reception channel corresponding to a plurality of GPS satellites.
Signal processing is performed at i (i = 1 to N). Digital I
The F signal is also supplied to the automatic gain controller 4, and the automatic gain controller 4 controls the gain in the frequency converter 2c to an appropriate value according to the digital IF signal.

As shown in FIG. 9, a reception signal processing block 5i includes a carrier numerically controlled oscillator 51 for generating a carrier duplicate signal (hereinafter referred to as "replica carrier") fca, and a digital IF signal by the replica carrier fca. A quadrature frequency converter 52 that performs quadrature frequency conversion to an in-phase signal I and a quadrature signal Q whose phases are different from each other by 90 °, and a code numerical control oscillator 53 that generates a clock signal fcd
A code synthesizing circuit 54 for synthesizing a code corresponding to the pseudo noise code of the GPS satellite to be received from the clock signal fcd, the clock signal fcd and the code synthesizing circuit 5
The data of the code synthesized in step 4 is input, a Prompt signal (P signal) synchronized with the code component included in the received signal, and Earl advanced by a half chip phase with respect to the P signal.
A 3-bit shift register 55 that outputs a late signal (L signal) delayed by a half chip phase with respect to the y signal (E signal) and the P signal, respectively, and is in phase with each of the P, E, and L signals an EXOR circuit 56 ₁ to 56 ₆ for calculating the exclusive OR of the signal I and quadrature signal Q, the EXOR circuit 56 ₁ -
56-phase signal code components are removed by calculating the exclusive OR _{6 I P, I E, I} L and quadrature signal Q _P, Q _E, Q _L for a predetermined time (e.g., one period of the code Integrator 5 that accumulates and dumps only the length of 1 millisecond)
7 and a _{1-57 6.} Note that the orthogonal frequency converter 52
Are separating circuits 52a and 52b for separating the replica carrier fca into a sine component (0 ° phase component) and a cosine component (90 ° moving component), and the sine component of the replica carrier fca output from each of the separating circuits 52a and 52b. It is composed of EXOR circuits 52c and 52d for calculating exclusive OR of a cosine component and a digital IF signal to obtain an in-phase signal I and a quadrature signal Q.

The signal processing circuit 58 mainly comprises a CPU.
And each integrator 57₁~ 57₆Signal dumped from
I_PS, I_ES, I_LSAnd Q_PS, Q_ES, Q_LSBased on
Control signal Ncd for sequentially changing the code phase
Output to the numerically controlled oscillator 53 and the replica capacitor
A control signal Nca for sequentially changing the frequency of the rear fca is keyed.
It is output to the carrier numerically controlled oscillator 51. Change
More specifically, in this signal processing circuit 58, FIG.
As shown in FIG.₁, 57_FourSignal output from
I_PSAnd Q_PSFrom (I_PS ^Two+ Q_PS ^Two) Or | I_PS| + | Q
_PS| And the value representing the strength of the received signal and the key of the received signal.
Carrier and replica carrier fca phase difference
Determined by the loop discriminator 58a.
The carrier loop filter 58b
An operation is performed, and based on the result, the replica carrier f
Control signal N for causing ca to follow the carrier of the received signal
ca is output to the carrier numerically controlled oscillator 51. simultaneous
In the signal processing circuit 58, the envelope detection circuit 58c
Integrator 57_Two, 57_FiveSignal I output from_ESAnd Q
_ESIs detected, and the detection result is
Signal E integrated for a certain period of time at 8d_SAnd the envelope detection
The integrator 57 in the knowledge circuit 58e_Three, 57₆Output from
Issue I_LSAnd Q_LSEnvelope is detected, the detection result is
L obtained by integrating the result for a certain period of time by the integrator 58f_SDifference with
The phase difference of the P signal with respect to the code component of the received signal
The calculated calculation is performed by the code loop discriminator 58g,
This phase difference is routed by the code loop filter 58h.
Filter operation, and the result and scale filter
Based on the scale factor required by the
To make the phase of the P signal follow the code component of the received signal.
Control signal Ncd is output to the numerically controlled oscillator 53 for code
Is done.

When the GPS receiver of the above configuration captures radio waves from a GPS satellite, the signal processing circuit 58 obtains the signal using the carrier loop discriminator 58a while sequentially changing the frequency of the replica carrier fca and the phase of the code (P signal). When the value indicating the strength of the received signal exceeds a predetermined threshold value, it is regarded that the radio wave of the target GPS satellite has been captured, and the search for the satellite radio wave is terminated. Thereafter, the process shifts to synchronous tracking in the Costas loop by monitoring the code synchronous tracking by the DLL and the phase error (the phase shift between the replica carrier fca and the carrier of the received signal) obtained by the carrier loop discriminator 52a.

The GP demodulated by the signal processing circuit 58
For example, as shown in FIG. 8, the navigation signal processing circuit 6 determines the current position from the navigation data of the S satellite, and the positioning result (position information) is displayed on the user interface unit 7 such as a monitor device.

[0009]

As described above, the Costas loop is often used as a carrier loop for detecting the phase difference between two signals and adjusting the frequencies of the two signals. Since the discriminator does not monitor only the phase shift, for example, the carrier frequency generated when the reference frequency generated by the reference frequency generator 2b of the RF circuit 2 fluctuates or the received signal greatly fluctuates due to reflection from a building or the like. Cannot keep up with the great changes in Further, once the loop is unlocked, it is necessary to start over from the acquisition of the GPS satellites, and there is a problem that it takes a long time to calculate the position information again and inform the user of the current position.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide a GPS signal demodulation method and a GPS reception method which can follow a large change in the carrier frequency of a received signal with a simple configuration. It is to provide a device.

[0011]

According to the first aspect of the present invention, there is provided a GPS signal demodulating method for demodulating navigation data from a received signal received from a GPS satellite. When synchronizing the replica carrier whose frequency is variable with the component, the gradient of the phase difference between the carrier component of the received signal and the frequency of the replica carrier is calculated every predetermined time, and the replica is set so that the absolute value of this gradient is reduced. It is characterized by changing the frequency of the carrier, not only detecting the phase difference between the carrier component of the received signal and the replica carrier and adjusting the frequency of both, but also the frequency deviation expressed by the phase difference and the slope of the phase difference at the same time To match the frequency of the replica carrier to the frequency of the carrier component of the received signal, Ragiya, the received signal can follow the large change in the carrier frequency that occurs in a case where varied greatly reflection or the like from the building, it is possible to prevent the unlocking of the carrier loop, thereby GP
The problem that a long time is spent for reacquisition of the S satellite can be prevented.

According to a second aspect of the present invention, there is provided a GPS receiving apparatus for demodulating navigation data from a received signal received from a GPS satellite, wherein the GPS signal received by an antenna is converted into an intermediate frequency signal. Frequency conversion means, analog / digital conversion means for binarizing an analog intermediate frequency signal and converting it into a digital intermediate frequency signal,
A carrier numerically controlled oscillator for generating a replica carrier, an orthogonal frequency converter for orthogonally converting a digital intermediate frequency signal into an in-phase signal and an orthogonal signal by a replica carrier, and pseudo-noise inherent in each GPS satellite included in a received signal. A code synchronizing means for generating a code synchronized with the code, and calculating a phase difference per unit time between the in-phase signal and the quadrature signal in a state where the code is synchronized, and calculating a gradient of the phase difference every predetermined period, Control means for generating a control signal for changing the frequency of the replica carrier so as to reduce the absolute value of the slope of the phase difference and controlling the numerically controlled oscillator for the carrier. In addition to detecting the phase difference of the replica carrier and matching the two frequencies, the frequency expressed by the phase difference slope at the same time as the phase difference In order to adjust the frequency of the replica carrier to the frequency of the carrier component of the received signal by monitoring the deviation, the fluctuation of the reference frequency for converting to the intermediate frequency signal and the case where the received signal fluctuates greatly due to reflection from the building etc. It is possible to follow a large change in the carrier frequency that occurs and to prevent the carrier loop from unlocking, thereby avoiding the problem of spending a long time in re-acquiring GPS satellites. ,
Moreover, it can be realized with a simple circuit configuration in which only a few circuits are added to the conventional configuration.

According to a third aspect of the present invention, in the second aspect of the present invention, there is provided a memory for storing a digital intermediate frequency signal for a predetermined time, and the control means converts the control signal from the digital intermediate frequency signal data stored in the memory. It is characterized by being generated, faster than adjusting the frequency and phase of the replica carrier to the frequency and phase of the carrier component of the digital intermediate frequency signal in real time, it is possible to synchronize with the carrier component of the received signal, In addition, all received signals can be demodulated as navigation data from the digital intermediate frequency signal stored in the memory first, and as a result, the time required for outputting position information can be reduced.

According to a fourth aspect of the present invention, in the second or third aspect of the present invention, the control means is configured such that, of the phase difference data calculated per unit time, a change amount between the preceding and following phase difference data is equal to or more than a predetermined value. The characteristic feature is that the data of the phase difference is removed and the slope and the average value are calculated, so that an appropriate slope of the phase difference can be calculated, and as a result, carrier synchronization can be achieved more quickly.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (Embodiment 1) FIG. 1 is a block diagram of a main part according to Embodiment 1 of the present invention. However, since the configuration other than the configuration for performing carrier synchronization tracking, which is a feature of the present invention, that is, the configuration for performing code synchronization tracking is the same as the conventional example shown in FIGS. Omitted. In addition, in the configuration of the present embodiment, portions common to the above-described conventional example are denoted by the same reference numerals, and description thereof is omitted.

The present embodiment has been plotted on the orthogonal coordinate axes as shown in-phase signal I _PS and quadrature signal Q _PS, which is a predetermined time integrating code component is removed by the multiplier 57 _1, 57 ₄ 2 The angle at this time (the phase difference between the in-phase signal I _PS and the quadrature signal Q _PS ) θerr is calculated by the carrier loop discriminator 58a, and the frequency deviation of the replica carrier fca is calculated from the slope (differential value) dθerr / dt of the phase difference θerr. A control signal Nca for detecting and controlling the carrier numerically controlled oscillator 51
Is characterized in that it has an arithmetic circuit 10 for determining. The arithmetic circuit 10 is realized by a CPU constituting the signal processing circuit 58 in the conventional example.

A digital signal I is converted (down-converted) by a not-shown RF circuit 2 into an intermediate frequency (IF) and binarized by an analog / digital signal converter 3.
The F signal and the replica carrier fca generated by the carrier numerically controlled oscillator 51 while capturing the radio waves are separated by the separation circuit 5.
EXOR circuits 52c and 52d perform an exclusive OR operation on the sine component and cosine component of the replica carrier fca separated by 2a and 52b, and convert the digital IF signal into the in-phase signal I and the quadrature signal Q. Are subjected to orthogonal frequency conversion. At this time, if the frequency and phase of the replica carrier fca and the carrier component of the digital IF signal completely match, the carrier component is removed from the digital IF signal. However, at the stage where the radio wave from the GPS satellite is captured, the carrier synchronization is not performed. Carrier components could not be removed because they were not removed.

In the EXOR circuits 56 ₁ and 56 ₄ , the P signal for synchronizing with the code component and the in-phase signal I
And quadrature signal code component by calculating the exclusive OR of the Q is removed, in-phase signal after the code apheresis I _P and quadrature signal Q _P is a predetermined time at the integrator 57 _1, 57 ₄ (e.g. , And the signal I _{PS and} Q _PS integrated by the length of one code cycle (1 millisecond) are dumped. Note that the integration time is not limited to 1 millisecond, and may be longer or shorter.

Then, the carrier loop discriminator 58a calculates the phase difference θerr between the in-phase signal I _{PS and the} quadrature signal Q _PS integrated for a certain period of time. Quadrature signal Q _PS =
Therefore, the phase difference θerr = 0. Then, the slope (differential value) dθerr / dt of the phase difference θerr is calculated by the arithmetic circuit 10.
, The control signal Nca for the carrier numerically controlled oscillator 51 is determined so that the gradient dθerr / dt is reduced (set to zero), and the carrier numerically controlled oscillator 51 generates a replica carrier fca.

Next, the operation of the arithmetic circuit 10 in a state where code is synchronized after capturing radio waves from GPS satellites will be described in detail with reference to the flowchart of FIG.

First, the arithmetic circuit 10 reads the phase difference θerr from the carrier loop discriminator 58a every millisecond for a predetermined period (for example, 10 milliseconds) (S1). However, the predetermined period is not limited to 10 milliseconds,
Longer or shorter times may be used. And
In the arithmetic circuit 10, the phase difference θerr in the predetermined period is
Is calculated and the slope dθerr / dt is calculated (S2), and the obtained absolute value of the slope dθerr / dt is compared with a predetermined threshold ωth (S3). In the arithmetic circuit 10, the slope dθerr / dt
Is larger than the threshold value ωth, it is determined that the frequency of the replica carrier fca does not match the frequency of the carrier of the digital IF signal, and the correction value ΔNca of the control signal corresponding to the absolute value of the slope dθerr / dt is determined. Output (S
4). Then, the correction value ΔN output from the arithmetic circuit 10
The bias value is added to ca by the adder 11, the value of the control signal Nca is calculated by the signal processing circuit 58, and the value of Nca is changed, so that a new replica carrier fca is generated from the carrier numerically controlled oscillator 51 ( S5). It should be noted that the bias value of the control signal Nca depends on the system, and the bias value need not be added if unnecessary by the system.

Then, the operation of orthogonal frequency conversion of the digital IF signal and the removal of the code component by the new replica carrier fca are performed, and the slope dθerr / d of the phase difference θerr is performed.
The above processing (S1 to S5) until the absolute value of
S5) is repeated.

On the other hand, if the absolute value of the slope dθerr / dt of the phase difference θerr is equal to or smaller than the threshold value ωth, the arithmetic circuit 10 determines that the frequency of the replica carrier fca matches the frequency of the carrier of the digital IF signal (S6). The value of the correction value 補正 Nca at that time is stored as the initial value △ NcaO (S
7).

Here, the control signal Nca is a function of the inclination dθerr / dt of the phase difference θerr, and the replica carrier fca
Is a function of the control signal Nca, as shown in FIG. 4, when the value Nca0 of the control signal Nca when the gradient dθerr / dt becomes zero is given to the carrier numerical control oscillator 51, the replica carrier fca Frequency is digital I
The frequency can be matched to the frequency of the carrier component of the F signal.

Then, the arithmetic circuit 10 compares the absolute value | errθerr | / 10 of the average value of the phase difference θerr with a predetermined reference value θth (S8), and calculates the absolute value | Σθerr |
When 10 is larger than the reference value θth, it is determined that the phase of the replica carrier fca does not match the phase of the carrier of the digital IF signal, and the value of the correction value ΔNca is shifted back and forth so that the phases match. That is, in the arithmetic circuit 10, as shown in FIG. 5, the average value of the phase difference θerrΣθerr / 10
By outputting 補正 NcaO ± α as a correction value △ Nca for a necessary time according to the sign and magnitude (absolute value) of the replica carrier fca, the frequency of the replica carrier fca is changed, and the phase of the replica carrier fca is changed to the digital IF signal. Correction is made so as to match the carrier component (S9). After completion of this correction, the arithmetic circuit 10 returns the correction value △ Nca to the initial value △ Nca0 (S1
0), the phase difference θerr is read again for a predetermined period, and the average value Δθerr / 10 of the phase difference θerr is obtained (S1).
1). When the average value Σθerr / 10 becomes equal to or less than the reference value θth, the phase of the replica carrier fca is changed to the digital IF
It is determined that the phase matches the phase of the carrier of the signal (S8), the correction value ΔNca0 at that time is stored (S12), and the frequency and phase of the replica carrier fca are held. Thereafter, by monitoring the slope and average value of the phase difference θerr, it is detected whether or not the frequency and phase of the received signal have changed, and the carrier synchronization is tracked.

As described above, in the present embodiment, in tracking the carrier synchronization of the GPS reception signal, not only the phase difference is detected and the frequency is adjusted, but also the frequency shift is monitored simultaneously with the phase difference. It is possible to follow the fluctuation of the reference frequency generated by the reference frequency generator 2b and the large change of the carrier frequency generated when the received signal fluctuates greatly due to the reflection from the building or the like, thereby preventing the carrier loop from being unlocked. It is possible to do.
This can prevent a problem that a long time is spent for reacquiring the GPS satellite. In addition, there is an advantage that it can be realized with a simple configuration in which only the arithmetic circuit 10 is added to the conventional configuration.

(Embodiment 2) In this embodiment, as shown in FIG. 6, a digital IF in which a received signal is down-converted by an RF circuit 2 and binarized by an analog / digital signal converter 3
The present embodiment differs from the first embodiment in that a memory 12 capable of storing signals for a predetermined period is provided in the received signal processing block 5, but other configurations are common to the first embodiment. Therefore, common components are denoted by the same reference numerals, and description thereof is omitted.
Only the configuration and operation characteristic of the present embodiment will be described.

In the first embodiment, the arithmetic circuit 10 reads the phase difference θerr from the carrier loop discriminator 58a every millisecond for a predetermined period (for example, 10 milliseconds), and calculates the slope dθerr / dt of the phase difference θerr. It is obtained and compared with the threshold value wth. If the absolute value of the gradient is larger than the threshold value wth, the control signal Nca is changed to change the frequency of the replica carrier fca, and the phase difference θ err is returned again in the next 10 milliseconds.
The degree of the inclination dθerr / dt is determined.

On the other hand, in the present embodiment, the memory 12 provided in the received signal processing unit lock 5 has a predetermined time (for example,
Of the data of the digital IF signal stored for 100 milliseconds, the frequency and phase of the replica carrier fca are determined by the procedure described in the first embodiment using the data of the first 10 milliseconds. Although the frequency and the phase are adjusted, the data stored in the memory 12 is used for calculating the slope dθerr / dt of the phase difference θerr after the second time. Therefore, once the data of the digital IF signal is temporarily stored in the memory 12, the data for the first 10 milliseconds can be used as many times as possible. By sequentially changing the frequency of the carrier fca and the phase of the code, for example, searching for the control signals Nca and Ncd of the carrier and code numerically controlled oscillators 51 and 53 at which I _PS ² + Q _PS ² becomes a certain value or more. Can be.
Further, even if the frequency fluctuates once the carrier is synchronized, the frequency and phase of the replica carrier fca can be adjusted to the received signal using the data of the digital IF signal at the time of the fluctuation. . This allows
All the received GPS signals can be demodulated as navigation data. The digital IF signal stored in the memory 12 is not limited to 100 milliseconds, but may be longer or shorter.

As described above, according to the present embodiment, the frequency and the phase of the replica carrier fca are adjusted in real time to the frequency and the phase of the carrier component of the digital IF signal as in the first embodiment. Synchronization with the carrier component can be achieved.
2, all the received signals can be demodulated as navigation data from the received signals (digital IF signals) stored in the storage device 2, and as a result, the time until the position information is output can be reduced.

In the first or second embodiment, the arithmetic circuit 10 calculates the slope dθerr / d of the phase difference θerr.
When calculating t, if the data of the phase differences θerr1 to θerr10 for 10 milliseconds includes data having greatly different values as shown in FIG. 7A, the slope dθerr / When dt or the average value Σθerr / 10 is calculated, the error increases, or the slope dθerr / dt
May not be calculated. Accordingly, data in which the change Δθerr from the data immediately before and immediately after is larger than the predetermined value θr, for example, data of θerr3 in which Δθerr3> θr and Δθerr4> θr in FIG.
By calculating θerr / dt and the average value Σθerr / 10, an appropriate phase difference θerr can be obtained as shown in FIG.
Can be calculated and the average value Σθerr / 10 can be calculated. As a result, carrier synchronization can be achieved more quickly.

[0032]

According to the first aspect of the present invention, there is provided a GPS signal demodulating method for demodulating navigation data from a received signal received from a GPS satellite, wherein a replica carrier having a variable frequency is synchronized with a carrier component of the received signal. At this time, the slope of the phase difference between the carrier component of the received signal and the frequency of the replica carrier is calculated at predetermined time intervals, and the frequency of the replica carrier is varied so as to reduce the absolute value of the slope. In addition to detecting the phase difference between the component and the replica carrier and matching the two frequencies, the frequency difference of the replica carrier is monitored simultaneously with the phase difference by monitoring the frequency difference represented by the slope of the phase difference. In order to adjust to the frequency, fluctuations in the reference frequency for converting to an intermediate frequency signal and the reception signal fluctuate greatly due to reflection from the building, etc. If it is possible to follow the large change in the carrier frequency caused such, it is possible to prevent the unlocking of the carrier loop, thereby GP
This has the effect of preventing the problem of spending a long time in re-acquiring the S satellite.

According to a second aspect of the present invention, there is provided a GPS receiving apparatus for demodulating navigation data from a received signal received from a GPS satellite, an intermediate frequency converting means for converting a GPS signal received by an antenna into an intermediate frequency signal, and an analog intermediate signal. Analog / digital conversion means for binarizing a frequency signal to convert it into a digital intermediate frequency signal, a carrier numerically controlled oscillator for generating a replica carrier, and converting the digital intermediate frequency signal into an in-phase signal and a quadrature signal by using the replica carrier. A quadrature frequency converter for conversion, code synchronization means for generating a code synchronized with a pseudo noise code unique to each GPS satellite included in the received signal, and a unit time of the in-phase signal and the quadrature signal in a state where the code is synchronized. Calculates the phase difference of each phase, calculates the slope of the phase difference every predetermined period, and calculates the absolute value of the slope of the phase difference. Control means for generating a control signal for changing the frequency of the replica carrier to control the carrier numerically controlled oscillator, so that the phase difference between the carrier component of the received signal and the replica carrier is detected, and Not only to adjust the frequency of the received signal, but also to monitor the frequency shift represented by the phase difference gradient at the same time as the phase difference, and to adjust the frequency of the replica carrier to the frequency of the carrier component of the received signal, and to convert it to an intermediate frequency signal Fluctuations in the reference frequency and large variations in the carrier frequency caused when the received signal fluctuates greatly due to reflection from the building, etc., and it is possible to prevent the carrier loop from unlocking, The problem of spending a long time in re-acquiring GPS satellites can be prevented. There is an effect that can be achieved by a simple circuit configuration of simply adding a slight circuit in.

According to a third aspect of the present invention, in the second aspect of the present invention, there is provided a memory for storing a digital intermediate frequency signal for a predetermined time, and the control means converts the control signal from data of the digital intermediate frequency signal stored in the memory. Since it is generated, it is faster than synchronizing the frequency and phase of the replica carrier with the frequency and phase of the carrier component of the digital intermediate frequency signal in real time, and can synchronize with the carrier component of the received signal. Thus, all received signals can be demodulated as navigation data from the digital intermediate frequency signal stored in the memory, and as a result, the time required for outputting position information can be shortened.

According to a fourth aspect of the present invention, in the second or third aspect of the present invention, the control means is configured such that, of the phase difference data calculated per unit time, the amount of change from the preceding and following phase difference data is greater than or equal to a predetermined value. Since the data of the phase difference is removed and the slope and the average value are calculated, it is possible to calculate an appropriate slope of the phase difference, and as a result, there is an effect that the carrier synchronization can be achieved more quickly.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a main part of a first embodiment.

FIG. 2 is an operation explanatory view of the above.

FIG. 3 is a flowchart for explaining the operation of the above.

FIG. 4 is an operation explanatory diagram of the above.

FIG. 5 is an operation explanatory view of the above.

FIG. 6 is a block diagram illustrating a main part of a second embodiment.

FIG. 7 is an operation explanatory diagram of the above.

FIG. 8 is a block diagram showing an overall configuration of a conventional GPS receiving apparatus.

FIG. 9 is a block diagram showing a received signal processing block in the above.

FIG. 10 is a block diagram showing a signal processing circuit in the above.

[Explanation of symbols]

 5 Received Signal Processing Block 10 Arithmetic Circuit 11 Adder 51 Numerically Controlled Oscillator for Carrier 52 Quadrature Frequency Converter 56 EXOR Circuit 57 Integrator 58 Signal Processing Circuit 58a Carrier Loop Discriminator

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hideki Ueyanagi 1048 Kadoma Kadoma, Osaka Prefecture Matsushita Electric Works, Ltd. (72) Inventor Satoshi Hyodo 1048 Kadoma Kadoma, Kadoma City, Osaka Matsushita Electric Works Co., Ltd. F term (reference) 5J062 CC07 DD14 5K004 AA05 AA08 FJ07 FJ14 JJ05 5K022 EE03 EE36 5K052 AA00 AA14 BB00 BB01 FF32 GG11 GG22 GG26 GG48 GG57

Claims (4)

[Claims] 1. A GPS signal demodulation method for demodulating navigation data from a received signal received from a GPS satellite, wherein a carrier of the received signal is synchronized when a replica carrier whose frequency is variable is synchronized with a carrier component of the received signal. A gradient of a phase difference between the component and the frequency of the replica carrier is calculated every predetermined time, and the frequency of the replica carrier is varied so as to reduce the absolute value of the gradient.
An S signal demodulation method. 2. A GPS receiving apparatus for demodulating navigation data from a received signal received from a GPS satellite, an intermediate frequency converting means for converting a GPS signal received by an antenna into an intermediate frequency signal, and converting an analog intermediate frequency signal into a binary signal. Analog / digital conversion means for converting a digital intermediate frequency signal into a digital intermediate frequency signal, a carrier numerically controlled oscillator for generating a replica carrier, and orthogonal frequency conversion for orthogonally converting the digital intermediate frequency signal into an in-phase signal and a quadrature signal using the replica carrier And a code synchronization means for generating a code synchronized with a pseudo-noise code specific to each GPS satellite included in the received signal, and a phase difference per unit time between the in-phase signal and the quadrature signal in a state where the code is synchronized. Calculate and calculate the slope of the phase difference every predetermined period, and reduce the absolute value of the slope of the phase difference. A GPS receiver comprising: a control unit that generates a control signal for changing the frequency of a precursor carrier and controls a carrier numerically controlled oscillator. 3. A control device comprising a memory for storing a digital intermediate frequency signal for a predetermined time, wherein the control means generates a control signal from data of the digital intermediate frequency signal stored in the memory. The GPS receiver as described in the above. 4. The control means calculates a slope by removing data of a phase difference whose change from the preceding and following phase difference data is equal to or more than a predetermined value from among the phase difference data calculated for each unit time. The GPS receiver according to claim 2 or 3, wherein: