JP2022185761A - Positioning signal reception device, positioning signal reception method, and positioning program - Google Patents

Abstract

To search for and capture a main lobe even if a side lobe is captured.SOLUTION: A positioning signal reception device 100 includes: a side peak detection part 90 for comparing a PP correlation value among a sub-carrier replica signal of a sub-carrier Prompt phase of a BOC signal, a code replica signal of a Prompt phase, and the BOC signal, a PE correlation value among a sub-carrier replica signal of a sub-carrier Prompt phase, a code replica signal of an Early phase advanced from a code Prompt phase, and a BOC signal, and a PL correlation value among a sub-carrier replica signal of a sub-carrier Prompt phase, a code replica signal of a Late phase delayed from a code Prompt phase, and a BOC signal, and for determining which of a main peak and a side peak is supplemented; and a sample shift part 52 for shifting a processing start position of a correlation part on the basis of a determination result of the side peak detection part.SELECTED DRAWING: Figure 1

Description

The present disclosure relates to a positioning signal receiving device, a positioning signal receiving method, and a positioning program.

Signals of various modulation schemes such as BPSK (Binary Phase Shift Keying) and QPSK (Quadrature Phase Shift Keying) are broadcast from a global navigation satellite system (GNSS) represented by a GPS (Global Positioning System). ing. Among them, signals by BOC (Binary Offset Carrier) modulation using subcarriers have multiple peaks in autocorrelation characteristics, so a typical method using DLL (Delay Lock Loop) is to track the positioning signal. is difficult, and when a sidelobe is captured, it continues to track the sidelobe.
BOC signal tracking methods have been proposed by various research institutes. In Patent Document 1, side peaks are removed by adding an SLL (Sub-Carrier Lock Loop) that tracks subcarriers, and a positioning signal is obtained by a normal DLL. We propose a system that can track and is also multipath tolerant or noise tolerant.

U.S. Patent Application Publication No. 2010104046

When tracking a BOC signal modulated by a subcarrier signal with a high chip rate, there is a technical problem that if a side lobe that is greatly separated from the main lobe is captured, the main lobe cannot be pulled in and tracking of the positioning signal cannot be maintained. . Moreover, even if the signal can be pulled into the main lobe, there is a technical problem that the code phase cannot be corrected, and no improvement in tracking accuracy of the positioning signal can be expected.
In particular, when a positioning signal receiver is attached to a target that moves with high mobility, large Doppler is generated, and the possibility of capturing side lobes that are far apart from the main lobe in the BOC signal is extremely high. It is difficult to apply to objects that move.

The positioning signal receiving device of the present disclosure is a positioning signal receiving device that receives a positioning signal of BOC (Binary Offset Carrier) modulation,
A correlation value with a BOC signal is generated as a PP correlation value from the subcarrier replica signal at the subcarrier prompt phase and the code replica signal at the code prompt phase, and from the subcarrier replica signal at the subcarrier prompt phase and the code prompt phase A correlation value between the code replica signal in the phase leading Early phase and the BOC signal is generated as a PE correlation value, and the phase lags behind the subcarrier replica signal in the subcarrier prompt phase and the code prompt phase. a correlation unit that generates a correlation value between the code replica signal in the late phase and the BOC signal as a PL correlation value;
The PP correlation value, the PE correlation value, and the PL correlation value are input, and the PP correlation value, the PE correlation value, and the PL correlation value are compared to supplement any of the main peak and the side peak. a side peak detector for determining whether
and a sample shifter for shifting the processing start position of the correlator based on the determination result of the side peak detector.

According to the present disclosure, when capturing a BOC signal, the main lobe can be searched and captured even if side lobes that are far away from the main lobe are captured.

1 is a configuration diagram of a positioning signal receiving apparatus 100 according to Embodiment 1; FIG. FIG. 4 is an autocorrelation characteristic diagram of the BOC signal of Embodiment 1; 4 is an autocorrelation characteristic diagram of the DLL according to the first embodiment; FIG. 4 is an autocorrelation characteristic diagram of the SLL of Embodiment 1. FIG. FIG. 10 is an autocorrelation characteristic diagram of a BOC signal when the sidelobe of Embodiment 1 is captured; FIG. 10 is an autocorrelation characteristic diagram of the DLL when capturing the sidelobe of the first embodiment; FIG. 4 is an autocorrelation characteristic diagram of SLL when the sidelobe of Embodiment 1 is captured; 4 is a flowchart showing the operation of the positioning signal reception method according to the first embodiment; 4 is a diagram of sample shift in Embodiment 1. FIG. 4 is a diagram of sample shift in Embodiment 1. FIG.

In the following description of the embodiments and drawings, the same reference numerals denote the same or corresponding parts.

Embodiment 1.
***Description of the configuration of the positioning signal receiver 100***
The configuration of the positioning signal receiver 100 will be described based on FIG.
The positioning signal receiver 100 is a receiver that receives a BOC (Binary Offset Carrier) modulated positioning signal 41 from a satellite.
The positioning signal receiving apparatus 100 receives the positioning signal 41 and maintains synchronization with the positioning signal 41 after completing synchronization with the positioning signal 41 .
Positioning signal receiver 100 acquires positioning signal 41 by demodulating the code modulated from positioning signal 41 and correlating it with a replica signal locally generated by positioning signal receiver 100 . As for the code, a constant pattern is repeated in the code period Tp.

The positioning signal receiving apparatus 100 includes a preprocessing unit 51, a sample shift unit 52, a correlation unit 60, an SLL (Sub-Carrier Lock Loop) unit 81, a DLL (Delay Lock Loop) unit 83, a PLL (Phase Lock Loop) unit 85, It has a side peak detector 90 and a phase corrector 91 .

The preprocessing unit 51 receives a positioning signal 41 transmitted from a satellite through an antenna and converts the positioning signal 41 into an intermediate frequency signal.
A preprocessing unit 51 outputs an IF signal 42 obtained by analog/digital conversion of the intermediate frequency signal at the sampling frequency.
The IF signal 42 is a signal in which carriers, subcarriers, and codes are superimposed.

The sample shifter 52 shifts the processing start position of the correlator 60 based on the determination result 98 .
The sample shifter 52 shifts the processing start position of the correlation unit 60 by shifting the processing start position of the IF signal 42 .

Correlator 60 internally creates replica signals of the carrier signal, subcarrier signal, and code signal superimposed on IF signal 42 .
Correlator 60 creates the following replica signals.
1. Carrier replica signal2. Subcarrier replica signal3. code replica signal

A carrier replica signal is a signal that imitates a carrier signal.
A subcarrier replica signal is a signal that imitates a subcarrier signal.
A code replica signal is a signal that imitates a code signal.

Correlator 60 correlates the carrier signal, subcarrier signal and code signal superimposed on IF signal 42 with each replica signal.
Correlator 60 outputs an EP correlation value, an LP correlation value, a PE correlation value, a PP correlation value, and a PL correlation value. These correlation values have positive values.

The SLL section discriminator 81, the DLL section discriminator 83, and the PLL section discriminator 85 have a function of outputting a phase error.
The SLL section discriminator 81 performs frequency search and phase detection of subcarriers.
The SLL section discriminator 81 inputs the EP correlation value and the LP correlation value, and outputs the subcarrier phase error τsc for tracking the subcarrier.

The DLL section discriminator 83 performs frequency search and phase detection of the code.
A DLL unit discriminator 83 receives the PE correlation value and the PL correlation value and tracks the code.
The DLL discriminator 83 outputs the code phase error τc.

The PLL unit discriminator 85 performs carrier frequency search and phase detection.
The PLL section discriminator 85 receives the PP correlation value and tracks the carrier.
The PLL section discriminator 85 outputs the carrier wave phase error τφ.
The PLL section discriminator 85 may be an FLL section discriminator that performs FLL (Frequency Locked Loop) processing.

A side peak detector 90 inputs the PE correlation value, the PP correlation value, and the PL correlation value, and determines which of the main peak of the main lobe and the side peak of the side lobe is being supplemented.

A phase corrector 91 generates a correction value for the replica signal created by the correlator 60 .
A phase corrector 91 receives the subcarrier phase error τsc from the SLL discriminator 81 and outputs a subcarrier phase signal 96 for tracking the subcarrier. The subcarrier phase signal 96 is a signal that indicates the phase difference between the subcarrier signal of the BOC signal and the subcarrier replica signal.
The phase corrector 91 receives the code phase error τc from the DLL discriminator 83 and outputs a code phase signal 97 to track the code. The code phase signal 97 is a signal that indicates the phase difference between the code signal of the BOC signal and the code replica signal.
A carrier wave phase correction unit 92 of the phase correction unit 91 receives the carrier wave phase error τφ from the PLL unit discriminator 85 and outputs a carrier phase signal 95 for tracking the carrier wave. The carrier phase signal 95 is a signal that indicates the phase difference between the carrier signal of the BOC signal and the carrier replica signal.

Correlator 60 of positioning signal receiving apparatus 100 will be described based on FIG.

Carrier NCO 54 is a numerically controlled oscillator that generates a carrier replica signal.
Carrier NCO 54 sets the carrier phase according to carrier phase signal 95 and generates a carrier clock signal.
The carrier NCO 54 generates an intermediate frequency carrier replica signal according to the carrier replica phase.
The carrier replica phase is the phase of the current reference carrier replica signal.
The carrier replica phase is a phase that is changed according to the carrier phase signal 95, and is a phase that approaches the carrier phase of the BOC signal.
Carrier NCO 54 generates a carrier replica signal based on the carrier clock signal and outputs the carrier replica signal.

Subcarrier NCO 56 is a numerically controlled oscillator that generates a subcarrier replica signal.
Subcarrier NCO 56 sets the subcarrier phase according to subcarrier phase signal 96 and generates a subcarrier clock signal.
Subcarrier NCO 56 generates a subcarrier replica signal based on the subcarrier clock signal and outputs the subcarrier replica signal.

Subcarrier NCO 56 outputs the following subcarrier replica signals.
1. Prompt subcarrier replica signal at subcarrier Prompt phase2. An Early subcarrier replica signal whose subcarrier phase is ahead of the subcarrier Prompt phase by a period Tds/2 with respect to the Prompt subcarrier replica signal3. A late subcarrier replica signal in which the subcarrier phase is delayed by a period Tds/2 from the subcarrier Prompt phase with respect to the prompt subcarrier replica signal.

The subcarrier prompt phase is the phase of the current reference subcarrier replica signal.
The subcarrier prompt phase is a phase that is changed according to the subcarrier phase signal 96 and is a phase that approaches the subcarrier phase of the BOC signal.
The period Tds satisfies 0<Tds<Ts.

Code NCO 58 is a numerically controlled oscillator that generates a code replica signal.
The code NCO 58 sets the code phase according to the code phase signal 97 and generates a code clock signal.
The code NCO 58 generates a code replica signal based on the code clock signal and outputs the code replica signal.

Code NCO 58 outputs the following code replica signals.
1. Prompt code replica signal in code Prompt phase2. An Early subcarrier replica signal whose subcarrier phase leads the code Prompt phase by a period Tdc/2 with respect to the Prompt code replica signal3. A late subcarrier replica signal in which the subcarrier phase is delayed by a period Tdc/2 from the code prompt phase with respect to the prompt code replica signal

The code prompt phase is the phase of the current reference code replica signal.
The code prompt phase is a phase that is changed according to the code phase signal 97, and is a phase that approaches the code phase of the BOC signal.
The period Tdc satisfies 0<Tds<Tc or Ts<Tds<Tc.

The multipliers 61 to 69 are mixers for mixing signals.
The accumulators 71 to 75 are accumulators that integrate the signal for each fixed period (integration period). The accumulation period is a period that is an integral multiple of the code period Tp.
Multiplication section 61 mixes the carrier replica signal and IF signal 42 and outputs BOC signal 43 . The BOC signal 43 is a signal in which subcarriers and codes are superimposed.

The multiplier 62 mixes the BOC signal 43 and the prompt subcarrier replica signal to demodulate the code signal (BCP signal).
The multiplying unit 65 mixes the code signal (BCP signal) demodulated by the multiplying unit 62 with the Prompt code replica signal, and outputs the correlation value (BCPP signal) demodulated with the Prompt code replica signal to the integrating unit 74 .
The integrating section 74 integrates the correlation value (BCPP signal) output from the multiplying section 65 for a certain period of time, and outputs the "prompt subcarrier, prompt code replica signal correlation value" (PP correlation value).

The multiplying unit 66 mixes the code signal (BCP signal) demodulated by the multiplying unit 62 with the Early code replica signal, and outputs the correlation value (BCPE signal) demodulated with the Early code replica signal to the integrating unit 73 .
The integrating section 73 integrates the correlation value (BCPE signal) output from the multiplying section 66 for a certain period of time, and outputs the "prompt subcarrier, early code replica signal correlation value" (PE correlation value).

The multiplying unit 67 mixes the code signal (BCP signal) demodulated by the multiplying unit 62 with the late code replica signal, and outputs the correlation value (BCPL signal) demodulated with the late code replica signal to the integrating unit 75 .
The integrating section 75 integrates the correlation value (BCPL signal) output from the multiplying section 67 for a certain period of time, and outputs the "prompt subcarrier, late code replica signal correlation value" (PL correlation value).

The multiplier 63 mixes the BOC signal 43 and the early subcarrier replica signal to demodulate the code signal (BCE signal).
The multiplying unit 68 mixes the code signal (BCE signal) demodulated by the multiplying unit 63 with the Prompt code replica signal, and outputs the correlation value (BCEP signal) demodulated with the Prompt code replica signal to the integrating unit 71 .
The integrating section 71 integrates the correlation value (BCEP signal) output from the multiplying section 68 for a certain period of time, and outputs the "early subcarrier, prompt code replica signal correlation value" (EP correlation value).

The multiplier 64 mixes the BOC signal 43 and the late subcarrier replica signal to demodulate the code signal (BCL signal).
The multiplying unit 69 mixes the code signal (BCL signal) demodulated by the multiplying unit 64 with the Prompt code replica signal, and outputs the correlation value (BCLP signal) demodulated with the Prompt code replica signal to the integrating unit 72 .
The integrating section 72 integrates the correlation value (BCLP signal) output from the multiplying section 68 for a certain period of time, and outputs the "late subcarrier, prompt code replica signal correlation value" (LP correlation value).

Integrating section 71 generates, as an EP correlation value, a correlation value between the BOC signal and the subcarrier replica signal in the Early phase, which leads the subcarrier Prompt phase, and the code replica signal in the code Prompt phase.
The accumulator 72 generates a correlation value between the BOC signal and the subcarrier replica signal in the late phase, which lags behind the subcarrier prompt phase, and the code replica signal in the code prompt phase, as an LP correlation value.
The integrator 73 generates a correlation value between the subcarrier replica signal in the subcarrier Prompt phase and the code replica signal in the Early phase, which leads the code Prompt phase, and the BOC signal as a PE correlation value.
The integrating section 74 generates a correlation value between the subcarrier replica signal in the subcarrier Prompt phase and the code replica signal in the code Prompt phase and the BOC signal as a PP correlation value.
The integrating section 75 generates a correlation value between the subcarrier replica signal in the subcarrier Prompt phase and the code replica signal in the Late phase, which is delayed in phase from the code Prompt phase, and the BOC signal as a PL correlation value.
The integration units 71 to 75 integrate the correlation values for a certain period of time and output the integrated values, and then reset the integrated values to zero.
After resetting the integrated value to zero, the integrating units 71 to 75 repeat the operation of integrating the correlation value for a certain period of time.

The side peak detection unit 90 inputs the PP correlation value, the PE correlation value, and the PL correlation value, compares the PP correlation value, the PE correlation value, and the PL correlation value, and supplements any of the main peak and the side peak. determine whether it is

When the PL correlation value is greater than the PP correlation value, the side peak detection section 90 determines that the side peak is captured at a phase leading the main peak.
When the PE correlation value is larger than the PP correlation value, the side peak detection section 90 determines that the side peak at a phase delayed from the main peak is captured.
When the PP correlation value is larger than the PE correlation value and the PL correlation value, the side peak detection section 90 determines that the main peak is captured.

The sample shifter 52 shifts the processing start position of the IF signal 42 based on the determination result of the side peak detector 90 .
The fact that the sample shifter 52 shifts the processing start position of the IF signal 42 means that the sample shifter 52 shifts the processing start position of the BOC signal.
The fact that the sample shifter 52 shifts the processing start position of the IF signal 42 means that the correlator 60 shifts the processing start position to generate the PP correlation value, the PE correlation value, and the PL correlation value.

The sample shifter 52 delays the processing start position by a period of one subchip when it is determined that the side peak detector 90 has captured a side peak whose phase is ahead of the main peak.
The sample shifter 52 advances the processing start position by one subchip period when it is determined that the side peak detector 90 has captured a side peak in a phase delayed from the main peak.
When the side peak detector 90 determines that the main peak is captured, the sample shifter 52 does not change the processing start position.

If the side peak detector 90 determines that the side peak is captured in a phase leading the main peak, the carrier phase corrector 92 delays the carrier phase of the carrier replica signal by a period of one subchip.
If it is determined that the side peak detector 90 has captured a side peak in a phase delayed from the main peak, the carrier phase corrector 92 advances the carrier phase of the carrier replica signal by one subchip period.

***Hardware and Software of Positioning Signal Receiver 100***
The positioning signal receiving device 100 can be realized by a computer including a processor, a main memory, a storage device, an input/output interface, and a storage, and a positioning program executed by the computer.

The processor executes a positioning program while executing an operating system, network drivers and storage drivers.
The positioning program, operating system, network driver and storage driver stored in the storage device are read into the main memory and executed by the processor.

The data, information, signal values and variable values that are used, processed or output by the positioning program are stored in main memory, storage devices, or registers or cache memory within the processor.

The “part” of each part of the positioning signal receiving apparatus 100 may be read as “processing”, “procedure” or “step”. Also, the "processing" of each process of the positioning signal receiving device 100 may be read as "program", "program product", or "computer-readable storage medium recording the program".
The positioning program causes the computer to execute each processing, each procedure, or each process, where the "section" of each section of the positioning signal receiving apparatus 100 is read as "processing,""procedure," or "step."
Also, the positioning signal reception method is a method performed by the positioning signal reception device 100 executing a program.
The positioning program may be stored in a computer-readable recording medium and provided. Also, the positioning program may be provided as a program product.

Further, the positioning signal receiving apparatus 100 is realized in whole or in part by processing circuits such as logic ICs (Integrated Circuits), GAs (Gate Arrays), ASICs (Application Specific Integrated Circuits), and FPGAs (Field-Programmable Gate Arrays). may

Moreover, a higher concept of a processor, a combination of a processor and a memory, and a processing circuit is called processing circuitry. That is, the processor, the processor/memory combination, and the processing circuit are each examples of processing circuitry.

***Description of autocorrelation properties***
Autocorrelation characteristics will be described with reference to FIGS. 2 to 4. FIG.
Assume that the positioning signal 41 is modulated with BPSK (Binary Phase Shift Keying) and BOC (15, 2.5).
BOC modulation is commonly denoted BOC(m,n), where m denotes the subcarrier frequency in units of 1.023 MHz, and n is the chip rate of the pseudorandom noise (PRN) code in units of 1.023 MHz. indicates
1-chip period Tc and 1-subchip period Ts of BOC(15, 2.5) can be obtained by the following calculation.

1-chip period Tc
= 1/(n*1.023MHz)
=1/(2.5*1.023MHz)

Period Ts of one subchip
= 1/(2*m*1.023MHz)
= 1/(2*15*1.023MHz)
= 1/(30*1.023MHz)

FIG. 2 is a diagram showing BPSK and BOC autocorrelation characteristics of a BOC signal.
The horizontal axis is the code phase difference, and the unit of the horizontal axis is the number of chips.
The vertical axis is the correlation strength, and the unit of the vertical axis is the amplitude.
ML is the main lobe.
SL is a side lobe appearing on both sides of the main lobe ML.
SC is a subchip.
In BOC(15,2.5), there are 12 subchips SC per chip and 6 subchips SC per 0.5 chip.

The autocorrelation characteristic of the BPSK-modulated signal has a mountain shape as indicated by the thick line.
The correlation value of the BPSK-modulated signal becomes maximum when the code phase difference is 0 chip, and becomes 0 when the code phase difference is ±1.0 chip.

The autocorrelation characteristic of a signal modulated with BOC(15,2.5) is wavy like a thin line.
The autocorrelation characteristic of a signal modulated with BOC(15,2.5) has 11 positive peaks and 12 negative peaks.
The correlation value of the signal modulated by BOC (15, 2.5) is maximized at the code phase difference of 0 chip and becomes 0 at the code phase difference of ±1.0 chip.
When the code phase difference is between 0 chip and ±1.0 chip, the correlation value of the signal modulated by BOC (15, 2.5) repeats high and low in subchip SC units 6 times and gradually decreases.

FIG. 3 is a diagram showing the DLL autocorrelation properties of the BOC(15,2.5) code.
The horizontal axis is the code phase difference, and the unit of the horizontal axis is the number of chips.
The vertical axis is the correlation strength, and the unit of the vertical axis is the amplitude.
The autocorrelation characteristic of the DLL becomes a mountain shape centered on the 0 chip.
PP is the correlation value of the Prompt subcarrier and Prompt code replica signal.
PE is the correlation value of the Prompt subcarrier, Early code replica signal.
PL is the correlation value of the prompt subcarrier and late code replica signal.
When the main lobe ML is captured, the code phase difference is 0, PP is at the peak position of 0 chip, and PP>PE and PP>PL.

FIG. 4 is a diagram showing SLL autocorrelation characteristics of subcarriers of BOC (15, 2.5).
The horizontal axis is the subcarrier phase difference, and the unit of the horizontal axis is the number of chips.
The vertical axis is the correlation strength, and the unit of the vertical axis is the amplitude.
The autocorrelation characteristic of SLL is a waveform with constant amplitude.
The autocorrelation characteristic of a signal modulated with BOC(15,2.5) repeats positive and negative peaks. The positive peak value and the negative peak value have the same absolute value.
When the main lobe ML is captured, the subcarrier phase difference is 0 and PP exists at the peak position of 0 chip.

FIG. 5 is a diagram showing a case where the main lobe ML cannot be captured and the side lobe SL separated by −0.5 chips is captured as an example.

FIG. 6 is a diagram showing the case of capturing side lobes SL separated by -0.5 chips.
The PP is located at -0.5 chips.
The PE exists before the -0.5 chip position.
The PL is after the -0.5 chip location.
If we capture the sidelobe SL that is −0.5 chips away, then PE<PP<PL.

Although not shown, if the sidelobe SL separated by +0.5 chips is captured, the following is obtained.
PP is located at +0.5 chips.
The PE exists before the +0.5 chip position.
The PL is after the +0.5 chip location.
PE>PP>PL.

FIG. 7 is a diagram showing the case of capturing side lobes SL separated by -0.5 chips.
PP is present at the peak position of -0.5 chips.
Although not shown, when capturing the sidelobe SL separated by +0.5 chip, PP exists at the peak position of +0.5 chip.

***Description of operation***
FIG. 8 shows the state in which the positioning signal receiving apparatus 100 captures the sidelobe SL separated by -0.5 chips shown in FIGS. 5 to 7, and the state shown in FIGS. It is a figure which shows the method of becoming.

●Step S10: Correlation value calculation step The correlation unit 60 calculates a PP correlation value, a PE correlation value, and a PL correlation value.
●Step S11: Correlation value input step The side peak detection unit 90 receives the PP correlation value, the PE correlation value, and the PL correlation value.
At this time, each correlation value is smoothed by filtering.

• Step S12: Correlation value comparison step The side peak detection unit 90 detects side peaks from the PP correlation value, PE correlation value, and PL correlation value based on the following determination conditions and determination results.

Judgment condition 1: When the PL correlation value is larger than the PP correlation value Judgment result 1: It is judged that the side peak in the phase leading from the main peak is captured.

Judgment condition 2: When the PE correlation value is larger than the PP correlation value Judgment result 2: It is judged that the side peak in the phase delayed from the main peak is captured.

Judgment condition 3: When the PP correlation value is larger than the PE correlation value and the PL correlation value Judgment result 3: It is judged that the main peak is captured.

The side peak detector 90 outputs the determination result 98 to the sample shifter 52 and the phase corrector 91 .

Based on the determination result 98, the side peak detection unit 90 uses the sample shift unit 52 and the phase correction unit 91 to track the positioning signal while moving the side lobe SL until the main peak is detected when the side peak is captured. go on.

Tracking process Based on the determination result 98 output from the side peak detection unit 90, the sample shift unit 52 shifts the analog/digital converted BOC signal input from the preprocessing unit 51 by one subchip period.
The sample shifter 52 shifts the sidelobe SL by delaying or advancing the processing start position of the IF signal 42 based on the determination result 98 .
If the sample shifter 52 samples-shifts the IF signal 42, a phase error occurs, so the phase corrector 91 corrects the code phase, subcarrier phase, and carrier phase.
The phase corrector 91 corrects the carrier phase signal 95 , the subcarrier phase signal 96 and the code phase signal 97 .
The phase correction unit 91 receives the subcarrier phase error τsc from the SLL unit discriminator 81, adds the subcarrier phase error (G1*τsc) obtained by multiplying the previous carrier phase signal 95 by the gain constant G1, and adds a new subcarrier phase error. A subcarrier phase signal 96 is output.
The phase correction unit 91 receives the code phase error τc from the DLL unit discriminator 83, adds the code phase error (G2*τc) obtained by multiplying the previous code phase signal 97 by the gain constant G2, and obtains a new code phase. A signal 97 is output.
The phase correction unit 91 receives the carrier wave phase error τφ from the PLL unit discriminator 85, and multiplies the carrier phase integrated error (G3*Στφ) obtained by multiplying the previous carrier phase signal 95 by the gain constant G3 and the gain constant G4. A new carrier phase signal 95 is output by adding the carrier wave phase error (G4*τφ).
Based on the determination result output from the side peak detector 90, the carrier phase corrector 92 of the phase corrector 91 delays or advances the carrier phase of the carrier replica signal by one subchip period (Ts). Make corrections.

● Step S13: Post-movement process In the case of judgment result 1:
The sample shifter 52 delays the processing start position of the IF signal 42 by one subchip period (Ts).
A carrier wave phase correction unit 92 outputs a carrier phase signal 95 that delays the carrier phase of the carrier replica signal by a period (Ts) of one subchip.
The phase corrector 91 outputs a subcarrier phase signal 96 and a code phase signal 97 for correcting the subcarrier phase of the subcarrier replica signal and the code phase of the code replica signal.
The phase corrector 91 corrects the code phase, subcarrier phase, and carrier phase of each replica signal.

• Step S14: Forward movement step In the case of determination result 2: The sample shifter 52 advances the processing start position of the IF signal 42 by one subchip period (Ts).
A carrier wave phase correction unit 92 outputs a carrier phase signal 95 that advances the carrier phase of the carrier replica signal by a period (Ts) of one subchip.
The phase corrector 91 outputs a subcarrier phase signal 96 and a code phase signal 97 for correcting the subcarrier phase of the subcarrier replica signal and the code phase of the code replica signal.

• Step S15: Maintaining Step In the case of determination result 3: The sample shift section 52 does not perform sample shift while the side peak detection section 90 determines that the main lobe ML is captured. That is, the sample shifter 52 does not change the processing start position of the IF signal 42 .
When the sample shifter 52 does not sample-shift the IF signal 42 (captures the main lobe ML) but has not captured the main peak yet, the phase corrector 91 adjusts the code phase, subcarrier phase, and Correct the carrier phase.
The phase corrector 91 determines that the main peak has been captured when the phase errors output from the SLL discriminator 81, DLL discriminator 83, and PLL discriminator 85 are (almost) zero.
When the sample shifter 52 does not sample-shift the IF signal 42 and captures the main peak, the phase corrector 91 does not correct the code phase, subcarrier phase, and carrier phase of each replica signal. .
The phase corrector 91 outputs the code phase, subcarrier phase and carrier phase of each replica signal as the code phase, subcarrier phase and carrier phase of the received positioning signal 41 . That is, the phase corrector 91 receives the code phase indicated by the latest code phase signal 97, the subcarrier phase indicated by the latest subcarrier phase signal 96, and the carrier phase indicated by the latest carrier phase signal 95, respectively. The code phase, subcarrier phase, and carrier phase of the positioning signal 41 thus generated are output.

●Loop process After steps S13, 14, and 15, the process returns to step S11.

Example As shown in FIG. 6, when the side lobe SL separated by -0.5 chips from the main lobe ML is captured, the autocorrelation characteristics output by the DLL increase PL with respect to PP. The side peak detector 90 determines that the side peaks in phases leading the main peak are captured. Based on the determination result of the side peak detector 90, the sample shifter 52 delays the processing start position of the IF signal 42 by one subchip period (Ts), as indicated by arrows in FIGS.
Since there are six subchips per 0.5 chip in BOC (15, 2.5), the determination by the side peak detector 90 and the sample shift by the sample shifter 52 are performed six times (steps 11, 12, and 13). 6 times), the main lobe ML is reached. In the main lobe ML, PP is larger than PL and PE in the autocorrelation characteristics output from the DLL, so it is determined that the main peak has been captured. Therefore, steps 11, 12 and 15 are performed after the main peak has been captured.

When the side lobe SL that is +0.5 chips away from the main lobe ML is captured, the determination by the side peak detector 90 and the sample shift by the sample shifter 52 are performed six times (steps 11, 12, and 14 are performed six times). times), the main lobe ML is reached.

*** Features of Embodiment 1 ***
As described above, in this embodiment, in capturing the positioning signal of the BOC modulation method, the side peak detector 90, the sample shifter 52, and the phase corrector 91 are used to capture the side peak, but the main peak is The method of tracking the positioning signal while moving the sidelobe SL until it is detected has been described.

*** Effect of Embodiment 1 ***
According to the positioning signal receiving apparatus 100 of Embodiment 1, when capturing a BOC signal, even if a side lobe SL that is greatly separated from the main lobe ML is captured, the main lobe ML can be searched and captured.
Also. The tracking precision is improved by the phase correction processing.
In particular, like the BOC (15, 2.5) modulation scheme, it is possible to track a BOC signal modulated by a high-frequency subcarrier signal.

***Modification of Embodiment 1***
The BOC modulation of the positioning signal may be other BOC (m, n) modulation instead of BOC (15, 2.5) modulation. In particular, the subcarrier frequency is preferably BOC modulation with m≧15, may be BOC modulation with m≧17, or may be BOC modulation with m≧20.
The code modulation scheme may not be the BPSK modulation scheme, but may be the QPSK modulation scheme or other modulation schemes.
The code need not be a pseudorandom noise (PRN) code, but may be some other code.

Although the embodiments have been described above, some of the embodiments may be combined for implementation. Alternatively, part of the embodiments may be combined for implementation.

41 positioning signal, 42 IF signal, 43 BOC signal, 51 preprocessing unit, 52 sample shift unit, 54 carrier NCO, 56 subcarrier NCO, 58 code NCO, 60 correlation unit, 61, 62, 63, 64, 65, 66 , 67, 68, 69 multiplication unit, 71, 72, 73, 74, 75 integration unit, 81 SLL unit discriminator, 83 DLL unit discriminator, 85 PLL unit discriminator, 90 side peak detection unit, 91 phase correction unit, 92 carrier phase corrector, 95 carrier phase signal, 96 subcarrier phase signal, 97 code phase signal, 98 determination result, 100 positioning signal receiver, ML main lobe, SL side lobe, SC subchip, τφ carrier phase error, τc code Phase Error, τsc Subcarrier Phase Error.

Claims (6)

In a positioning signal receiver that receives a positioning signal of BOC (Binary Offset Carrier) modulation,
A correlation value with a BOC signal is generated as a PP correlation value from the subcarrier replica signal at the subcarrier prompt phase and the code replica signal at the code prompt phase, and from the subcarrier replica signal at the subcarrier prompt phase and the code prompt phase A correlation value between the code replica signal in the phase leading Early phase and the BOC signal is generated as a PE correlation value, and the phase lags behind the subcarrier replica signal in the subcarrier prompt phase and the code prompt phase. a correlation unit that generates a correlation value between the code replica signal in the late phase and the BOC signal as a PL correlation value;
The PP correlation value, the PE correlation value, and the PL correlation value are input, and the PP correlation value, the PE correlation value, and the PL correlation value are compared to supplement any of the main peak and the side peak. a side peak detector for determining whether
A positioning signal receiver, comprising: a sample shifter that shifts a processing start position of the correlator based on a determination result of the side peak detector. The side peak detection unit is
If the PL correlation value is greater than the PP correlation value, it is determined that a side peak whose phase is ahead of the main peak is captured,
If the PE correlation value is greater than the PP correlation value, it is determined that a side peak at a phase delayed from the main peak is captured,
2. The positioning signal receiving apparatus according to claim 1, wherein it is determined that the main peak is captured when the PP correlation value is greater than the PE correlation value and the PL correlation value. The sample shift unit
delaying the processing start position by one subchip when determining that the side peak detection unit has captured a side peak whose phase is ahead of the main peak;
when it is determined that the side peak detection unit has captured a side peak in a phase delayed from the main peak, advancing the processing start position by one subchip;
3. The positioning signal receiver according to claim 2, wherein the processing start position is not changed when the side peak detector determines that the main peak is captured. The correlator generates a carrier replica signal according to the carrier wave phase of the carrier replica signal and demodulates the BOC signal,
The positioning signal receiving device is
When it is determined that the side peak detection unit captures a side peak at a phase leading the main peak, the carrier phase of the carrier replica signal is delayed by a period of one subchip, and the side peak detection unit detects the main peak. 4. The positioning signal according to claim 2 or 3, further comprising a carrier wave phase correction unit that advances the carrier wave phase of the carrier replica signal by a period of one subchip when it is determined that a side peak having a phase lagging behind is captured. receiving device. In a positioning signal reception method for receiving a positioning signal of BOC (Binary Offset Carrier) modulation,
A correlation value with a BOC signal is generated as a PP correlation value from the subcarrier replica signal at the subcarrier prompt phase and the code replica signal at the code prompt phase, and from the subcarrier replica signal at the subcarrier prompt phase and the code prompt phase A correlation value between the code replica signal in the phase leading Early phase and the BOC signal is generated as a PE correlation value, and the phase lags behind the subcarrier replica signal in the subcarrier prompt phase and the code prompt phase. generating a correlation value between the code replica signal in the Late phase and the BOC signal as a PL correlation value;
The PP correlation value, the PE correlation value, and the PL correlation value are input, and the PP correlation value, the PE correlation value, and the PL correlation value are compared to supplement any of the main peak and the side peak. determine whether the
A positioning signal reception method for generating the PP correlation value, the PE correlation value, and the PL correlation value by shifting a processing start position based on the determination result. A computer that receives a BOC (Binary Offset Carrier) modulation positioning signal,
A correlation value with a BOC signal is generated as a PP correlation value from the subcarrier replica signal at the subcarrier prompt phase and the code replica signal at the code prompt phase, and from the subcarrier replica signal at the subcarrier prompt phase and the code prompt phase A correlation value between the code replica signal in the phase leading Early phase and the BOC signal is generated as a PE correlation value, and the phase lags behind the subcarrier replica signal in the subcarrier prompt phase and the code prompt phase. Correlation processing for generating a correlation value between the code replica signal in the late phase and the BOC signal as a PL correlation value;
The PP correlation value, the PE correlation value, and the PL correlation value are input, and the PP correlation value, the PE correlation value, and the PL correlation value are compared to supplement any of the main peak and the side peak. A side peak detection process for determining whether
A positioning program for executing sample shift processing for shifting the processing start position of the correlation processing based on the determination result.

Images