JPH06202151A - Thin film transistor array - Google Patents

Abstract

PURPOSE:To provide a thin film transistor array with sufficient protective effect even to the impression of a sharp impulse of static electricity. CONSTITUTION:The thin film transistor array in which plural thin film transistors 14 and display electrodes 15 connected to either the source electrodes or drain electrodes of the thin film transistors 14 are arranged in a matrix shape at each crossing part of plural address wirings 12 and data wirings 13 arranged by crossing mutually, and the address wirings 12 are connected to the gate electrodes of the thin film transistors 14 and the data wirings 13 to the other side of the source electrodes and the drain electrodes is provided with a protective element 17 with a high resistance or nonlinear resistance characteristic connected to each of the address wiring 12 and the data wirings 13, first common potential conductor belts 16A1, 16A2 which connect each of both terminal sides of an address wiring group to common potential via the protective element 17, and second potential conductor belts 16D1, 16D2 which connect each of both terminal sides of a data wiring group to the common potential via the protective element 17.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor array used in a liquid crystal display device in which a plurality of display electrodes connected to thin film transistors are arranged in a matrix.

[0002]

2. Description of the Related Art Conventionally, a thin film transistor (hereinafter referred to as a TFT
(Hereinafter referred to as)) and a display electrode are arranged in a matrix, and an active matrix type liquid crystal display element (hereinafter referred to as TFT-LCD) is used. As such a conventional TFT-LCD,
For example, a liquid crystal display element disclosed in Japanese Patent Laid-Open No. 63-85586 is known, and an equivalent circuit of its TFT array is shown in FIG.

As shown in FIG. 11, the TFT array is arranged on a transparent insulating substrate 1 in a row direction and a column direction so that a plurality of address wirings 2 and a plurality of data wirings 3 intersect each other at right angles. , The gate electrodes are provided at the intersections of the address wiring 2 and the data wiring 3, respectively.
And the TFT 4 whose drain electrode is connected to the data line 3
Are arrayed, and the display electrodes 5 connected to the source electrodes of the TFTs 4 are arrayed in a matrix.

Short-circuit wiring 6 is formed so as to surround the display area of the insulating transparent substrate 1, and the short-circuit wiring 6 is formed.
Are formed so as to be insulated from and intersect with the address wiring 2 and the data wiring 3. The short-circuit wiring 6, the address wiring 2 and the data wiring 3 are connected by a high resistance element or a protection element 7 having a non-linear current-voltage characteristic as shown in FIG. Reference numeral 8 is an address wiring terminal, and 9 is a data wiring terminal.

In this conventional TFT array, all the address wirings 2 and the data wirings 3 are connected to the short-circuit wirings (short ring) 6 during the manufacturing process, so that all the address wirings 2 and the data wirings are connected. The potentials of 3 become equal, and the occurrence of defects such as dielectric breakdown and short circuit due to discharge between the electrodes by static electricity generated during the manufacturing process of the TFT array is suppressed.

That is, when a high voltage due to static electricity is applied to the terminal 8 of the address wiring or the terminal 9 of the data wiring, the protection element 7 is turned on to bypass the injected charge, thereby the gate of the TFT 4 of the pixel, A high voltage is prevented from being applied between the drains to keep the potentials equipotential, which brings about a protective effect.

[0007]

Generally, the static electricity applied to the TFT panel is a direct current static electricity applied over a long time and a pulse applied in a short time as a steep pulse having a high frequency component. Static electricity. Direct current static electricity is generated mainly during rubbing when the substrate is exposed to plasma, while pulse static electricity is generated by human handling (for example, transfer between processes, inspection process, etc.) The TFT may come into contact with an electrically floating part (eg, a substrate transfer roller), when the substrate is cut, or when the rubbing roller comes close to the next substrate for rubbing. Panel or TF
It is applied to a T liquid crystal cell (which is formed by joining opposite substrates).

The static electricity applied to the TFT panel or the TFT liquid crystal cell is mostly in the form of pulses, and most of the defects are caused by the static electricity in the form of pulses. Direct current static electricity countermeasures can be solved with a short ring that connects all address wiring and data wiring with conductors, but for pulse static electricity, this short ring is defective such as dielectric breakdown or short circuit due to static electricity. Cannot be prevented.

That is, in such a case, the time constant of the short ring itself requires time for the propagation of the impulse, so that a large potential distribution is generated on the short ring at a certain moment, and as a result, the pixel TFT It becomes impossible to maintain the same potential between the gate and the drain. As described above, the protection circuit having the conventional configuration is effective against direct current static electricity, but has a drawback of being low in effect against pulse static electricity, and thus the protection effect against static electricity cannot be said to be sufficient.

When a driving voltage is applied, the gate terminal,
Since there is a leak current between the drain terminals through the protection element, the load on the drive circuit is increased and the power consumption is increased. SUMMARY OF THE INVENTION It is an object of the present invention to eliminate the above-mentioned problems and provide a thin film transistor array having a sufficient protection effect against application of pulsed static electricity.

[0011]

In order to achieve the above object, the present invention provides [A] a thin film transistor at each intersection of a plurality of address wirings and a plurality of data wirings arranged to intersect each other, and
A plurality of display electrodes connected to one of the source electrode and the drain electrode of the thin film transistor are arranged in a matrix, and the address wiring is provided on the gate electrode of the thin film transistor, and the data wiring is provided on the other of the source electrode and the drain electrode. In the thin film transistor arrays connected to each other, a protection element connected to each of the address wiring and the data wiring and having a high resistance or a non-linear resistance characteristic, and only both ends of the address wiring group are connected to a common potential via the protection element. And a second common potential conductor band for connecting both end sides of the data wiring group to a common potential via the protection element. [B] In the thin film transistor array, a first common potential bridging portion including a plurality of protection elements having high resistance or non-linear resistance characteristics, in which only address lines are connected to each other at ends of a plurality of adjacent address lines. And a second common potential bridging portion including a plurality of protection elements having high resistance or non-linear resistance characteristics, which connect only the data wiring to each other at the ends of the plurality of adjacent data wirings. Characterize. [C] In the thin film transistor array, a protection element connected to each of the address wiring and the data wiring and having a high resistance or a non-linear resistance characteristic, and both end sides of a plurality of address wirings are brought to a common potential via the protection element. A first common potential conductor band to be connected, a second common potential conductor band that connects both ends of a plurality of data lines to a common potential via the protection element, and an outer side of the first common potential conductor band. And a second short-circuiting line located outside the second common potential conductor band and short-circuiting the plurality of data lines with each other. It is characterized by having. [D] In the thin film transistor array, a protection element connected to each of the address wiring and the data wiring and having a high resistance or a non-linear resistance characteristic, and both end sides of a plurality of address wirings are brought to a common potential via the protection element. A first common potential conductor band to be connected, a second common potential conductor band to which both ends of each of the plurality of data lines are connected to a common potential via the protection element, the first common potential conductor band and the first common potential conductor band It is characterized by comprising a short ring located on the outer periphery of the second common potential conductor band and short-circuiting a plurality of address wirings and a plurality of data wirings. [E] In the thin film transistor array, a first common potential bridging section including a plurality of protection elements having high resistance or non-linear resistance characteristics, which connects only address wirings to each other at ends of a plurality of adjacent address wirings. And a second common potential bridging portion including a plurality of protection elements having high resistance or non-linear resistance characteristics that connect only the data wirings to each other at the ends of the plurality of adjacent data wirings.
A first shorting wire located outside the common potential bridging portion and shorting a plurality of address wires to each other, and a plurality of data wires located outside the second common potential conductor band to each other And a second short-circuit wiring. [F] In the thin film transistor array, a first common potential bridging portion including a plurality of protection elements having high resistance or non-linear resistance characteristics, in which only address lines are connected to each other at ends of a plurality of adjacent address lines. And a second common potential bridging portion including a plurality of protection elements having high resistance or non-linear resistance characteristics that connect only the data wirings to each other at the ends of the plurality of adjacent data wirings.
And a short ring located outside the common potential bridging portion and the second common potential bridging portion and short-circuiting the plurality of address wirings and the plurality of data wirings.

[0012]

According to the present invention, as described above, a plurality of address wirings and a plurality of data wirings are connected to each other by a protection element having a high resistance or a non-linear resistance characteristic for each address wiring and data wiring, The plurality of address wirings and the plurality of data wirings are separated so as to have a common potential via the protection element.

Therefore, it has a high protection effect against impulsive voltage application due to static electricity. Further, since the leakage current of the protection circuit is small, the load on the drive circuit and the increase in power consumption are small. Further, since a short circuit wiring or a short ring is further provided outside the cutting line for cutting and removing the peripheral portion of the substrate during the manufacturing process of the liquid crystal element,
It is possible to protect the thin film transistor array due to static electricity in all steps.

[0014]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is an equivalent circuit diagram showing a schematic configuration of a TFT array showing a first embodiment of the present invention.
In FIG. 1, the TFT array is an insulating transparent substrate 1
A plurality of address wirings 12 extending in the row direction above 1;
A plurality of data wirings 13 extending in the column direction are arranged so as to be insulated from each other and intersect with each other. At each intersection of the plurality of address wirings 12 and the plurality of data wirings 13,
The TFT 14 connected to these wirings and this TFT 1
And a display electrode 15 connected to each of the
A plurality of display electrodes 15 are arranged in the row and column directions to form a display area.

Then, on the left side and the right side of the insulating transparent substrate 11, only a group of address wirings 12 are connected via a protection element 17 having a high resistance or a non-linear resistance characteristic so as to have a common potential. Potential conductor strips 16A1 and 16
A2 and a second common potential conductor band 16D1 that connects only the data wiring to the upper and lower sides of the insulating transparent substrate 11 via a protection element 17 having a high resistance or a non-linear resistance characteristic so as to have a common potential. And 16D2 are formed. Reference numeral 18 is a connection terminal of the address wiring 12, and 19 is a connection terminal of the data wiring 13.

Next, an example of forming the first protective element will be described with reference to FIGS. Here, an example of connection between the address wiring 12 and the first common potential conductor strip 16A1 is shown. A first common potential conductor band 16A1 arranged so as to intersect the address line 12 and the data line 13, respectively, and the first common potential conductor band 16A1 and the address line 1
2 and the protection element 17 connected between the data wiring 13
Are configured as shown in FIGS. 2 and 3.

That is, an island-shaped semiconductor film 21 is formed on the gate insulating film 20 covering the address wiring 12 formed on the insulating transparent substrate 11, and two electrodes are separated on the semiconductor film 21. A semiconductor protective layer 22 for protecting the semiconductor film 21 is formed.
The ohmic junction layers 23 and 25 made of semiconductors doped with impurities are formed on both sides of the semiconductor film 21 sandwiching the film.
Electrodes 24 and 26 are formed through the.

Then, one electrode 24 is the gate insulating film 2
0 through the contact hole 20a
Connected to the address wiring 12 by the other electrode 2
6 is connected to the first common potential conductor band 16A1, and these protective element regions are covered with a protective film 28. In addition,
29 is the address wiring 12 and the first common potential conductor band 16A
The insulating film 29 intersects with 1.

The protective element 17 shown in FIGS. 2 and 3 described above.
Indicates that, as the voltage applied between the electrodes 24 and 26 increases, the excess electrons injected into the amorphous silicon are trapped in the localized level in the band gap of the amorphous silicon and the space Form an electric charge. As a result, the Fermi level is displaced toward the conductor, so that the conduction electron density is increased, and the current is not proportional to the voltage but sharply increases. Such a current is called a space charge limited current, and a semiconductor having a localized level such as amorphous silicon exhibits a voltage-current characteristic with large non-linearity.

Next, an example of forming the second protective element will be described with reference to FIGS. Here again, an example of connection between the address wiring 12 and the common potential conductor band 16A1 is shown. A first common potential conductor band 16A1 arranged to intersect with the address wiring 12 and the first common potential conductor band 1
The protection element 17 connected between 6A1 and the address wiring 12 is configured as shown in FIGS.

That is, the island-shaped base electrode 30 is formed on the insulating transparent substrate 11, and the diodes D1 and D2 facing each other are formed on the base electrode 30. That is, the p-type semiconductor layer 31 is formed on the base electrode 30 from the lower layer.
A p, i-type layer 31i, and an n-type semiconductor layer 31n are deposited and covered with an insulating film 32, the insulating film 32 is contacted by photolithography, and the connecting conductor 33 causes the n-type semiconductor layer 31n of the diode D1. Is connected to the address wiring 12, and the n-type semiconductor layer 31n of the diode D2 is connected to the first common potential conductor band 16A1. The surface is covered with the protective film 34.

Reference numeral 29 is an insulating film at the intersection with the address wiring 12, the first common potential conductor band 16A1. With such a configuration, when an impulse voltage due to static electricity is applied to one of the address wirings 12, the protection element 17 connected to the common potential conductor strip 16A1 or 16A2 on the address wiring 12 side becomes conductive and is injected. The energy of the generated electric charge is distributed to all the address wirings 12. Then, the dispersed and weakened impulse propagates through the address wiring 12, and is dispersed and averaged again at the common potential conductor band 16A2 or 16A1 on the opposite side.

Although this effect is present in the conventional example as well, since the common potential conductor band is independent in the address wiring 12 and the data wiring 13 in this embodiment, the impulse is generated on the short ring as in the conventional example. Does not propagate. That is, although the address wiring 12 and the data wiring 13 are coupled by a parasitic capacitance such as a crossing portion of the wiring, since there is no coupling by the short ring, the data wiring 13 seen from the address wiring 12 is in a floating state. On the other hand, when the potential of the address wiring 12 changes, the ground potential of the data wiring 13 changes in substantially the same manner, so that a high voltage is not applied between the address wiring 12 and the data wiring 13. As a result, a high protection effect can be obtained even with impulsive voltage application.

Further, the address wiring 12 and the data wiring 13
Are separated from each other in terms of direct current, there is no leakage current between the address wiring 12 and the data wiring 13 via the protection element as in the conventional example, which reduces the load on the drive circuit and reduces power consumption. There is no unnecessary increase. Next, a second embodiment of the present invention will be described.

FIG. 6 is a TFT showing a second embodiment of the present invention.
It is an equivalent circuit diagram which shows schematic structure of an array. In the second embodiment shown in FIG. 6, one of the TFT 14 and the source electrode or the drain electrode of the TFT 14 is provided at each intersection of the plurality of address wirings 12 and the plurality of data wirings 13 which are arranged to cross each other. A plurality of display electrodes 15 connected to each other are arranged in a matrix form, the address wiring 12 is connected to the gate electrode of the TFT 14, and the data wiring 13 is connected to the other of the source electrode and the drain electrode. A protection element 17 having high resistance or non-linear resistance characteristics is provided, which connects the end portions of the data wiring 13 adjacent to each other to each of the address wiring and the data wiring. In this way, the plurality of protection elements 17 include the first common potential bridging portion 17A formed by connecting both ends of the protection element 17 to the adjacent address wirings 12, and the protection element 1
The second common potential bridging portion 17B is formed by connecting both end portions of 7 to the adjacent data wiring 13.

In this embodiment, as shown in the first embodiment, the protection element 17 is directly provided between the adjacent address wirings 12 and between the adjacent data wirings 13 without using the common potential conductor band. The connection is made so that the potentials between the address wirings 12 and the adjacent data wirings 13 can be made common by applying sharp impulse-like static electricity.

According to the second embodiment, the same operational effect as that of the first embodiment can be obtained, the circuit structure can be simplified, and the common potential intersecting the address wiring group or the data wiring group can be obtained. Since it is not necessary to provide a conductor band, defects due to short-circuit between them do not occur, and the manufacturing yield is improved. Furthermore, since each address wiring and each data wiring are connected in series by the high resistance protection element, the leakage of the drive signal between the wirings is reduced, and thus the driving can be facilitated.

Next, a third embodiment of the present invention will be described. FIG. 7 is an equivalent circuit diagram showing a schematic configuration of a TFT array showing a third embodiment of the present invention. Similar to FIG. 1, a display area is formed and the insulating transparent substrate 41 is provided on the left side and the right side. Is a first common potential conductor strip 16A1 and 16A2 that connects only a group of address wirings 12 to a common potential via a protection element 17 having a high resistance or a non-linear resistance characteristic, above the insulating transparent substrate 11 and On the lower side, second common potential conductor bands 16D1 and 16D2 are formed to connect only the group of data wirings 13 via the protection element 17 having a high resistance or a non-linear resistance characteristic so as to have a common potential.

Further, the group of address wirings 12 is located outside the first common potential conductor strips 16A1 and 16A2 and outside the cutting line 43 for cutting and removing the periphery of the substrate in the process of manufacturing the display device. First shorting wirings 42A1 and 42A2 for shorting only the second common potential conductor band 16
Second shorting wirings 42D1 and 42D2, which are located outside D1 and 16D2 and outside the cutting line 43 and short-circuit only the group of data wirings 14, are formed.

According to the third embodiment, the data wiring and the address wiring are short-circuited up to the step of cutting and removing the first and second short-circuiting wirings, and after that step, they are respectively connected via the protective element. As a result, the electrostatic protection becomes more reliable. Next, a fourth embodiment of the present invention will be described. FIG. 8 is an equivalent circuit diagram showing a schematic configuration of a TFT array showing a fourth embodiment of the present invention, and similarly to FIG. 1, a display region is formed and the insulating transparent substrate 11 is provided on the left side and the right side. Is a first common potential conductor band 16A1 that connects only a group of address wirings 12 via a protection element 17 having a high resistance or a non-linear resistance characteristic so as to have a common potential.
And 16A2, and a second common potential that connects only the group of data wirings 13 to the upper and lower sides of the insulating transparent substrate 11 via the protection element 17 having a high resistance or a non-linear resistance characteristic so as to have a common potential. Conductor strips 16D1 and 16D2 are formed.

Furthermore, the first common potential conductor strips 16A1 and 1
6A2 and the second common potential conductor bands 16D1 and 16D2, and a short ring 44 that is located outside the cutting line 43 and that short-circuits the group of address wirings 12 and the group of data wirings 13 are formed. It is a thing. This 4th
According to the embodiment, a DC static electricity protection effect is obtained before the step of cutting and removing the first and second short-circuit wirings, and an AC protection effect against static electricity is obtained after the step.
Therefore, the manufacturing department yield is further improved.

Next, a fifth embodiment of the present invention will be described. FIG. 9 is an equivalent circuit diagram showing a schematic configuration of a TFT array showing a fifth embodiment of the present invention. As shown in FIG.
The display area is formed, and the address wiring 12 and the data wiring 13 are formed.
Is provided with a protection element 17 having a high resistance or a non-linear resistance characteristic, which connects end portions adjacent to each other to each of the address wiring group and the data wiring group. In this way, the plurality of protection elements 17 have the first common potential bridging portion 17A formed by connecting both ends of the protection element 17 to the adjacent address wirings 12 and the data having the both ends of the protection element 17 adjacent to each other. A second common potential bridging portion 17D connected to the wiring 13 is provided.

Further, the first common potential bridging portion 17A and the second common potential bridging portion 17D are positioned outside the cutting line 43 and outside the first common potential bridging portion 17D, and short-circuit only the group of the address wirings 12. Short circuit wirings 17A1 and 17A2 and the data wiring 13
Second shorting wirings 17D1 and 17D for shorting only the group
2 is formed. According to the fifth embodiment, the effects of both the second embodiment and the third embodiment described above can be obtained, the effect of electrostatic protection is ensured, and the manufacture is easy.

Next, a sixth embodiment of the present invention will be described with reference to FIG.
Will be explained. Similar to the fifth embodiment, the display area and the first common potential bridging portion 17A and the second common potential bridging portion 17D are provided, and the short ring 44 is formed outside the cutting line 43. . According to the sixth embodiment, the same effects as those described in the second embodiment and the fourth embodiment described above can be obtained, the electrostatic protection is ensured, and the manufacturing is facilitated.

As described above, in the third to sixth embodiments, the short-circuit wires 17A1, 17A2, 17D1 and 17D2 made of a conductive film are provided on the outer peripheral edge of the TFT array.
Alternatively, a short ring 44 is formed, and the plurality of address wirings 12 and the plurality of data wirings 13 are respectively extended from the display area to form the shorting wirings 17A1.
17A2, 17D1, 17D2 or short ring 44
It is connected to the. The short-circuit line and the short ring 44 are formed by the cutting line 4 shown by a broken line after the substrate facing the TFT array is bonded after the manufacturing process of the TFT array or in the process of forming the liquid crystal cell.
Cut along 3 and removed.

Near the outside of the display area and inside the cutting line, a short-circuit wiring surrounding the display area is formed so as to intersect the address wiring 12 and the data wiring 13 in an insulated manner. Since the short-circuiting wiring and the address wiring 12 and the data wiring 13 are connected by the protection element 17, respectively, the TF is generated after the manufacturing process of the TFT array or during the manufacturing process of the liquid crystal cell.
After joining the substrates facing the T array and cutting and removing the short-circuit wiring or the short ring 44 along the cutting line 43, either or both of the address wiring 12 and the data wiring 13 are exposed to a high voltage due to static electricity. When applied, a large current flows through the protection element 17, and the address wiring 12 and the data wiring 13 are kept at the same potential.

With this structure, it is possible to protect the TFT array due to static electricity in the steps before and after cutting by the cutting line. Therefore, after the shorting wiring or the short ring 44 is cut and removed, a high voltage due to static electricity is applied to the address wiring 12 or the data wiring 1.
3 is applied between these wirings 12 and 13 and TF
No deterioration or breakdown of insulation between the gate electrode and the drain electrode of T14 or variation in the threshold value of the TFT occurs.

Since the liquid crystal display device using this TFT array is usually driven by a voltage of about 25V, the resistance of the protection element 17 in this voltage region is sufficiently high, and the address wirings 12 and the data wirings 13 are electrically connected. And the leakage current flowing between the address wiring 12 and the data wiring 13 is about 10
Since it is a minute current of the order of ^-10 A, it does not affect the data signal applied to each display electrode 15,
It is possible to display a clear image, and after cutting and removing the short circuit wiring or the short ring 44, it is possible to electrically inspect the wiring for disconnection and short circuit and to electrically measure the characteristics of each TFT. it can.

The present invention is not limited to the above embodiments, and various modifications can be made based on the spirit of the present invention, and they are not excluded from the scope of the present invention.

[0040]

As described above in detail, according to the present invention, the protection element connected to each of the address wiring and the data wiring and having the high resistance or the non-linear resistance characteristic and the both end sides of the address wiring group are provided. A first common potential conductor band connected to a common potential via the protection element and a second common potential conductor band connected to both ends of the data wiring group to a common potential via the protection device are provided. Therefore, it has a high protection effect against impulsive voltage application due to static electricity. Further, since the leakage current of the protection circuit is small, the load on the drive circuit and the increase in power consumption are small.

[Brief description of drawings]

FIG. 1 is an equivalent circuit diagram showing a schematic configuration of a TFT array showing a first embodiment of the present invention.

FIG. 2 is a diagram showing a formation example of a first protection element of the TFT array showing the first embodiment of the present invention.

3 is a cross-sectional view taken along the line AA of FIG.

FIG. 4 is a diagram showing a formation example of a second protection element of the TFT array showing the first embodiment of the present invention.

5 is a sectional view taken along line BB of FIG.

FIG. 6 is an equivalent circuit diagram showing a schematic configuration of a TFT array showing a second embodiment of the present invention.

FIG. 7 is an equivalent circuit diagram showing a schematic configuration of a TFT array showing a third embodiment of the present invention.

FIG. 8 is an equivalent circuit diagram showing a schematic configuration of a TFT array showing a fourth embodiment of the present invention.

FIG. 9 is an equivalent circuit diagram showing a schematic configuration of a TFT array showing a fifth embodiment of the present invention.

FIG. 10 is an equivalent circuit diagram showing a schematic configuration of a TFT array showing a sixth embodiment of the present invention.

FIG. 11 is an equivalent circuit diagram showing a schematic configuration of a conventional TFT array.

FIG. 12 is a characteristic diagram of a non-linear protection element of a conventional TFT array.

[Explanation of symbols]

 11 Insulating Transparent Substrate 12 Address Wiring 13 Data Wiring 14 TFT 15 Display Electrode 17 Protective Element 16A1, 16A2 First Common Potential Conductor Band 16D1, 16D2 Second Common Potential Conductor Band 18, 19 Connection Terminal 20 Gate Insulating Film 20a Contact Hole 21 Island-shaped semiconductor film 22 Semiconductor protective layer 23,25 Ohmic junction layer 24,26 Electrode 27,33 Connection conductor 28 Protective film 29 Crossing insulating film 30 Island-shaped base electrode D1, D2 Diode 31p p-type semiconductor layer 31i i-type layer 31n n-type semiconductor layer 32 insulating film 34 protective film 41 first common potential bridging part 42 second common potential bridging part 42A1, 42A2 first short-circuit wiring 42D1, 42D2 second short-circuit wiring 43 cutting line 44 short ring

Claims (6)

[Claims] 1. A thin film transistor and a display electrode connected to one of a source electrode and a drain electrode of the thin film transistor are provided at each intersection of a plurality of address lines and a plurality of data lines arranged to intersect each other. In a thin film transistor array in which a plurality of thin film transistors are arranged in a matrix and the address wiring is connected to the gate electrode of the thin film transistor and the data wiring is connected to the other of the source electrode and the drain electrode, respectively, (a) is connected to each of the address wiring and the data wiring. And a first common potential conductor band connecting both ends of the address wiring group to a common potential via the protection element, and (c) a data wiring group. A second common potential conductor band connecting both ends of the same to a common potential via the protection element. Thin film transistor array. 2. A thin film transistor and a display electrode connected to one of a source electrode and a drain electrode of the thin film transistor are provided at each intersection of a plurality of address lines and a plurality of data lines arranged to intersect each other. In a thin film transistor array in which a plurality of gate electrodes of the thin film transistor are connected to the address wiring and a source electrode and a drain electrode are connected to the data wiring, respectively, a plurality of them are arranged in a matrix form. A first common potential bridging portion composed of a plurality of protection elements having high resistance or non-linear resistance characteristics, which are connected to each other at the ends of the address wirings, and (b) only the data wirings are connected to a plurality of adjacent data wirings. A second common potential bridge composed of a plurality of protective elements having high resistance or non-linear resistance characteristics which are connected to each other at the ends A thin film transistor array, comprising: 3. A thin film transistor and a display electrode connected to one of a source electrode and a drain electrode of the thin film transistor are provided at each intersection of a plurality of address lines and a plurality of data lines arranged to intersect each other. In a thin film transistor array in which a plurality of thin film transistors are arranged in a matrix and the address wiring is connected to the gate electrode of the thin film transistor and the data wiring is connected to the other of the source electrode and the drain electrode, respectively, (a) is connected to each of the address wiring and the data wiring. A protective element having high resistance or non-linear resistance characteristics, and (b) a first common potential conductor band for connecting both end sides of a plurality of address wirings to a common potential via the protective element, and (c) a plurality of A second common potential conductor band connecting both ends of the data wiring to a common potential via the protection element, (D) a first short-circuit line located outside the first common potential conductor band and short-circuiting a plurality of address lines with each other; and (e) located outside the second common potential conductor band, Second short-circuiting a plurality of data wirings
2. A thin film transistor array, comprising: 4. A thin film transistor and a display electrode connected to one of a source electrode and a drain electrode of the thin film transistor are provided at each intersection of a plurality of address lines and a plurality of data lines arranged to intersect each other. In a thin film transistor array in which a plurality of thin film transistors are arranged in a matrix and the address wiring is connected to the gate electrode of the thin film transistor and the data wiring is connected to the other of the source electrode and the drain electrode, respectively, (a) is connected to each of the address wiring and the data wiring. A protective element having high resistance or non-linear resistance characteristics, and (b) a first common potential conductor band for connecting both end sides of a plurality of address wirings to a common potential via the protective element, and (c) a plurality of A second common potential conductor band connecting both ends of the data wiring to a common potential via the protection element, (D) A thin film transistor, which is provided on the outer circumference of the first common potential conductor band and the second common potential conductor band, and includes a short ring that short-circuits a plurality of address lines and a plurality of data lines. array. 5. A thin film transistor and a display electrode connected to one of a source electrode and a drain electrode of the thin film transistor are provided at each intersection of a plurality of address lines and a plurality of data lines arranged to intersect each other. In a thin film transistor array in which a plurality of gate electrodes of the thin film transistor are connected to the address wiring and a source electrode and a drain electrode are connected to the data wiring, respectively, a plurality of them are arranged in a matrix form. A first common potential bridging portion composed of a plurality of protection elements having high resistance or non-linear resistance characteristics, which are connected to each other at the ends of the address wirings, and (b) only the data wirings are connected to a plurality of adjacent data wirings. A second common potential bridge composed of a plurality of protective elements having high resistance or non-linear resistance characteristics which are connected to each other at the ends A first short-circuit wire located outside the first common-potential bridge section and short-circuiting a plurality of address wires with each other; and (d) a second common-potential conductor band. A thin film transistor array, comprising: a second short-circuiting line located outside and short-circuiting a plurality of data lines with each other. 6. A thin film transistor and a display electrode connected to one of a source electrode and a drain electrode of the thin film transistor are provided at each intersection of a plurality of address lines and a plurality of data lines arranged to intersect each other. In a thin film transistor array in which a plurality of gate electrodes of the thin film transistor are connected to the address wiring and a source electrode and a drain electrode are connected to the data wiring, respectively, a plurality of them are arranged in a matrix form. A first common potential bridging portion composed of a plurality of protection elements having high resistance or non-linear resistance characteristics, which are connected to each other at the ends of the address wirings, and (b) only the data wirings are connected to a plurality of adjacent data wirings. A second common potential bridge composed of a plurality of protective elements having high resistance or non-linear resistance characteristics which are connected to each other at the ends And a short ring located outside the first common potential bridging portion and the second common potential bridging portion and short-circuiting a plurality of address wirings and a plurality of data wirings. A thin film transistor array.