JPH0620067B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a semiconductor device having a wiring layer made of a metal such as aluminum and a method for manufacturing the same.

[Technical background of the invention and its problems]

As is well known, aluminum is used to connect diffusion layers such as source / drain regions formed on a semiconductor substrate or gates.

FIG. 1 is a diagram showing a conventional semiconductor device having aluminum wiring. In the figure, 11 is a semiconductor substrate in which a predetermined region such as the diffusion layer 12 is formed, and an oxide film is formed as an insulating film 13 on the substrate 11. Reference numeral 15 shows a cross section of a multilayer wiring such as a gate electrode made of, for example, polysilicon which is insulated by the insulating film 13.

When the wiring layer 16 is formed on such a wafer by vapor deposition of aluminum or the like, aluminum is vapor-deposited uniformly on the flat portion as shown in the figure, but the level difference on the wafer surface is large, such as in the vicinity of the contact hole 14. The phenomenon that aluminum wiring is cut often occurs in the part.

In particular, recently, with increasing integration, contact holes are often opened by the reactive ion etching method. However, the contact holes are opened almost vertically by the reactive ion etching method. Since a step difference becomes larger in a contact hole or the like in the vicinity, disconnection is likely to occur at the step portion, and it is necessary to take measures against a wiring defect of the aluminum wiring in the step portion called so-called step break.

[Object of the Invention]

The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor device in which wiring failure due to step breakage of aluminum wiring is prevented, and a manufacturing method thereof.

[Outline of Invention]

That is, the semiconductor device and the method of manufacturing the same according to the present invention utilize the property that polysilicon (polycrystalline silicon) can be isotropically deposited with a substantially uniform film thickness regardless of the direction of the surface. At least the periphery of the contact hole and the inside thereof are wired by a wiring layer having a two-layer structure in which the wiring of the polysilicon layer is formed as the upper layer.

Example of Invention

An embodiment of the present invention will be described below with reference to the drawings. In the drawings, the same components are designated by the same reference numerals, and detailed description thereof will be omitted.

First, as shown in FIG. 2 (a), the diffusion layer 12 is formed in the substrate 11.
A contact hole 14 opening to the diffusion layer 13 is provided on the insulating film 13 made of a silicon oxide film on the upper surface of the formed wafer.

Next, as shown in FIG. 2 (b), an aluminum layer 20 is deposited as a first conductive layer on the entire surface of the wafer, and a polysilicon layer 2 is deposited as a second conductive layer on the aluminum layer 20.
1 is laminated and deposited.

Next, as shown in FIG. 2 (c), the aluminum layer 20 is formed.
Then, the polysilicon layer 21 is photo-etched into a predetermined wiring pattern to form a wiring layer 22 having a two-layer structure of the aluminum layer 20 and the polysilicon layer 21.

Thereafter, as shown in FIG. 2D, a PSG film (phosphorus glass film) 23 is deposited on the upper surface of the wafer as a protective film.

Further, although not shown, the PSG is exposed so that the aluminum layer 20 is exposed at a portion to be a bonding pad.
The film 23 and the polysilicon layer 21 are photo-etched. This is because an aluminum surface is preferable for the bonding pad portion in order to maintain good connectivity with the bonding wire.

In the semiconductor device having the wiring layer 22 thus formed,
As shown in FIG. 3, even if the aluminum layer 20 is discontinued, the upper polysilicon layer 21 is uniformly formed along the surface of the contact hole, so that the entire wiring layer 22 is broken. You don't have to. In this case, the contact resistance between the aluminum wiring 20 and the diffusion layer 12 depends on the impurity concentration of the diffusion layer 12, but the contact hole 14 is 2
In the case of μ × 2μ, when the depth of the diffusion layer is 0.4 μm, it is usually about 50 to 100Ω, and the resistance of the polysilicon layer 21 for connecting the aluminum wiring having the step breakage is almost neglected as compared with the above contact resistance. As small as possible.

Further, in the conventional photolithography process of the aluminum layer 20, the light for exposure is reflected on the aluminum surface, and particularly with a fine aluminum pattern, it is difficult to perform etching along the photomask accurately. When the polysilicon layer 21 is deposited on the aluminum layer 20, the polysilicon layer 21 absorbs light, so that more accurate photo-etching can be performed.

The step of depositing the polysilicon layer 21 on the aluminum layer 20 in the above-described embodiment is performed at a low temperature (350 ° C. to 6 ° C.).
It is desirable to carry out at about 00 ° C. This is because at high temperature, silicon and aluminum form an alloy, and this alloy penetrates from the diffusion layer 12 to the substrate 11 and causes the diffusion layer 12 and the substrate 11 to be shorted.

In the first and second embodiments described above, the case where the polysilicon layer is formed as the second conductive layer has been described, but it is possible to form a substantially isotropic film with a uniform film thickness, absorb light, and absorb fine particles. Any other conductive material may be used as long as it is suitable for processing.

〔The invention's effect〕

As described above, according to the present invention, it is possible to provide a semiconductor device and a manufacturing method thereof capable of preventing the adverse effect of disconnection of metal wiring such as aluminum and suitable for microfabrication, and particularly effective for a device having a multilayer wiring structure. Is.

[Brief description of drawings]

FIG. 1 is a sectional view of a conventional semiconductor device, FIG. 2 is a diagram showing a semiconductor device according to an embodiment of the present invention together with its manufacturing process, and FIG. 3 is an enlarged view of the semiconductor device according to an embodiment of the present invention. FIG. 11 ... Semiconductor substrate, 12 ... Diffusion layer, 13 ... Insulating film, 14 ... Contact hole, 16 ... Metal wiring group,
20 ... Aluminum layer, 21 ... Polysilicon layer, 2
2 ... Wiring layer.

Front page continuation (72) Inventor Masamichi Asano 1 Komukai Toshiba-cho, Kouki-ku, Kawasaki-shi, Kanagawa Higashi Koshibaura Electric Co., Ltd. Transistor factory (56) Reference JP-A-51-147273 (JP, A) JP JP-A-54-145488 (JP, A) JP-A-51-113477 (JP, A) Actually developed JP-A-49-24171 (JP, U)

Claims (6)

[Claims] 1. A semiconductor substrate, an insulating film having a contact hole formed on the semiconductor substrate, and a portion where a disconnection is likely to occur from the insulating film to the bottom of the contact hole via the side surface of the step formed by the contact hole. The first conductive layer, which contains aluminum as a main component over the entire area, and the at least the periphery of the contact hole to which the first conductive layer is deposited and the inside thereof is substantially isotropic regardless of the surface direction. A second electrically conductive layer which has a property of compensating for good electrical connection of a portion of the first electrically conductive layer which is adhered and which has a disconnection and which absorbs light, and which prevents reflection of light by the first electrically conductive layer below. And a conductive layer of. 2. The semiconductor device according to claim 1, wherein the wiring layer has a bonding pad. 3. The first conductive layer according to claim 1, wherein the second conductive layer is mainly composed of polysilicon.
The semiconductor device according to any one of items. 4. A step of depositing an insulating film on a semiconductor substrate to form a contact hole at a predetermined position, and a portion where a disconnection easily occurs from the insulating film to the side surface of the step due to the contact hole and the bottom of the contact hole. A step of forming a first conductive layer containing aluminum as a main component so as to be connected to a predetermined region via a contact hole, and at least in the vicinity of the contact hole to which the first conductive layer is deposited and inside thereof, in the direction of the surface. Without compromising the good electrical connection of the portion of the first conductive layer where the disconnection occurs in the first conductive layer and has a property of absorbing light, and has a property of absorbing light. Stacking a second conductive layer to prevent reflection of light by the conductive layer, so that either the first conductive layer or the second conductive layer is electrically connected to the predetermined portion through the contact hole; The method of manufacturing a semiconductor device characterized by comprising the step of etching the first and the second conductive layer so that the pattern of the predetermined wiring layer. 5. A method of manufacturing a semiconductor device according to claim 4, wherein a bonding pad portion is provided on the wiring layer. 6. The method for manufacturing a semiconductor device according to claim 4, wherein a conductive material containing polysilicon as a main component is used as the second conductive layer.