JPH06177499A - Ceramic wiring board - Google Patents

Ceramic wiring board

Info

Publication number
JPH06177499A
JPH06177499A JP32451292A JP32451292A JPH06177499A JP H06177499 A JPH06177499 A JP H06177499A JP 32451292 A JP32451292 A JP 32451292A JP 32451292 A JP32451292 A JP 32451292A JP H06177499 A JPH06177499 A JP H06177499A
Authority
JP
Japan
Prior art keywords
conductor
conductive path
wiring board
resistor
ceramic wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP32451292A
Other languages
Japanese (ja)
Inventor
Masaya Koyama
雅也 小山
Yoshiharu Kasai
与志治 笠井
Satoru Ogawa
悟 小川
Kazunobu Morioka
一信 盛岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP32451292A priority Critical patent/JPH06177499A/en
Publication of JPH06177499A publication Critical patent/JPH06177499A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide a ceramic wiring board, in which the adhesive properties of a conductor and a conductive path are not deteriorated even at the time of heating at a high temperature and reliability on the connection of the conductor and the conductive path is improved. CONSTITUTION:Conductors 2 composed of conductor paste containing silver are formed on the surface of a ceramic board 1, a resistor 3 is shaped while being brought into contact with the conductors 2, and nickel layers 5 held by said conductors 2 and conductive paths 6 are formed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、プリント配線板として
使用されるセラミック配線板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic wiring board used as a printed wiring board.

【0002】[0002]

【従来の技術】セラミック配線板として、特公昭53−
21109、特開平3−109793等に開示されてい
る如く、焼成したセラミック基板の表面に厚膜法によ
り、Ag等を成分とした導体、抵抗体、保護ガラスを順
次印刷し、焼成した後に、無電解銅メッキ法により銅被
膜を形成し、この銅被膜にエッチングにより所定の導電
路を形成する方法が知られている。近年このセラミック
配線板に、高温での耐熱性が求められている。そこで、
例えば、上記セラミック配線板を700℃以上の高温、
又は250℃で1000時間以上放置する耐熱試験で評
価すると、上記導体と導電路の接着性が低下し上記導体
と導電路の接続信頼性が低下するという欠点がある。
2. Description of the Related Art As a ceramic wiring board, Japanese Patent Publication No. 53-
21109, Japanese Patent Laid-Open No. 3-109793, etc., a conductor, resistor, and protective glass containing Ag as a component are sequentially printed on the surface of a fired ceramic substrate by a thick film method, and after firing, there is no A method is known in which a copper film is formed by an electrolytic copper plating method, and a predetermined conductive path is formed on the copper film by etching. In recent years, this ceramic wiring board is required to have heat resistance at high temperatures. Therefore,
For example, if the ceramic wiring board has a high temperature of 700 ° C. or higher,
Alternatively, when evaluated by a heat resistance test in which the conductor and the conductive path are left to stand at 250 ° C. for 1000 hours or more, there is a drawback that the adhesiveness between the conductor and the conductive path is reduced and the connection reliability between the conductor and the conductive path is reduced.

【0003】[0003]

【発明が解決しようとする課題】本発明は上記の欠点を
解消するためになされたもので、その目的とするところ
は、セラミック配線板において、高温に加熱しても導体
と導電路の接着性が低下することなく、導体と導電路の
接続信頼性が良好なセラミック配線板を提供することに
ある。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned drawbacks, and an object of the present invention is to bond a conductor and a conductive path in a ceramic wiring board even when heated to a high temperature. It is intended to provide a ceramic wiring board in which the connection reliability between the conductor and the conductive path is excellent without lowering the contact resistance.

【0004】[0004]

【課題を解決するための手段】本発明のセラミック配線
板は、セラミック基板(1)の表面に、銀を含む導体ペ
ーストから成る導体(2)を有し、この導体(2)に接
する、銅の導電路(6)と抵抗体(3)が形成されてい
るセラミック配線板において、上記導体(2)と上記導
電路(6)に挟まれたニッケル層(5)が形成されてい
ることを特徴とする。
A ceramic wiring board according to the present invention has a conductor (2) made of a conductor paste containing silver on the surface of a ceramic substrate (1), and is in contact with the conductor (2). In the ceramic wiring board in which the conductive path (6) and the resistor (3) are formed, the nickel layer (5) sandwiched between the conductor (2) and the conductive path (6) is formed. Characterize.

【0005】[0005]

【作用】本発明では、導体(2)を構成するペーストの
硬化物中に含有する銀がニッケルに対し拡散しにくいの
に比較して、銅に対しては銀の拡散が大きい。従来70
0℃以上の熱処理や、250℃で1000時間以上放置
すると、導電路(6)との接着の核として存在していた
上記導体(2)中の銀が、銅の導電路(6)中に拡散す
るため、導電路(6)と導体(2)の接着力が弱まり接
続信頼性が低下すると推察される。従って、ニッケル層
を導電路(6)と導体(2)の間に挟むことで、導体
(2)中の銀の拡散が少なくなり、接続信頼性の低下が
防止できる。
In the present invention, silver contained in the cured product of the paste constituting the conductor (2) is less likely to diffuse into nickel, whereas silver is more diffused into copper. Conventional 70
When heat-treated at 0 ° C. or higher or left at 250 ° C. for 1000 hours or longer, the silver in the conductor (2), which was present as a nucleus for adhesion with the conductive path (6), was transferred to the copper conductive path (6). It is presumed that, because of the diffusion, the adhesive force between the conductive path (6) and the conductor (2) is weakened and the connection reliability is reduced. Therefore, by sandwiching the nickel layer between the conductive path (6) and the conductor (2), the diffusion of silver in the conductor (2) is reduced, and a decrease in connection reliability can be prevented.

【0006】以下、本発明を詳細に説明する。図1は本
発明に係るセラミック配線板の一実施例を示す断面図で
ある。図に示す如く、セラミック基板(1)の表面に導
体(2)を有し、この導体(2)の一部とセラミック基
板(1)に接して、保護ガラス(4)で被覆された抵抗
体(3)が形成されている。上記抵抗体(3)と接して
ない導体(2)は、ニッケル層(5)が被覆され、この
ニッケル層(5)を挟んで、セラミック基板(1)上に
形成された銅の導電路(6)と導体(2)が接続してい
る。
The present invention will be described in detail below. FIG. 1 is a sectional view showing an embodiment of a ceramic wiring board according to the present invention. As shown in the figure, the ceramic substrate (1) has a conductor (2) on its surface, and a resistor coated with a protective glass (4) in contact with a part of the conductor (2) and the ceramic substrate (1). (3) is formed. The conductor (2) not in contact with the resistor (3) is covered with the nickel layer (5), and the copper conductive path (formed on the ceramic substrate (1) with the nickel layer (5) interposed therebetween ( 6) and the conductor (2) are connected.

【0007】上記セラミック基板(1)は、焼結セラミ
ックタイプのものが適当であり、材質としては、例え
ば、アルミナ、フォルステナイト、ジルコニア、ムライ
ト、コージェライト、チタニア、チタン酸バリウム、チ
タン酸カルシウム等の酸化物系のセラミックが主に使用
されるが、炭化ケイ素等の炭化物系セラミック、窒化ア
ルミニウム等の窒化物系のセラミックが使用されてもよ
く、複数種のセラミックが併用されてもよい。
The above-mentioned ceramic substrate (1) is preferably of a sintered ceramic type, and the material thereof is, for example, alumina, forsterite, zirconia, mullite, cordierite, titania, barium titanate, calcium titanate or the like. The oxide-based ceramics are used mainly, but carbide-based ceramics such as silicon carbide and nitride-based ceramics such as aluminum nitride may be used, or a plurality of types of ceramics may be used in combination.

【0008】上記セラミック基板(1)は表面の導体
(2)や導電路(6)の密着力を高めるため、予め粗面
化処理が施されていることが好ましい。粗面化処理とし
ては、例えば、250℃〜330℃のリン酸中に2〜1
0分程度浸漬する化学的な粗面化処理等が挙げられる。
The ceramic substrate (1) is preferably subjected to a roughening treatment in advance in order to enhance the adhesion of the conductor (2) and the conductive path (6) on the surface. As the roughening treatment, for example, 2-1 in phosphoric acid at 250 ° C to 330 ° C is used.
A chemical surface-roughening treatment in which it is immersed for about 0 minutes can be used.

【0009】上記導体(2)はAgを含む導体ペースト
を用いた、いわゆる厚膜法により形成される。この導体
(2)は公知の各種厚膜法を用いればよく、例えば、A
g、AgとPdの混合物を成分として含有する導電性ペ
ーストをスクリーン印刷し、焼き付けして形成される。
このペースト硬化物中に含有するAgが、後述のニッケ
ルメッキの際、ニッケルとの接着の核として働く。導電
性ペーストは後述の厚みの薄い導電路(6)でも、抵抗
体(3)との接続信頼性を高める働きをする。
The conductor (2) is formed by a so-called thick film method using a conductor paste containing Ag. For this conductor (2), various known thick film methods may be used.
It is formed by screen-printing and baking a conductive paste containing g, a mixture of Ag and Pd as a component.
Ag contained in this cured paste serves as a nucleus for adhesion with nickel during nickel plating described later. The conductive paste functions to enhance the connection reliability with the resistor (3) even in the later-described thin conductive path (6).

【0010】上記導体(2)を形成したセラミック基板
(1)には、抵抗体(3)が形成されている。抵抗体
(3)は、公知の各種方法を用いればよく、例えば、R
uO2等の抵抗体用ペーストを印刷し、850〜900
℃で焼成して形成される。
A resistor (3) is formed on the ceramic substrate (1) on which the conductor (2) is formed. The resistor (3) may be formed by various known methods, for example, R
Print a resistor paste such as uO 2 to 850-900
It is formed by firing at ℃.

【0011】上記抵抗体(3)には保護ガラス(4)が
被覆されている。この保護ガラス(4)は、例えば、抵
抗体(3)を形成したセラミック基板(1)にガラスペ
ーストを印刷し、700〜800℃で焼成して形成され
る。このガラスペーストは後工程での化学的な処理に耐
えられる耐薬品性の優れたものが好ましい。
A protective glass (4) is coated on the resistor (3). The protective glass (4) is formed, for example, by printing a glass paste on the ceramic substrate (1) on which the resistor (3) is formed and firing at 700 to 800 ° C. This glass paste is preferably one having excellent chemical resistance capable of withstanding a chemical treatment in a later step.

【0012】本発明では、上記抵抗体(3)に接してな
い、導体(2)の部分にニッケル層(5)が被覆されて
いる。ニッケル層(5)の被覆は導体(2)にのみ被覆
されていることが望ましく、この被覆方法としては、例
えば、導体(2)を塩酸、市販の核付け液等で洗浄して
活性化した後、無電解ニッケルメッキ液に浸漬すること
により、露出している導体(2)を被覆する2〜3μm
のニッケル層(5)が形成される。
In the present invention, the portion of the conductor (2) not in contact with the resistor (3) is covered with the nickel layer (5). It is desirable that the nickel layer (5) is coated only on the conductor (2). As a coating method, for example, the conductor (2) is washed with hydrochloric acid, a commercially available nucleating solution or the like to activate it. After that, the exposed conductor (2) is covered with the electroless nickel plating solution by 2-3 μm.
A nickel layer (5) is formed.

【0013】上記導体(2)にニッケル層(5)を被覆
したセラミック基板(1)に銅の導電路(6)が形成さ
れている。この導電路(6)の形成は、特に限定され
ず、公知の無電解銅メッキ法、高速スパッタリング法が
挙げられる。例えば、上記無電解銅メッキによる導電路
(6)を用いた場合、前処理でPd等を核付けし、無電
解銅メッキ浴にセラミック基板(1)を浸漬して銅被膜
を被覆し、この銅被膜に例えばフォトリングラフィ技術
等を利用してエッチング処理を施すことにより、導電路
(6)を形成することができる。上記導電路(6)の厚
さは、例えば、高密度な回路形成を行う場合には、3μ
m〜20μmが好ましい。
A copper conductive path (6) is formed on a ceramic substrate (1) obtained by coating the conductor (2) with a nickel layer (5). The formation of the conductive path (6) is not particularly limited, and a known electroless copper plating method or high-speed sputtering method can be used. For example, when the conductive path (6) formed by electroless copper plating is used, Pd or the like is nucleated in a pretreatment, and the ceramic substrate (1) is immersed in an electroless copper plating bath to coat a copper film. The conductive path (6) can be formed by subjecting the copper coating to etching treatment using, for example, the photolinography technique. The conductive path (6) has a thickness of, for example, 3 μm when a high-density circuit is formed.
m to 20 μm is preferable.

【0014】[0014]

【実施例】実施例1 セラミック基板(1)としてアルミナ基板を用い、30
0℃のリン酸に4分間浸漬し上記セラミック基板(1)
の表面を粗面化した。この粗面化したセラミック基板
(1)の表面に、AgとPdを成分としてガラスペース
ト中に分散した導体ペーストをスクリーン印刷後、焼き
付けして導体(2)を形成した。次に、酸化ルテニウム
系抵抗体用ペーストをスクリーン印刷し、850℃で焼
成し抵抗体(3)を形成した。そして耐薬品性が良好な
ガラスペーストをスクリーン印刷し、700℃で焼成し
保護ガラス(4)を抵抗体(3)に被覆した。次に、1
0vol%の塩酸で導体(2)を洗浄し活性化した後、
無電解ニッケルメッキ液に浸漬し、厚さ3μmのニッケ
ル層(5)を露出している導体(2)に被覆した。その
後、無電解銅メッキの前処理として、センシタイジング
アクチベーション法によりセラミック配線板(1)にP
dの核付けを行い、無電解銅メッキ浴に浸漬し、厚さ1
0μmの銅被膜で被覆し、エッチング処理を施すことに
より、上記銅被膜に導電路(6)を形成し、セラミック
配線板を得た。
EXAMPLES Example 1 An alumina substrate was used as the ceramic substrate (1), and
The above ceramic substrate (1) after being immersed in phosphoric acid at 0 ° C for 4 minutes
The surface of was roughened. On the surface of the roughened ceramic substrate (1), a conductor paste in which Ag and Pd as components were dispersed in a glass paste was screen-printed and then baked to form a conductor (2). Next, a ruthenium oxide-based resistor paste was screen-printed and baked at 850 ° C. to form a resistor (3). Then, a glass paste having good chemical resistance was screen-printed and baked at 700 ° C. to cover the protective glass (4) on the resistor (3). Then 1
After washing and activating the conductor (2) with 0 vol% hydrochloric acid,
It was dipped in an electroless nickel plating solution to coat the exposed conductor (2) with a nickel layer (5) having a thickness of 3 μm. Then, as a pretreatment for electroless copper plating, P is applied to the ceramic wiring board (1) by the sensitizing activation method.
n is dipped and immersed in an electroless copper plating bath to a thickness of 1
A ceramic wiring board was obtained by forming a conductive path (6) on the copper film by covering with a 0 μm copper film and performing an etching treatment.

【0015】実施例2 セラミック基板(1)としてアルミナ基板を用いた。粗
面化処理は行わずに、実施例1と同様にして、導体
(2)、抵抗体(3)、保護ガラス(4)を形成した。
次に、IPCアクセラ(商標、奥野製薬株式会社製)に
浸漬して露出している導体(2)を活性化した後、無電
解ニッケルメッキ液に浸漬し、厚さ2μmのニッケル層
(5)を露出している導体(2)に被覆した。その後、
メタルマスクで非導電路をマスクし、高速スパッタリン
グにより導電路(6)を形成し、セラミック配線板を得
た。
Example 2 An alumina substrate was used as the ceramic substrate (1). The conductor (2), the resistor (3) and the protective glass (4) were formed in the same manner as in Example 1 without performing the roughening treatment.
Next, the exposed conductor (2) is activated by immersing it in IPC Axela (trademark, manufactured by Okuno Chemical Industries Co., Ltd.), and then immersing in an electroless nickel plating solution to form a nickel layer (5) having a thickness of 2 μm. Was coated on the exposed conductor (2). afterwards,
The non-conductive path was masked with a metal mask, and the conductive path (6) was formed by high-speed sputtering to obtain a ceramic wiring board.

【0016】比較例1 セラミック基板としてアルミナ基板を用い、実施例1と
同様にして、粗面化処理を行い、導体、抵抗体、保護ガ
ラスを形成した。次に、実施例1と同様にして無電解銅
メッキとエッチングにより導電路を形成した。
Comparative Example 1 Using an alumina substrate as a ceramic substrate, roughening treatment was performed in the same manner as in Example 1 to form a conductor, a resistor and a protective glass. Next, in the same manner as in Example 1, electroconductive paths were formed by electroless copper plating and etching.

【0017】実施例1、2及び比較例1のセラミック配
線板の接着性を評価した。接着性の試験は、上記セラミ
ック配線板を700℃、10分加熱処理を行った後、導
体(2)上の導電路(6)にテープを貼り、このテープ
を引き剥がし導電路(6)の剥離の有無で測定した。各
100個の試験片を測定した結果は、表1のとおり実施
例1は0個、実施例2は1個であっったが、比較例1は
23個も剥離した。
The adhesiveness of the ceramic wiring boards of Examples 1 and 2 and Comparative Example 1 was evaluated. The adhesion test was conducted by heating the above-mentioned ceramic wiring board at 700 ° C. for 10 minutes, applying a tape to the conductive path (6) on the conductor (2), and peeling off the tape to remove the conductive path (6). It was measured with and without peeling. As shown in Table 1, the results of measuring 100 test pieces were 0 in Example 1 and 1 in Example 2, but 23 in Comparative Example 1 were peeled.

【0018】[0018]

【表1】 [Table 1]

【0019】[0019]

【発明の効果】本発明のセラミック配線板により、高温
に加熱しても導体(2)と導電路(6)の接着性が低下
することがなく、導体(2)と導電路(6)の接続信頼
性が良好である。
According to the ceramic wiring board of the present invention, the adhesiveness between the conductor (2) and the conductive path (6) does not deteriorate even when heated to a high temperature, and the conductor (2) and the conductive path (6) do not deteriorate. Good connection reliability.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係るセラミック配線板の一実施例を示
す断面図である。
FIG. 1 is a sectional view showing an embodiment of a ceramic wiring board according to the present invention.

【符号の説明】[Explanation of symbols]

1 セラミック基板 2 導体 3 抵抗体 4 保護ガラス 5 ニッケル層 6 導電路 1 Ceramic Substrate 2 Conductor 3 Resistor 4 Protective Glass 5 Nickel Layer 6 Conductive Path

───────────────────────────────────────────────────── フロントページの続き (72)発明者 盛岡 一信 大阪府門真市大字門真1048番地松下電工株 式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kazunobu Morioka 1048 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Works Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 セラミック基板(1)の表面に、銀を含
む導体ペーストから成る導体(2)を有し、この導体
(2)に接する、銅の導電路(6)と抵抗体(3)が形
成されているセラミック配線板において、上記導体
(2)と上記導電路(6)に挟まれたニッケル層(5)
が形成されていることを特徴とするセラミック配線板。
1. A ceramic substrate (1) has a conductor (2) made of a conductor paste containing silver on the surface thereof, and a copper conductive path (6) and a resistor (3) in contact with the conductor (2). In a ceramic wiring board in which is formed a nickel layer (5) sandwiched between the conductor (2) and the conductive path (6).
A ceramic wiring board characterized by being formed.
JP32451292A 1992-12-03 1992-12-03 Ceramic wiring board Pending JPH06177499A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32451292A JPH06177499A (en) 1992-12-03 1992-12-03 Ceramic wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32451292A JPH06177499A (en) 1992-12-03 1992-12-03 Ceramic wiring board

Publications (1)

Publication Number Publication Date
JPH06177499A true JPH06177499A (en) 1994-06-24

Family

ID=18166634

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32451292A Pending JPH06177499A (en) 1992-12-03 1992-12-03 Ceramic wiring board

Country Status (1)

Country Link
JP (1) JPH06177499A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006128228A (en) * 2004-10-26 2006-05-18 Seiko Epson Corp Forming method of conductive film, wiring board, electronic device, and electronic equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006128228A (en) * 2004-10-26 2006-05-18 Seiko Epson Corp Forming method of conductive film, wiring board, electronic device, and electronic equipment

Similar Documents

Publication Publication Date Title
KR900003152B1 (en) Method for forming capacitive circuit on circuit board
JPH06177499A (en) Ceramic wiring board
JPS61185995A (en) Making of circuit board with resistor
JPH06169173A (en) Method for manufacturing aluminum nitride substrate
JPH0774445A (en) Thick film conductor and manufacture thereof
US5794327A (en) Method for making copper electrical connections
JPH01173778A (en) Manufacture of printed wiring board with resistor
JP2002280699A (en) Resistor forming method on printed wiring board
US4898805A (en) Method for fabricating hybrid integrated circuit
JPH0754770B2 (en) Manufacturing method of ceramic wiring board
JPH03175690A (en) Ceramic printed wiring board
JP2931910B2 (en) Circuit board
JPH0216788A (en) Ceramic printed wiring board
JPS6346595B2 (en)
JPH0258893A (en) Thick film integrated circuit and its manufacture
JPH0682908B2 (en) Method for manufacturing ceramic circuit board with resistor
JPH02244692A (en) Ceramic printed wiring board
JPS6295894A (en) Formation of through hole substrate
JPH0680880B2 (en) Manufacturing method of ceramic circuit board with resistor
JPH04307797A (en) Manufacture of multilayer ceramic circuit board
JPS61121389A (en) Ceramic wiring board
JPH0682909B2 (en) Method for manufacturing ceramic circuit board with resistor
JPH01262691A (en) Manufacture of ceramic printed wiring board
JPH01303790A (en) Ceramic printed wiring board and manufacture thereof
JPH029190A (en) Manufacture of ceramic circuit board with resistor

Legal Events

Date Code Title Description
A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20000711