JPH01303790A - Ceramic printed wiring board and manufacture thereof - Google Patents

Ceramic printed wiring board and manufacture thereof

Info

Publication number
JPH01303790A
JPH01303790A JP13489988A JP13489988A JPH01303790A JP H01303790 A JPH01303790 A JP H01303790A JP 13489988 A JP13489988 A JP 13489988A JP 13489988 A JP13489988 A JP 13489988A JP H01303790 A JPH01303790 A JP H01303790A
Authority
JP
Japan
Prior art keywords
layer
thick film
film resistor
resistor layer
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13489988A
Other languages
Japanese (ja)
Inventor
Tatsu Yoneda
龍 米田
Kenichi Yokota
健市 横田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyobo Co Ltd
Original Assignee
Toyobo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyobo Co Ltd filed Critical Toyobo Co Ltd
Priority to JP13489988A priority Critical patent/JPH01303790A/en
Publication of JPH01303790A publication Critical patent/JPH01303790A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/167Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors

Abstract

PURPOSE:To improve a ceramic printed wiring board in accuracy and characteristic by a method wherein a thick film resistor layer and a conductor layer are laminated on a terminal section of a thick film resistor layer and the terminal section is roughened, and a conductor layer constituting metal is diffused into the thick film resistor layer. CONSTITUTION:A thick film resistor layer is formed on a ceramic board, which is covered with a chemical resistant protective insulating layer except the terminal section of the thick film resistor layer, the surface of the terminal section is treated to be rough and then a conductor layer is formed thereon through a wet plating method. Next, a thick film resistor layer and a conductor layer are laminated on the terminal section, and at least the laminated part is subjected to a heat treatment at a temperature of 150 to 900 deg.C. By these processes, a conductor pattern can be finely and accurately formed out of a plating metal, especially, a copper plating without deteriorating a thick film resistor in an intrinsic characteristic.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、高精度、高特性を有するセラミックプリント
配線板およびその製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a ceramic printed wiring board having high precision and high characteristics, and a method for manufacturing the same.

(従来の技術) 湿式めっき法を用いたセラミックプリント配線板および
その製造方法で、厚膜抵抗体(層)とめっき導体(層)
とを組み合わせようとする試みは、すでに提案されてい
る。例えば、厚膜焼成ペーストを用いて抵抗体層を形成
後、端子部にパラジウムを含むガラスペーストを印刷後
焼成し、感光性ポリイミド層を絶縁層かつめっきレジス
ト層として端子部を残して被覆し、無電解銅めっきによ
り導体層を形成する方法が知られている。
(Prior technology) A ceramic printed wiring board and its manufacturing method using a wet plating method, which uses a thick film resistor (layer) and a plated conductor (layer).
Attempts to combine the two have already been proposed. For example, after forming a resistor layer using a thick film firing paste, printing a glass paste containing palladium on the terminal part and then firing it, and covering the terminal part with a photosensitive polyimide layer as an insulating layer and a plating resist layer, leaving the terminal part. A method of forming a conductor layer by electroless copper plating is known.

(発明が解決しようとする課題) 湿式めっき法を用いてセラミックプリント配線板を製造
する方法を、厚膜抵抗体層、が形成されている基板に適
用しようとすれば、湿式めっきプロセスに含まれる処理
薬品により抵抗体層が侵され抵抗体の電気特性は著しく
劣化される。また湿式めっきにより導体層を形成後、抵
抗体を形成しようとすれば、例えば該抵抗体が厚膜焼成
ペーストにより形成されるときは、800°C以」−の
温度に導体層もさらされることになり、導体の諸特性を
損なってしまう。また前記例示のように抵抗体端子部に
パラジウムを含むガラス層を介在させた場合、抵抗体と
して、特に電流ノイズの増大を伴ってしまうという欠点
があった。このため抵抗体端子部に直接導体金属層を析
出させることが好ましいが、抵抗体表面は非常に平滑で
あり、たとえば熱衝撃試験などに耐え得る端子密着力を
得るのは困難であったり、他の電気特性に劣るなどの問
題点を有していた。
(Problem to be Solved by the Invention) If a method for manufacturing a ceramic printed wiring board using a wet plating method is applied to a substrate on which a thick film resistor layer is formed, there will be problems in the wet plating process. The resistor layer is attacked by the processing chemicals, and the electrical characteristics of the resistor are significantly deteriorated. Furthermore, if a resistor is to be formed after forming a conductor layer by wet plating, for example, if the resistor is formed by thick film firing paste, the conductor layer will also be exposed to temperatures of 800°C or higher. , which impairs the various properties of the conductor. Further, when a glass layer containing palladium is interposed in the terminal portion of the resistor as in the above example, there is a drawback that the resistor is accompanied by an increase in current noise. For this reason, it is preferable to deposit a conductive metal layer directly on the terminals of the resistor, but the surface of the resistor is extremely smooth, and it may be difficult to obtain terminal adhesion that can withstand thermal shock tests, etc. It had problems such as poor electrical characteristics.

(課題を解決するための手段) 本発明者らは、従来技術の問題点を解決し、高精度、高
特性を自するセラミックプリント配線板を得るべく検討
の結果本発明に到達した。すなわち本発明は、セラミッ
ク基板上に少なくとも厚膜抵抗体層と湿式めっきにより
形成された導体層とが配されてなるセラミックプリント
配線板において、厚膜抵抗体層の端子部において、該厚
膜抵抗体層と導体層とが積層され、かつ該端子部が表面
ill化されており、導体層構成金属が厚膜抵抗体層中
に拡散していることを特徴とするセラミ、ソクブプリン
ト配線板であり、またセラミ・ツク基板十、に厚膜抵抗
体層を形成後、該厚膜抵抗体層の端子部以外を耐薬品性
の保護絶縁層で被覆し、該端1部を表面粗化処理し、し
かる後湿式めっき法を用いて導体層を形成し、端子部に
おいて厚膜抵抗体層と導体層とを積層させ、少なくとも
該積層部を150°Cから900℃で熱処理することを
含む、セラミックプリント配線板の製造方法である。
(Means for Solving the Problems) The present inventors have arrived at the present invention as a result of studies aimed at solving the problems of the prior art and obtaining a ceramic printed wiring board with high precision and high characteristics. That is, the present invention provides a ceramic printed wiring board in which at least a thick film resistor layer and a conductor layer formed by wet plating are arranged on a ceramic substrate. A ceramic printed wiring board characterized in that a conductor layer and a conductor layer are laminated, the terminal portion is surface-illuminated, and the metal constituting the conductor layer is diffused into the thick film resistor layer. In addition, after forming a thick film resistor layer on a ceramic substrate, the parts other than the terminals of the thick film resistor layer are covered with a chemical-resistant protective insulating layer, and one end of the thick film resistor layer is subjected to surface roughening treatment. , then forming a conductor layer using a wet plating method, laminating a thick film resistor layer and a conductor layer in a terminal portion, and heat-treating at least the laminated portion at 150° C. to 900° C. This is a method for manufacturing a printed wiring board.

本発明におけるセラミック基板とは、アルミナ系基板、
窒化アルミニウム基板、炭化ケイ素基板、ガラス系基板
などのセラミ’7り系基板である。また前記セラミック
系基板は、そのまま使用することが出来るが、好ましく
はめつき導体の密着力を上げるために該基板表面を機械
的または化学的に表面粗化したものを使用する。
The ceramic substrate in the present invention refers to an alumina-based substrate,
These are ceramic substrates such as aluminum nitride substrates, silicon carbide substrates, and glass substrates. The ceramic substrate can be used as is, but it is preferable to use one whose surface has been mechanically or chemically roughened in order to increase the adhesion of the plated conductor.

本発明における厚膜抵抗体層は例えばR7IO2系、ル
テニウム酸パイロクロア型酸化物系、窒素焼成型L−B
e系、同酸化錫系の厚膜焼成型抵抗体ペーストをセラミ
ック基板−Lに印刷後、適当な条件下で焼成し、形成し
たものである。
The thick film resistor layer in the present invention is, for example, R7IO2 type, ruthenate pyrochlore type oxide type, nitrogen fired type L-B
It is formed by printing a thick film firing type resistor paste of E type and tin oxide type on a ceramic substrate-L and then firing it under appropriate conditions.

本発明における抵抗体の端子部以外に被覆するのに使用
する耐薬品性の保護絶縁層としては、厚膜焼成型絶縁体
ペースト、および樹脂組成物から選ばれるものである。
The chemical-resistant protective insulating layer used to cover areas other than the terminal portions of the resistor in the present invention is selected from thick-film sintered insulator pastes and resin compositions.

本発明における湿式めっきとは、銅、銀、白金、白金1
+4 、金、ルテニウム、ニッケル、コバルト等の無電
解めっきおよびまたはこれらを下部層とする電気めっき
のことである。
Wet plating in the present invention refers to copper, silver, platinum, platinum 1
+4 refers to electroless plating of gold, ruthenium, nickel, cobalt, etc., and/or electroplating using these as the lower layer.

本発明の端1<の機械的およびまたは化学的な表面粗化
とはめっき導体と厚膜抵抗体の接続部(積層部)の密着
力を−1−げ、熱?Ij雫等の信頼性試験にも1−分耐
えるにようにするためのものであり、機械的粗化とは、
例えばセラミック粉のような比較的映い微粉を抵抗体端
子部に吹き付けるなどして端1表面を物理的に粗面化す
ることをいう。
Mechanical and/or chemical surface roughening of the edge 1 of the present invention means that the adhesion between the plated conductor and the thick-film resistor (laminated portion) is reduced by 1-1, and the surface roughening is performed by heating. Mechanical roughening is intended to withstand reliability tests such as Ij Drop for 1 minute.
This refers to physically roughening the surface of the end 1 by, for example, spraying a relatively fine powder such as ceramic powder onto the terminal portion of the resistor.

化学的粗化とは、フッ素化合物、酸またはアルカリ化合
物の水溶液または溶融塩を用いて電子顕微鏡レベルの細
孔を抵抗体端子部表面に形成させる方法をいう。前記表
面m化方法はそれぞれr部1独でも良好な端子密着力を
示すが、好ましくは機械的粗化後さらに化学的1目ヒを
行うことにより、より高い端子密着力を得ることができ
る。このときの端子部の表面粗さはR1で0.05〜3
.0μmであり、好ましくは0.1〜1.0μmである
Chemical roughening refers to a method of forming pores on the surface of the terminal portion of the resistor using an aqueous solution or molten salt of a fluorine compound, an acid or an alkali compound. Although each of the above-mentioned surface roughening methods shows good terminal adhesion even in the r portion, higher terminal adhesion can be obtained by further performing chemical roughening after mechanical roughening. At this time, the surface roughness of the terminal part is 0.05 to 3 in R1.
.. 0 μm, preferably 0.1 to 1.0 μm.

本発明における端子部で接合されている導体層と厚膜抵
抗体層との間で、導体層の金属が厚膜抵抗体層中に拡散
していることは、1亥接続部でのノイズ発生源、バリヤ
ー層としての二層構造が解消されるため理想的な端子構
造となると考えられ、かかる構成となるためには、少な
くとも該接合部(積層部)を加熱処理すること等が必認
となる。
In the present invention, between the conductor layer and the thick film resistor layer that are joined at the terminal part, the metal of the conductor layer is diffused into the thick film resistor layer, which causes noise generation at the connection part. Since the two-layer structure as a source and barrier layer is eliminated, it is thought that an ideal terminal structure will be obtained, and in order to achieve such a structure, it is necessary to heat-treat at least the joint part (laminated part). Become.

本発明における加熱処理は、抵抗体I〕に導体を形成し
た後のいずれの段階でもよい。加熱条件は温度で150
°C以−L 900″C以ド、好ましくは200℃以−
L600°C以Fであり、時間で1分量15時間以下、
好ましくは5分取1−2時間以下である。加熱処理雰囲
気としては、特に限定されなく、空気中、不活性雰囲気
中、還元雰囲気中等がある。
The heat treatment in the present invention may be performed at any stage after forming the conductor on the resistor I]. Heating conditions are temperature 150
°C or higher - L 900"C or higher, preferably 200"C or higher
L: 600°C or higher, 1 portion per hour: 15 hours or less,
Preferably, the time required for 5 fractions is 1-2 hours or less. The heat treatment atmosphere is not particularly limited, and includes air, an inert atmosphere, a reducing atmosphere, and the like.

本発明品を得る方法としては、セラミック基板!−に厚
膜抵抗体層を形成(イ)、該抵抗体層の端子部以外を耐
i!Ii!式めっき酸性の保護絶縁層で被覆(0)、該
端子部を表面llj化(ハ)、湿式めっきで導体層を形
成(ニ)、端子部で積層された抵抗体層と導体層とを1
50°Cから900℃で熱処理(ネ)の順であることが
好ましいが、(ロ)と(ハ)の順を逆にする等してもよ
い。
Ceramic substrate is the method for obtaining the product of the present invention! - A thick film resistor layer is formed on (a), and the resistor layer other than the terminal portion is resistant to i! Ii! Coating with an acidic protective insulating layer (0), coating the terminal part with an acidic protective insulating layer (c), forming a conductor layer by wet plating (d), and coating the laminated resistor layer and conductor layer at the terminal part (1).
The order of heat treatment at 50° C. to 900° C. is preferable ((e)), but the order of (b) and (c) may be reversed.

(実施例および比較例) *(比較例1) アルミナを96%含自°する縦50.8..1横50.
8m−1厚さ0.835−=1の白色セラミック基板を
340°Cに保持された溶融苛性ソーダに、10分間浸
漬し基板表面を適度に粗化した。次に、llj 、id
ネ11化されたセラミック基板に厚膜、焼成型抵抗体ペ
ースト#6829 (シート抵抗:lKΩ/口)[1)
upon t  J apan  LTI)、コをスク
リーン印刷法により所望パターン状に塗布−し、850
℃で、10分間(トータル35分間)空気中焼成して抵
抗体層を形成した。この抵抗体層14に#9137[D
upont  Jal)anLT+)、1抵抗体保護用
厚膜焼成型ガラスペーストを抵抗体端子部を残し、抵抗
体表面および壁面をカバーするようにスクリーン印刷法
により塗布し、550℃で、2分間(トータル20分間
)空気中焼成した。抵抗体層の焼成後形杖は、幅1.0
mm長さ1.5mm、厚さ10μm、ガラス絶縁層の焼
成後形状は、幅1.Ol園、長さ1.5m糟、厚さ10
μmであり、抵抗体層と1・字型を成し、抵抗体端子部
として抵抗体層の両端250μm1】がガラス絶縁層に
覆われていないものである。
(Examples and Comparative Examples) *(Comparative Example 1) A vertical 50.8 mm containing 96% alumina. .. 1 side 50.
A white ceramic substrate having a thickness of 8 m −1 and a thickness of 0.835 −=1 was immersed in molten caustic soda maintained at 340° C. for 10 minutes to appropriately roughen the substrate surface. Then, llj, id
Thick film, fired resistor paste #6829 (sheet resistance: lKΩ/mouth) [1]
(Japan LTI) was coated in a desired pattern using a screen printing method, and 850
C. for 10 minutes (total 35 minutes) in air to form a resistor layer. #9137[D
(upont Jal)anLT+), 1. Apply a thick-film sintered glass paste for resistor protection by screen printing to cover the resistor surface and wall, leaving only the resistor terminals, and heat at 550°C for 2 minutes (total 20 minutes) in air. The width of the resistor layer after firing is 1.0
mm length 1.5 mm, thickness 10 μm, and the shape of the glass insulating layer after firing is width 1.5 mm. Olen, length 1.5m, thickness 10
μm, forming a 1-shape with the resistor layer, and 250 μm1] at both ends of the resistor layer serving as the resistor terminal portion are not covered with a glass insulating layer.

1°、記、抵抗体層および保護絶縁層形成後の基板に、
セミアデイティブ法により抵抗体端子部に小なるように
めっき導体回路パターンを形成した。
1°, on the substrate after forming the resistor layer and protective insulating layer,
A small plating conductor circuit pattern was formed on the terminal portion of the resistor by a semi-additive method.

1体的には、まず、基板全面を、無電解鋼めっきで被覆
した。無電解鋼めっきは、PTHプロセス4[5hil
)leV  Far  Eastコにより、1.0μm
の1!!(電解銅めっき皮膜を得た。無電解鋼めっき後
、この基板を窒素雰囲気下400℃で、10分間の加熱
処理を行った。さらに、感光性ドライフィルムを用いて
ネガ型のメツキレジストを回路パターン状に形成し、電
気銅めっきを約1.0μm析出させた。電気銅めっき後
、レジストを211離、薄付けの;爪電解鋼めっき部分
を、0.1MH2O210,1MH2SO4のエツチン
グ液で除去した。
Specifically, first, the entire surface of the substrate was coated with electroless steel plating. Electroless steel plating is PTH process 4[5hil
) leV Far East Co., 1.0μm
No. 1! ! (An electrolytic copper plating film was obtained. After electroless steel plating, this substrate was heat-treated at 400°C for 10 minutes in a nitrogen atmosphere. Furthermore, a negative plating resist was applied to the circuit using a photosensitive dry film. A pattern was formed, and electrolytic copper plating was deposited to a thickness of about 1.0 μm. After the electrolytic copper plating, the resist was separated by 211 cm, and the thin electrolytic steel plated portion was removed with an etching solution of 0.1 MH2O210, 1MH2SO4. .

電気特性は、シート抵抗値、電流雑音、抵抗温度係数を
測定した。初期の電気特性と熱衝撃試験(−55°Cの
トリクレンに5分間浸i:j−+室/!111O秒間放
置→+125°Cのシリコーンオイルに5分間iA i
t’t→室温lO秒間放置を1サイクルとする熱衝°7
試験)25サイクル後の電気特性値を表1に示した。
For electrical properties, sheet resistance, current noise, and temperature coefficient of resistance were measured. Initial electrical properties and thermal shock test (immersed in -55°C trichloride for 5 minutes i:j-+ chamber/!111O seconds → soaked in +125°C silicone oil for 5 minutes iA i
t't→Heat shock with one cycle of leaving for 10 seconds at room temperature °7
Test) The electrical characteristic values after 25 cycles are shown in Table 1.

(比較例■) 比較例Iに示したと同一の方法で、表面粗化した白色セ
ラミック基板にガラス絶縁層で保護された厚膜抵抗体を
形成した。この基板全面に、500 m e s h 
a−アルミナ粉を圧力1 kg / cyaで、0.5
杼間吹きつけて機械的llj化を行ない、さらに50°
Cの4MNaOH水溶液に30分間浸漬し、純水中で超
音波洗浄後比較例Iに示したと同一の方法でめっき導体
回路パターンを形成した。初期の電気特性と熱衝撃試験
25サイクル後電気特性の結果を表1に示した。
(Comparative Example ■) By the same method as shown in Comparative Example I, a thick film resistor protected by a glass insulating layer was formed on a white ceramic substrate with a roughened surface. 500 m e s h over the entire surface of this board
a-Alumina powder at a pressure of 1 kg/cya, 0.5
Spray on the shuttle to perform mechanical lljing, and further 50°
After immersion in a 4M NaOH aqueous solution of C for 30 minutes and ultrasonic cleaning in pure water, a plated conductor circuit pattern was formed in the same manner as in Comparative Example I. Table 1 shows the results of the initial electrical properties and the electrical properties after 25 cycles of the thermal shock test.

*(実施例I) 比較例Iに示したと同一の方法で、表面粗化した白色セ
ラミック基板にガラス絶縁層で保護された厚膜抵抗体を
形成した。この基板を50℃の4MNaOH水溶液に3
0分間浸漬し、純水中で超?″I彼洗浄後比較例Iに示
したと同一・の方法でめっき導体回路パターンを形成し
た。めっき導体回路形成1−程中、1!;(電解銅めっ
き後、窒素雰囲気中で400°C110分間加熱処理を
行った。初期の電気特性と熱衝撃試験25サイクル後の
電気特性結果を表1に示した。
*(Example I) By the same method as shown in Comparative Example I, a thick film resistor protected by a glass insulating layer was formed on a white ceramic substrate with a roughened surface. This substrate was placed in a 4M NaOH aqueous solution at 50°C for 3
Soak for 0 minutes and soak in pure water? After cleaning, a plated conductor circuit pattern was formed by the same method as shown in Comparative Example I. During the process 1 of forming a plated conductor circuit, 1! (After electrolytic copper plating, at 400°C for 110 minutes in a nitrogen atmosphere. The initial electrical properties and the electrical properties after 25 cycles of the thermal shock test are shown in Table 1.

*(実施例■) 比較例■に示したと同一の方法で、表面11化した白色
セラミック基板にガラス絶縁層で保護された抵抗体を形
成した。この基板全面に、500meshα−アルミナ
粉を圧力1 kg / Craで、0.5秒間状きつけ
て機械的粗化を行ない、純水中で超音波洗浄後、比較例
Iに示したと同一の方法でめっき導体回路パターンを形
成した。めっき導体回路形成工程中、無電解銅めっき後
、窒素雰囲気中で400℃、10分間加熱処理を行った
*(Example ■) A resistor protected by a glass insulating layer was formed on a white ceramic substrate with a 11-surface layer by the same method as shown in Comparative Example ■. Mechanical roughening was performed by applying 500 mesh α-alumina powder to the entire surface of the substrate at a pressure of 1 kg/Cra for 0.5 seconds, and after ultrasonic cleaning in pure water, the same method as shown in Comparative Example I was performed. A plated conductor circuit pattern was formed. During the process of forming a plated conductor circuit, heat treatment was performed at 400° C. for 10 minutes in a nitrogen atmosphere after electroless copper plating.

初期の電気特性と熱衝撃試験25サイクル後の電気特性
の結果を表1に示した。
Table 1 shows the results of the initial electrical properties and the electrical properties after 25 cycles of the thermal shock test.

(実施例■) 比較例Iに示したと同一の方法で、表面粗化した白色セ
ラミック基板にガラス絶縁層で保護された抵抗体を形成
した。この基板全面に、500meshα−アルミナ粉
を圧力1 kg / CIJで、0.5秒間状きつけて
機械的m化を行ない、さとに50℃の4MNaOH水溶
液に30分間浸漬し、純水中で超S′7波洗浄後、比較
例Iに示したと同一の方法でめっき導体回路パターンを
形成した。めっき導体回路形成り程中、力!(電解鋼め
っき後、窒素雰囲気中で400℃、10分間加熱処理を
行った。初期の電気特性と熱?jjfP試験25サイク
ル後の電気特性の結果を表1に示した。
(Example ■) In the same manner as shown in Comparative Example I, a resistor protected by a glass insulating layer was formed on a white ceramic substrate with a roughened surface. 500mesh α-alumina powder was applied on the entire surface of the substrate at a pressure of 1 kg/CIJ for 0.5 seconds to perform mechanical molarization, and the substrate was immersed in a 4M NaOH aqueous solution at 50°C for 30 minutes, and super-sintered in pure water. After 7-wave cleaning, a plated conductor circuit pattern was formed in the same manner as in Comparative Example I. During the plating conductor circuit formation process, power! (After electrolytic steel plating, heat treatment was performed at 400° C. for 10 minutes in a nitrogen atmosphere. Table 1 shows the initial electrical properties and the results of the electrical properties after 25 cycles of the thermal?jjfP test.

以  ド  余  白 表1 比較例と実施例の測定値は n = 20の平均値(発
明の効果) 本発明の実施により、厚膜抵抗体の本来の特性をそこな
うことなく、導体パターンをめっき導体、特に銅めっき
で微細かつ高精度に形成できることは、セラミック・プ
リント配線板の高精度化、高特性化に極めて有益である
Table 1 Measured values of comparative examples and examples are average values of n = 20 (Effect of the invention) By implementing the present invention, the conductor pattern can be made into a plated conductor without damaging the original characteristics of the thick film resistor. In particular, the ability to form finely and precisely with copper plating is extremely useful for improving the precision and characteristics of ceramic printed wiring boards.

Claims (2)

【特許請求の範囲】[Claims] (1)セラミック基板上に少なくとも厚膜抵抗体層と湿
式めっきにより形成された導体層とが配されてなるセラ
ミックプリント配線板において、厚膜抵抗体層の端子部
において該厚膜抵抗体層と導体層とが積層され、かつ該
端子部が表面粗化されており、導体層構成金属が厚膜抵
抗体層中に拡散していることを特徴とするセラミックプ
リント配線板。
(1) In a ceramic printed wiring board in which at least a thick film resistor layer and a conductor layer formed by wet plating are arranged on a ceramic substrate, the thick film resistor layer is connected to the terminal portion of the thick film resistor layer. 1. A ceramic printed wiring board comprising: a conductor layer laminated thereon; the terminal portion thereof having a roughened surface; and a metal constituting the conductor layer being diffused into a thick film resistor layer.
(2)セラミック基板上に厚膜抵抗体層を形成後、該厚
膜抵抗体層の端子部以外を耐薬品性の保護絶縁層で被覆
し、該端子部を表面粗化処理し、しかる後湿式めっき法
を用いて導体層を形成し端子部において厚膜抵抗体層と
導体層とを積層させ、少なくとも該積層部を150℃か
ら900℃で熱処理することを含むセラミックプリント
配線板の製造方法。
(2) After forming a thick-film resistor layer on a ceramic substrate, cover the thick-film resistor layer other than the terminal portion with a chemical-resistant protective insulating layer, subject the terminal portion to surface roughening treatment, and then A method for manufacturing a ceramic printed wiring board, comprising forming a conductor layer using a wet plating method, laminating a thick film resistor layer and a conductor layer in a terminal portion, and heat-treating at least the laminated portion at 150°C to 900°C. .
JP13489988A 1988-06-01 1988-06-01 Ceramic printed wiring board and manufacture thereof Pending JPH01303790A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13489988A JPH01303790A (en) 1988-06-01 1988-06-01 Ceramic printed wiring board and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13489988A JPH01303790A (en) 1988-06-01 1988-06-01 Ceramic printed wiring board and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH01303790A true JPH01303790A (en) 1989-12-07

Family

ID=15139125

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13489988A Pending JPH01303790A (en) 1988-06-01 1988-06-01 Ceramic printed wiring board and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH01303790A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111465187A (en) * 2020-05-19 2020-07-28 青岛零频新材料科技有限公司 Copper-clad plate containing resistance layer, printed circuit board and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111465187A (en) * 2020-05-19 2020-07-28 青岛零频新材料科技有限公司 Copper-clad plate containing resistance layer, printed circuit board and manufacturing method thereof

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