JPH03156992A - Manufacture of ceramic printed wiring board - Google Patents
Manufacture of ceramic printed wiring boardInfo
- Publication number
- JPH03156992A JPH03156992A JP29659689A JP29659689A JPH03156992A JP H03156992 A JPH03156992 A JP H03156992A JP 29659689 A JP29659689 A JP 29659689A JP 29659689 A JP29659689 A JP 29659689A JP H03156992 A JPH03156992 A JP H03156992A
- Authority
- JP
- Japan
- Prior art keywords
- thick
- film
- layer
- plating
- thick film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 title claims abstract description 29
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 239000004020 conductor Substances 0.000 claims abstract description 56
- 238000007747 plating Methods 0.000 claims abstract description 38
- 239000000758 substrate Substances 0.000 claims abstract description 37
- 239000007864 aqueous solution Substances 0.000 claims abstract description 18
- 238000007772 electroless plating Methods 0.000 claims abstract description 16
- 150000002941 palladium compounds Chemical class 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 26
- 239000012670 alkaline solution Substances 0.000 claims 1
- 239000012212 insulator Substances 0.000 abstract description 18
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 abstract description 7
- 239000000126 substance Substances 0.000 abstract description 5
- 238000007788 roughening Methods 0.000 abstract description 4
- 235000011121 sodium hydroxide Nutrition 0.000 abstract description 2
- 230000015572 biosynthetic process Effects 0.000 abstract 4
- 239000010408 film Substances 0.000 description 81
- 239000010410 layer Substances 0.000 description 72
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 23
- 229910052802 copper Inorganic materials 0.000 description 23
- 239000010949 copper Substances 0.000 description 23
- 239000000243 solution Substances 0.000 description 14
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 12
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 10
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 9
- 238000010304 firing Methods 0.000 description 9
- 230000000052 comparative effect Effects 0.000 description 6
- -1 halogen ions Chemical class 0.000 description 6
- 230000002378 acidificating effect Effects 0.000 description 5
- 230000003213 activating effect Effects 0.000 description 5
- 150000001875 compounds Chemical class 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 239000011521 glass Substances 0.000 description 5
- 229910052759 nickel Inorganic materials 0.000 description 5
- 238000007650 screen-printing Methods 0.000 description 5
- 239000000654 additive Substances 0.000 description 4
- 239000003638 chemical reducing agent Substances 0.000 description 4
- 238000009713 electroplating Methods 0.000 description 4
- 238000005406 washing Methods 0.000 description 4
- 229910004039 HBF4 Inorganic materials 0.000 description 3
- 101100028920 Neurospora crassa (strain ATCC 24698 / 74-OR23-1A / CBS 708.71 / DSM 1257 / FGSC 987) cfp gene Proteins 0.000 description 3
- 230000004913 activation Effects 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 238000001179 sorption measurement Methods 0.000 description 3
- HZAXFHJVJLSVMW-UHFFFAOYSA-N 2-Aminoethan-1-ol Chemical compound NCCO HZAXFHJVJLSVMW-UHFFFAOYSA-N 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- 238000011156 evaluation Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 150000002366 halogen compounds Chemical class 0.000 description 2
- 238000007654 immersion Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- XULSCZPZVQIMFM-IPZQJPLYSA-N odevixibat Chemical compound C12=CC(SC)=C(OCC(=O)N[C@@H](C(=O)N[C@@H](CC)C(O)=O)C=3C=CC(O)=CC=3)C=C2S(=O)(=O)NC(CCCC)(CCCC)CN1C1=CC=CC=C1 XULSCZPZVQIMFM-IPZQJPLYSA-N 0.000 description 2
- PIBWKRNGBLPSSY-UHFFFAOYSA-L palladium(II) chloride Chemical compound Cl[Pd]Cl PIBWKRNGBLPSSY-UHFFFAOYSA-L 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 235000011149 sulphuric acid Nutrition 0.000 description 2
- QIVUCLWGARAQIO-OLIXTKCUSA-N (3s)-n-[(3s,5s,6r)-6-methyl-2-oxo-1-(2,2,2-trifluoroethyl)-5-(2,3,6-trifluorophenyl)piperidin-3-yl]-2-oxospiro[1h-pyrrolo[2,3-b]pyridine-3,6'-5,7-dihydrocyclopenta[b]pyridine]-3'-carboxamide Chemical compound C1([C@H]2[C@H](N(C(=O)[C@@H](NC(=O)C=3C=C4C[C@]5(CC4=NC=3)C3=CC=CN=C3NC5=O)C2)CC(F)(F)F)C)=C(F)C=CC(F)=C1F QIVUCLWGARAQIO-OLIXTKCUSA-N 0.000 description 1
- ROFVEXUMMXZLPA-UHFFFAOYSA-N Bipyridyl Chemical group N1=CC=CC=C1C1=CC=CC=N1 ROFVEXUMMXZLPA-UHFFFAOYSA-N 0.000 description 1
- KCXVZYZYPLLWCC-UHFFFAOYSA-N EDTA Chemical compound OC(=O)CN(CC(O)=O)CCN(CC(O)=O)CC(O)=O KCXVZYZYPLLWCC-UHFFFAOYSA-N 0.000 description 1
- 229910002666 PdCl2 Inorganic materials 0.000 description 1
- 229920003171 Poly (ethylene oxide) Polymers 0.000 description 1
- ZLMJMSJWJFRBEC-UHFFFAOYSA-N Potassium Chemical compound [K] ZLMJMSJWJFRBEC-UHFFFAOYSA-N 0.000 description 1
- 229910001361 White metal Inorganic materials 0.000 description 1
- 239000003929 acidic solution Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 150000003973 alkyl amines Chemical class 0.000 description 1
- 235000013405 beer Nutrition 0.000 description 1
- 239000003054 catalyst Substances 0.000 description 1
- 239000000084 colloidal system Substances 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- RTZKZFJDLAIYFH-UHFFFAOYSA-N ether Substances CCOCC RTZKZFJDLAIYFH-UHFFFAOYSA-N 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052575 non-oxide ceramic Inorganic materials 0.000 description 1
- 239000011225 non-oxide ceramic Substances 0.000 description 1
- 239000011224 oxide ceramic Substances 0.000 description 1
- 229910052574 oxide ceramic Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052700 potassium Inorganic materials 0.000 description 1
- 239000011591 potassium Substances 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 230000001235 sensitizing effect Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- HPGGPRDJHPYFRM-UHFFFAOYSA-J tin(iv) chloride Chemical compound Cl[Sn](Cl)(Cl)Cl HPGGPRDJHPYFRM-UHFFFAOYSA-J 0.000 description 1
- 239000010969 white metal Substances 0.000 description 1
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明はセラミックプリント配線板の製造方法に関し、
詳しくは少なくとも厚膜抵抗体層とめっきにより形成さ
れた導体パターンとを設けたセラミックプリント配線板
の製造方法に関するものである。[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a method of manufacturing a ceramic printed wiring board,
Specifically, the present invention relates to a method of manufacturing a ceramic printed wiring board provided with at least a thick film resistor layer and a conductor pattern formed by plating.
(従来の技術)
あらかじめ粗面化されたセラミック基板上に無電解めっ
きを施すことは、すでに「特開昭60−18885公報
」等に開示されている。またセラミック基板上に厚膜抵
抗体層と厚膜導体層とを形成した後、無電解めっきまた
は電気めっきを施し所望の方法で薄膜導体パターンを形
成したセラミックプリント配線板についても「特公昭5
321109号公報」、「特開昭E33−202987
号公報」等に開示されている。前記のセラミックプリン
ト配線板において、セラミック基板上に無電解めっきを
施す方法としては、あらかじめハロゲンイオンを含むp
H1〜3のパラジウムコロイド酸性溶液中に前記基板を
浸漬し、活性化する方法や、塩化スズ水溶液で感受性化
した後、塩化パラジウム水溶液により活性化する方法が
とられている。(Prior Art) Electroless plating on a ceramic substrate whose surface has been roughened in advance has already been disclosed in ``Japanese Unexamined Patent Publication No. 18885/1985''. Furthermore, a ceramic printed wiring board in which a thick film resistor layer and a thick film conductor layer are formed on a ceramic substrate and then subjected to electroless plating or electroplating to form a thin film conductor pattern by a desired method is also referred to as "Tokyo Publication No. 5".
321109 Publication”, “Japanese Unexamined Patent Publication No. 33-202987
It is disclosed in "No. Publication" etc. In the above-mentioned ceramic printed wiring board, the method of performing electroless plating on the ceramic substrate is to use P containing halogen ions in advance.
A method of immersing the substrate in an acidic palladium colloid solution of H1 to H3 and activating it, or a method of sensitizing it with an aqueous tin chloride solution and then activating it with an aqueous palladium chloride solution are used.
(発明が解決しようとする課題)
前記「特公昭53−21109号公報」や「特開昭E3
3−202987号公報」等のように、セラミック基板
上に厚膜抵抗体層、該厚膜抵抗体層とめっき導体間に介
在せしめる厚膜導体層を形成し、両層をめっき液から保
護するための保護層を両層に施して後無電解めっきを施
すにあたり酸性溶液を用いて活性化した場合、先に形成
された厚膜導体層中のガラス質成分が侵食され、該厚膜
導体層と基板間の密着強度が著しく低下してしまう問題
がある。(Problem to be solved by the invention)
3-202987, a thick film resistor layer and a thick film conductor layer interposed between the thick film resistor layer and the plated conductor are formed on a ceramic substrate, and both layers are protected from the plating solution. If a protective layer is applied to both layers and then activated using an acidic solution when performing electroless plating, the glassy component in the previously formed thick film conductor layer is eroded and the thick film conductor layer is There is a problem in that the adhesion strength between the substrate and the substrate is significantly reduced.
(課題を解決するための手段)
本発明は、少なくとも厚膜抵抗体層が形成されたセラミ
ック基板上に、めっきで導体パターンを形成するにあた
り、前記基板を無電解めっきの前処理として少なくとも
アルカリ性水溶液にて処理することを特徴とするセラミ
ックプリント配線板の製造方法が、高精度、高特性を有
し、かつ厚膜抵抗体とめっき導体の接続部において高信
頼性を有するセラミックプリン配線板の製造方法である
ことを見いだした。すなわち本発明は、セラミック基板
上に少なくとも厚膜抵抗体層とめっきにより形成された
導体パターンとを設けたセラミックプリント配線板を製
造するに際し、無電解めっきの前処理として、セラミッ
ク基板をパラジウム化合物を含むアルカリ性水溶液にて
処理することを特徴とするセラミックプリント配線板の
製造方法である。本発明に用いるセラミック基板とは、
必要に応じて穴をあけたものであり、酸化物系、非酸化
物系のいずれのセラミック基板でもよいが、酸化物系で
は、アルミナ、ガラス系、非酸化物系では窒化アルミニ
ウム、炭化硅素が好ましい。(Means for Solving the Problems) When forming a conductor pattern by plating on a ceramic substrate on which at least a thick film resistor layer is formed, the present invention provides at least an alkaline aqueous solution as a pretreatment for electroless plating. A method for manufacturing a ceramic printed wiring board characterized in that the manufacturing method of the ceramic printed wiring board is characterized in that the manufacturing method of the ceramic printed wiring board is characterized by processing in I found out that there is a way. That is, in manufacturing a ceramic printed wiring board in which at least a thick film resistor layer and a conductor pattern formed by plating are provided on a ceramic substrate, the ceramic substrate is treated with a palladium compound as a pretreatment for electroless plating. This is a method for manufacturing a ceramic printed wiring board, characterized in that it is treated with an alkaline aqueous solution containing: The ceramic substrate used in the present invention is
Holes are drilled as necessary, and either oxide or non-oxide ceramic substrates may be used. Oxide-based ceramic substrates are made of alumina, glass-based materials are made of aluminum nitride, silicon carbide, etc. preferable.
また本発明においては、セラミック基板は、そのままで
用いてもよいが、好ましくは、あらかじめ物理的または
化学的な粗面化処理を施した方がよい。物理的粗化の例
としては、アルミナ等の粉末と基板面に吹きつける方法
、化学的粗化の例としては、公知の酸またはアルカリ等
による薬液による方法が挙げられる。Further, in the present invention, the ceramic substrate may be used as it is, but preferably it is subjected to a physical or chemical surface roughening treatment in advance. An example of physical roughening is a method in which powder such as alumina is sprayed onto the substrate surface, and an example of chemical roughening is a method using a known chemical solution such as acid or alkali.
基板上に形成された厚膜抵抗体層は、めっきで直接当該
厚膜抵抗体層上に導体パターンを形成して接続すること
も実施できるが、好ましくは、厚膜抵抗体層とめっきに
よる導体パターンを、厚膜導体層を介在せしめることで
接続した方がよい。Although the thick film resistor layer formed on the substrate can be connected by directly forming a conductor pattern on the thick film resistor layer by plating, it is preferable to connect the thick film resistor layer to the conductor by plating. It is better to connect the patterns by interposing a thick film conductor layer.
また、本発明においては、厚膜抵抗体層を、環境、めっ
き液等から保護するため、該厚膜抵抗体層に絶縁体層を
形成し保護層となす方法が好ましい。前記絶縁体層は樹
脂系またはガラス糸回れでもよいが、耐薬品性を存する
ものがさらに好ましい。また導体パターンを形成するた
め、無電解めっきの前処理としては、前記基板をパラジ
ウム化合物を含むアルカリ性水溶液中に浸漬し、活性化
する。Further, in the present invention, in order to protect the thick film resistor layer from the environment, plating solution, etc., it is preferable to form an insulator layer on the thick film resistor layer to form a protective layer. The insulator layer may be made of resin or glass yarn, but it is more preferable that it has chemical resistance. Further, in order to form a conductor pattern, as a pretreatment for electroless plating, the substrate is immersed in an alkaline aqueous solution containing a palladium compound and activated.
前記パラジウム化合物としては、例えばPdel□・2
アミノヘビリジン錯体、PdC1□−分岐アルキルアミ
ン錯体などが挙げられる。本発明において、好ましくは
、前記基板を活性化する前にエトキシ化非イオン化合物
と含窒素化合物、又はエトキシル化非イオン化合物と0
.5M以上のハロゲン化合物を含む吸着促進剤に接触さ
した方がよい、吸着促進剤としては、エトキシル化非イ
オン化合物と含窒素化合物と0.5M以上のハロゲン化
合物を含んだものでもよい。As the palladium compound, for example, Pdel□・2
Examples include aminohebiridine complexes and PdC1□-branched alkylamine complexes. In the present invention, preferably, before activating the substrate, an ethoxylated nonionic compound and a nitrogen-containing compound, or an ethoxylated nonionic compound and a
.. It is preferable to contact an adsorption promoter containing a halogen compound of 5M or more.The adsorption promoter may contain an ethoxylated nonionic compound, a nitrogen-containing compound, and a halogen compound of 0.5M or more.
前記、エトキシル化非イオン化合物としては、具体例と
してポリオキシエチレンアルキルフェニルエーテルであ
り、含窒素化合物の具体例としては、エタノールアミン
がある。A specific example of the ethoxylated nonionic compound is polyoxyethylene alkylphenyl ether, and a specific example of the nitrogen-containing compound is ethanolamine.
本発明における無電解めっきとは、銅、ニッケル、金、
銀、白金属およびそれらの化合物の無電解めっきをいう
。また無電解めっき後に電気めっきを併用して導体パタ
ーンを形成することも出来るが、この場合の電気めっき
は、該無電解めっきを下部層とする、銅、ニッケル、金
等の電気めっきをいう。導体パターンの形成方法として
は、セミアデイティブ法、フルアデイティブ法またはサ
ブトラクト法があり、いずれでも実施可能である。Electroless plating in the present invention refers to copper, nickel, gold,
Refers to electroless plating of silver, white metals, and their compounds. Further, it is also possible to form a conductor pattern by using electroplating in combination after electroless plating, but in this case, electroplating refers to electroplating of copper, nickel, gold, etc. using the electroless plating as a lower layer. Methods for forming the conductive pattern include a semi-additive method, a full additive method, and a subtract method, and any of them can be used.
本発明が可能となったのは、従来の酸性前処理液にくら
べて、本発明の無電解めっき前処理液がアルカリ性であ
り、厚膜導体層中のガラス成分または厚膜導体部とアル
ミナ基板等基板との間に出来る反応層(界面層)等を侵
食せずに活性化しうることか原因と考えられる。The present invention has been made possible because the electroless plating pretreatment liquid of the present invention is alkaline compared to conventional acidic pretreatment liquids, and the glass component in the thick film conductor layer or the thick film conductor portion and the alumina substrate This is thought to be due to the fact that the reaction layer (interface layer) formed between the substrate and the like can be activated without being eroded.
(実施例)
〈実施例−1〉
5−
6一
アルミナを96%含有する縦50.8■、横50.81
n111厚さ0.635mmの白色セラミック基板を3
40°Cに保持された溶融苛性ソーダに10分間浸漬し
、基板表面を化学的に粗面化した。(Example) <Example-1> 5-6 - Containing 96% alumina, length 50.8 cm, width 50.81
3 N111 white ceramic substrates with a thickness of 0.635 mm
The substrate surface was chemically roughened by immersing it in molten caustic soda maintained at 40°C for 10 minutes.
次にガラス成分を含まない(フリットレスタイプ)厚膜
導体焼成ペーストをスクリーン印刷により所望箇所に塗
布し150℃で10分間乾燥した後900°Cで10分
間(トータル30分間)空気焼成し、厚膜導体端子層を
形成した。厚膜導体端子層の間隔はlll11としh0
次いで厚膜導体端子層の両端にそれぞれ一部重なる様に
厚膜抵抗焼成ペース)(R931ONr昭栄化学工業1
@J)t−スクリーン印刷により塗布し、150°CI
O分間乾燥し850℃で10分間(トータル35分間)
空気焼成した。さらに厚膜抵抗体層を保護するために厚
膜抵抗体層全面を被う様に厚膜絶縁体焼成ペースト(#
5238r昭栄化学工業■」)をスクリ空気焼成した。Next, a thick film conductor firing paste that does not contain glass components (fritless type) is applied to the desired location by screen printing, dried at 150°C for 10 minutes, and air fired at 900°C for 10 minutes (total 30 minutes). A membrane conductor terminal layer was formed. The spacing between the thick film conductor terminal layers is lll11 and h0
Next, thick film resistor firing paste (R931ONr Shoei Kagaku Kogyo 1
@J) Applied by t-screen printing, 150°CI
Dry for 0 minutes and dry at 850℃ for 10 minutes (total 35 minutes)
Air fired. Furthermore, in order to protect the thick film resistor layer, thick film insulator firing paste (#
5238r Shoei Kagaku Kogyo ■'') was air fired.
厚膜抵抗体層の焼成後の形状は巾1.OLl1m1長さ
1.5mm、厚さ10μmである。又厚膜絶縁体層の焼
成後の形状は中1.2■m1長さ1.7−m、厚さ10
μmである。The shape of the thick film resistor layer after firing has a width of 1. OLl1m1 has a length of 1.5 mm and a thickness of 10 μm. The shape of the thick film insulator layer after firing is 1.2 m, 1.7 m long, and 10 m thick.
It is μm.
上記、厚膜導体端子層、厚膜抵抗体層及び厚膜絶縁体層
及び厚膜絶縁体層形成後のアルミナ基板にセミアデイテ
ィブ法により厚膜導体端子層と一部重なる様にめっき導
体回路パターンを形成した。After forming the thick film conductor terminal layer, thick film resistor layer, thick film insulator layer, and thick film insulator layer, plated conductor circuits are formed on the alumina substrate using a semi-additive method so as to partially overlap with the thick film conductor terminal layer. formed a pattern.
具体的には、前記基板を、触媒の吸着を促進するため、
クリーナー・コンディショナー902「日本シェーリン
グe!IJ水溶液中に5分間浸漬し、水洗した後、プレ
デイプB「日本シェージング011」水溶液中に30秒
浸漬した後、少なくともパラジウム化合物を含むアルカ
リ性水溶液(アクティペターネオガント834「日本フ
ェーリング9助)」中に6分間浸漬し、活性化後、水洗
した。その後、還元剤を含む水溶液(リデュサーWAr
日本シェーリングfl助J)中で処理した後、直ちに無
電解銅めっき液(プリントガントMLr日本シェーリン
グ■」)中に60℃、20分間浸漬し1.0μmの無電
解銅めっき皮膜をえた。さらに、感光性ドライフィルム
を用いてネガ型のめっきレジストを厚膜導体端子層の一
部に重なる様に回路パターン状に形成し、電気銅めっき
を10μmを析出させた。電気銅めっき後、レジストを
剥離し、非回路部分の薄付けの無電解銅めっきを0.1
M H2SO410,1M H2O2エツチング液で除
去した。Specifically, in order to promote adsorption of the catalyst, the substrate is coated with
Cleaner/Conditioner 902 "Nippon Schering e! After 5 minutes of immersion in IJ aqueous solution and rinsing with water, 30 seconds of immersion in Predip B "Nippon Schaging 011" aqueous solution, followed by an alkaline aqueous solution containing at least a palladium compound (Actipetar Neo Gant). 834 "Nippon Fehring 9-suke)" for 6 minutes, and after activation, it was washed with water. After that, an aqueous solution containing a reducing agent (Reducer WAr
After being treated in Nippon Schering fl Suke J), it was immediately immersed in an electroless copper plating solution (Print Gant MLr Nippon Schering ■) at 60°C for 20 minutes to obtain an electroless copper plating film of 1.0 μm. Further, a negative plating resist was formed in a circuit pattern using a photosensitive dry film so as to partially overlap the thick film conductor terminal layer, and electrolytic copper plating was deposited to a thickness of 10 μm. After electrolytic copper plating, remove the resist and apply thin electroless copper plating on non-circuit areas to 0.1
It was removed with M H2SO410, 1M H2O2 etching solution.
〈実施例−2〉
実施例−1の示したと同一の方法で厚膜導体端子層、厚
膜抵抗体層及び厚膜絶縁体層形成後のアルミナ基板を活
性化した後、以下に示す浴組成及び条件を用いて10.
0μmの無電解銅めっき皮膜をえた。<Example-2> After activating the alumina substrate after forming the thick-film conductor terminal layer, thick-film resistor layer, and thick-film insulator layer by the same method as shown in Example-1, the bath composition shown below was prepared. and conditions 10.
An electroless copper plating film of 0 μm was obtained.
浴組成: Cu5(1+l5H20(0,OEtM)、
■C1(0(0,50M)、EDTA(0,12M)、
Na0H(PH10,5に調整)、ヘキサシアノ鉄(I
I)酸カリウム(10mg/l)
2.2′−ジピリジル(10mg/))P E G #
1000 (500mg/ II )条 件: pH
12,5、浴温70℃
さらに、感光性ドライフィルムを用いてポジ型のエツチ
ングレジストを回路パターン状に形成し、0.1M■2
SO4/ 0.1M )120゜のエツチング液を用い
非回路部分を除去した。Bath composition: Cu5(1+l5H20(0,OEtM),
■C1 (0 (0,50M), EDTA (0,12M),
Na0H (adjusted to pH 10.5), iron hexacyano (I
I) Potassium acid (10 mg/l) 2,2'-dipyridyl (10 mg/)) P E G #
1000 (500mg/II) Conditions: pH
12.5, bath temperature 70℃ Furthermore, a positive etching resist was formed into a circuit pattern using a photosensitive dry film, and 0.1M
Non-circuit portions were removed using an etching solution (SO4/0.1M) at 120°.
〈実施例−3〉
実施例−1に示したと同一の方法で厚膜導体端子層、厚
膜抵抗体層及び厚膜絶縁体層形成後のアルミナ基板を活
性化した後、無電解ニッケルめっき(トップケミアロイ
B−1「奥野製薬玉業f)IJ)を用い、1.0μmの
無電解ニッケルめっき皮膜を得た。さらに、感光性ドラ
イフィルムを用いてネガ型のめっきレジストを厚膜導体
端子層の一部と重なる様に回路パターン状に形成し、電
気銅めっきを10μmを析出させた。電気銅めっき後、
レジストを剥離し、非回路部分の薄付けの無電解ニッケ
ルめっきを0.1M H2SO4/ O,IM H20
□のエツチング液で除去した。<Example 3> After activating the alumina substrate after forming the thick film conductor terminal layer, thick film resistor layer, and thick film insulator layer by the same method as shown in Example 1, electroless nickel plating ( An electroless nickel plating film of 1.0 μm was obtained using Top Chemialloy B-1 "Okuno Pharmaceutical Co., Ltd. IJ).Furthermore, a negative plating resist was applied to a thick film conductor terminal using a photosensitive dry film. A circuit pattern was formed so as to overlap with a part of the layer, and electrolytic copper plating was deposited to a thickness of 10 μm.After electrolytic copper plating,
Peel off the resist and apply thin electroless nickel plating to non-circuit areas with 0.1M H2SO4/O, IM H20.
It was removed with the etching solution □.
〈実施例−4〉
実施例−1に示したと同一の方法で厚膜導体端子層、厚
膜抵抗体層及び厚膜絶縁体層形成後のア9−
10−
ルミナ基板をpH7〜14の少なくともパラジウム化合
物を含むアルカリ性水溶液(アクティペターネオガント
834「日本シェージングa@」)中に6分間浸漬し、
水洗した。その後、還元剤を含む水溶液(リデュサーW
Ar日本シェーリング[1@J)中で処理した後、直ち
に無電解銅めっき液(プリントガントMLr日本シェー
リング(1!IJ)中に60℃、20分間浸漬し1.0
μmの無電解銅めっき皮膜をえた。さらに、感光性ドラ
イフィルムを用いてネガ型のめっきレジストを厚膜導体
端子層の一部重なる様に回路パターン状に形成し、電気
銅めっきを10μmを析出させた。電気銅めっき後、レ
ジストを剥離し、非回路部分の薄付けの無電解銅めっき
部分を0.1M、H2SO4/ 0.1M 120゜の
エツチング液で除去した。<Example 4> After forming the thick film conductor terminal layer, thick film resistor layer, and thick film insulator layer by the same method as shown in Example 1, the lumina substrate was heated to a pH of at least 7 to 14. Immersed for 6 minutes in an alkaline aqueous solution containing a palladium compound (Actipetar Neogant 834 "Nippon Shading a@"),
Washed with water. After that, an aqueous solution containing a reducing agent (Reducer W
After processing in Ar Nippon Schering [1@J], it was immediately immersed in an electroless copper plating solution (Print Gant MLr Nippon Schering (1! IJ) at 60°C for 20 minutes.
A μm thick electroless copper plating film was obtained. Furthermore, a negative plating resist was formed into a circuit pattern using a photosensitive dry film so as to partially overlap the thick film conductor terminal layer, and electrolytic copper plating was deposited to a thickness of 10 μm. After electrolytic copper plating, the resist was peeled off, and the thin electroless copper plating portion on the non-circuit portion was removed using a 0.1M, H2SO4/0.1M 120° etching solution.
〈実施例−5〉
実施例−1に示したと同一の方法で、粗面化した基板に
、ガラスフリットを含む厚膜導体焼成ペースト(D−4
E!89 r昭栄化学工業卸」)をスクリーン印刷によ
り塗布し、150°Cで10分間乾燥し、その後850
°Cで10分間(トータル35分間)空気焼成し、厚膜
導体端子層を形成した。厚膜導体端子層の間隔は111
11とした。次いで同厚膜導体端子層にそれぞれ一部重
なる様に厚膜抵抗体焼成ペース)(R931ONr昭栄
化学工業a1」)をスクリーン印刷により塗布し、15
0°Cで10分間乾燥し、850℃で10分間(トータ
ル35分間)空気焼成した。<Example-5> By the same method as shown in Example-1, thick film conductor baking paste (D-4) containing glass frit was applied to a roughened substrate.
E! 89r Shoei Kagaku Kogyo Wholesale'') was applied by screen printing, dried at 150°C for 10 minutes, and then
Air baking was performed at °C for 10 minutes (35 minutes in total) to form a thick film conductor terminal layer. Thick film conductor terminal layer spacing is 111
It was set to 11. Next, thick film resistor firing paste) (R931ONr Shoei Kagaku Kogyo A1) was applied by screen printing so as to partially overlap each thick film conductor terminal layer, and
It was dried at 0°C for 10 minutes and air-baked at 850°C for 10 minutes (35 minutes in total).
さらに厚膜抵抗体層を保護するために厚膜抵抗体層全面
を被う様に厚膜絶縁体焼成ペースト(#5238 r昭
栄化学工業(11」)をスクリーン印刷により塗布し、
150℃で10分間乾燥し、その後600℃で10分間
(トータル35分間)空気焼成した。Furthermore, in order to protect the thick film resistor layer, a thick film insulator firing paste (#5238r Shoei Kagaku Kogyo (11)) was applied by screen printing to cover the entire surface of the thick film resistor layer.
It was dried at 150°C for 10 minutes, and then air fired at 600°C for 10 minutes (35 minutes in total).
厚膜抵抗体層の焼成後の現状は巾1.0−m1長さ1.
5mm1厚さ10μmである。又厚膜絶縁体層の焼成後
の形状は巾1.2−m1長さ1.7w、厚さ10μmで
ある。The current state of the thick film resistor layer after firing is width 1.0-m1 length 1.0-m.
It has a thickness of 5 mm and a thickness of 10 μm. The shape of the thick film insulator layer after firing is 1.2-m1 in width, 1.7W in length, and 10 μm in thickness.
上記、厚膜導体端子層、厚膜抵抗体層及び厚膜絶縁体層
形成後のアルミナ基板にセミアデイティブ法により厚膜
導体端子層の一部重なる様に、実施例−1と同様にめっ
き導体回路パターンを形成した。After forming the thick film conductor terminal layer, thick film resistor layer, and thick film insulator layer, the alumina substrate was plated using a semi-additive method in the same manner as in Example 1 so that the thick film conductor terminal layer partially overlapped with the alumina substrate. A conductive circuit pattern was formed.
く比較例−1〉
実施例−1に示したと同一の方法で厚膜導体端子層、厚
膜抵抗体層及び厚膜絶縁体層形成後、無電解銅めっきを
施すに当り、PdC1゜/5nC1゜混合系の酸性水溶
液(5alt type)に40°C,5分間浸漬し、
水洗後、HBF4水溶液にて活性化を行い、水洗した後
、実施例−1に示したと同一方法で無電解銅めっき及び
、導体パターンを形成した。Comparative Example-1> After forming a thick-film conductor terminal layer, a thick-film resistor layer, and a thick-film insulator layer by the same method as shown in Example-1, electroless copper plating was performed using PdC1°/5nC1.゜Immerse in a mixed acidic aqueous solution (5alt type) at 40°C for 5 minutes,
After washing with water, activation was performed with an aqueous HBF4 solution, and after washing with water, electroless copper plating and a conductor pattern were formed in the same manner as shown in Example-1.
く比較例−2〉
実施例−1に示したと同一の方法で厚膜導体端子層、厚
膜抵抗体層及び厚膜絶縁体層形成後、無電解銅めっきを
施すに当り、PdC1□/5nC12混合系の酸性水溶
液(MCI type)に15°C15分間浸漬し、水
洗後、HBF4水溶液にて活性化を行い、水洗した後、
実施例−1に示したと同一の方法で無電解銅めっきおよ
び導体パターンを形成した。Comparative Example-2> After forming a thick-film conductor terminal layer, a thick-film resistor layer, and a thick-film insulator layer by the same method as shown in Example-1, electroless copper plating was performed using PdC1□/5nC12. Immersed in mixed acidic aqueous solution (MCI type) at 15°C for 15 minutes, washed with water, activated with HBF4 aqueous solution, washed with water,
Electroless copper plating and a conductor pattern were formed by the same method as shown in Example-1.
〈比較例−3〉
実施例−1に示したと同一の方法で厚膜導体端子層、厚
膜抵抗体層及び厚膜絶縁体層形成後、無電解めっきを施
すに当り、5nC12水溶液40℃、5分間浸漬し、感
受性化し、水洗後、Pdel。水溶液40°C,5分間
浸漬し、活性化を行ない、水洗した後、実施例−1に示
したと同一の方法で無電解銅めっき及び、水洗した後、
実施例−1に示したと同一の方法で無電解銅めっき及び
、導体パターンを形成した。<Comparative Example-3> After forming a thick-film conductor terminal layer, a thick-film resistor layer, and a thick-film insulator layer by the same method as shown in Example-1, electroless plating was performed using a 5nC12 aqueous solution at 40°C. After soaking for 5 minutes to sensitize and washing with water, Pdel. After being immersed in an aqueous solution at 40°C for 5 minutes, activated, and washed with water, electroless copper plating was performed in the same manner as shown in Example-1, and after washing with water,
Electroless copper plating and a conductor pattern were formed by the same method as shown in Example-1.
〈比較例−4〉
実施例−5に示したと同一の方法で厚膜導体端子層、厚
膜抵抗体層及び厚膜絶縁体層形成後、無電解銅めっきを
施すに当り、PdCl2/ 5nCI2混合系の酸性水
溶液(5alt tyl)e )に40℃、5分間浸漬
し、水洗後、HBF4水溶液にて活性化を行い、水洗し
た後、実施例−1に示したと同一方法で無電解銅めっき
及び、導体パターンを形成した。<Comparative Example-4> After forming a thick-film conductor terminal layer, a thick-film resistor layer, and a thick-film insulator layer by the same method as shown in Example-5, a PdCl2/5nCI2 mixture was used for electroless copper plating. After immersing in an acidic aqueous solution (5alt tyl) e) at 40°C for 5 minutes, rinsing with water, activation with an aqueous HBF4 solution, and rinsing with water, electroless copper plating and , a conductor pattern was formed.
前記実施例1〜5、比較例1〜4、によって得られたパ
ターン概略を第1図に示す。FIG. 1 schematically shows the patterns obtained in Examples 1 to 5 and Comparative Examples 1 to 4.
なお第1図において(c)部は、各実施例、比較13−
14−
例でパターンとは別に各側の工程と同一の工程を経由し
て作成した各側での厚膜導体層部のみの、密着強度測定
用部分である。密着強度の測定は、(C)部を使用して
90度ビール強度を測定した。In addition, in FIG. 1, part (c) is only the thick film conductor layer portion on each side that was created through the same process as that on each side, apart from the pattern in each Example and Comparison 13-14- Example. This is the part for measuring adhesion strength. The adhesion strength was measured by measuring 90 degree beer strength using part (C).
また第1図に示した(b)部を使用して、55°C〜1
50°Cのヒートサイクル2000回後の抵抗値変化(
△R%)を評価した。Also, using part (b) shown in Figure 1,
Resistance change after 2000 heat cycles at 50°C (
ΔR%) was evaluated.
各側での評価結果を表−1に示す。Table 1 shows the evaluation results for each side.
表 −1
(発明の効果)
本発明の実施により、厚膜導体端子層(厚膜導体層)を
侵すことなくめっき導体パターンを形成することが可能
となり、厚膜抵抗体とめっき導体間の接続部の信頼性が
高いセラミック・プリント配線板を製造することができ
る。Table 1 (Effects of the invention) By implementing the present invention, it becomes possible to form a plated conductor pattern without corroding the thick film conductor terminal layer (thick film conductor layer), and the connection between the thick film resistor and the plated conductor becomes possible. Ceramic printed wiring boards with high reliability can be manufactured.
第1図は本発明の実施例及び比較例のパターンを示した
ものであり、(a)は全体図を、(b)は厚膜抵抗体と
めっき導体間の接続部の部分拡大図を、(c)は密着強
度評価に用いたパターンを示すものである。FIG. 1 shows patterns of examples and comparative examples of the present invention, where (a) is an overall view, and (b) is a partially enlarged view of a connection between a thick film resistor and a plated conductor. (c) shows the pattern used for evaluation of adhesion strength.
Claims (1)
っきにより形成された導体パターンとを設けたセラミッ
クプリント配線板を製造するに際し、無電解めっきの前
処理として、セラミック基板をパラジウム化合物を含む
アルカリ性水溶液にて処理することを特徴とするセラミ
ックプリント配線板の製造方法。(1) When manufacturing a ceramic printed wiring board in which at least a thick film resistor layer and a conductor pattern formed by plating are provided on a ceramic substrate, the ceramic substrate is coated with an alkaline solution containing a palladium compound as a pretreatment for electroless plating. A method for manufacturing a ceramic printed wiring board, characterized by processing with an aqueous solution.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29659689A JPH03156992A (en) | 1989-11-15 | 1989-11-15 | Manufacture of ceramic printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29659689A JPH03156992A (en) | 1989-11-15 | 1989-11-15 | Manufacture of ceramic printed wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03156992A true JPH03156992A (en) | 1991-07-04 |
Family
ID=17835597
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29659689A Pending JPH03156992A (en) | 1989-11-15 | 1989-11-15 | Manufacture of ceramic printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03156992A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0623273U (en) * | 1992-08-28 | 1994-03-25 | 株式会社村田製作所 | Circuit board |
-
1989
- 1989-11-15 JP JP29659689A patent/JPH03156992A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0623273U (en) * | 1992-08-28 | 1994-03-25 | 株式会社村田製作所 | Circuit board |
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