JPH0216788A - Ceramic printed wiring board - Google Patents

Ceramic printed wiring board

Info

Publication number
JPH0216788A
JPH0216788A JP16749588A JP16749588A JPH0216788A JP H0216788 A JPH0216788 A JP H0216788A JP 16749588 A JP16749588 A JP 16749588A JP 16749588 A JP16749588 A JP 16749588A JP H0216788 A JPH0216788 A JP H0216788A
Authority
JP
Japan
Prior art keywords
thick film
layer
conductor
film resistor
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16749588A
Other languages
Japanese (ja)
Inventor
Tatsu Yoneda
龍 米田
Kenichi Yokota
健市 横田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyobo Co Ltd
Original Assignee
Toyobo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyobo Co Ltd filed Critical Toyobo Co Ltd
Priority to JP16749588A priority Critical patent/JPH0216788A/en
Publication of JPH0216788A publication Critical patent/JPH0216788A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To form a fine conductor pattern with a plating conductor at a high accuracy and to realize a high precision ceramic printed wiring board by making a nickel-base layer of a plating conductor which is in contact with a thick film resistor layer at a terminal section of the thick film resistor layer. CONSTITUTION:At least a thick film resistor layer and a conductor layer formed through wet plating method are arranged on a ceramic board such as an alumina board, an aluminum nitride board, a silicon carbide board, and a glass board. A nickel-base layer is a plating conductor which is in contact with a thick film resistor layer at a terminal section of the thick film resistor layer such as RuO2 system, pyrochlore-type ruthenium oxide metal system, and nitride baked-type LaB6-system. According to this constitution, a fine conductor pattern can be formed with a high accuracy with a plating conductor and high precision of a ceramic printed wiring board can be realized.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、高精度、高特性を有するセラミックプリント
配線板に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a ceramic printed wiring board having high precision and high characteristics.

(従来の技術) 湿式めっき法を用いたセラミックプリント配線板に、厚
膜抵抗体と無電解めっき皮膜導体を組み合わせようとす
る試みは、既に行われている0例えば厚膜焼成ペースト
を用いて抵抗体形成後、該抵抗体端子部にパラジウムを
含むガラスペーストを印刷後焼成し、感光性ポリイミド
を絶縁層かつ、めっきレジストとして無電解めっきする
方法が知られている。
(Prior art) Attempts have already been made to combine a thick film resistor and an electroless plated film conductor on a ceramic printed wiring board using a wet plating method. A known method is to print a glass paste containing palladium on the terminal portion of the resistor after forming the resistor, then bake it, and perform electroless plating with photosensitive polyimide as an insulating layer and a plating resist.

(発明が解決しようとする課題) 湿式めっき法をもちいてセラミックプリント配線板を作
成する方法を厚膜抵抗体を含む基板にそのまま用いよう
とすれば、湿式めっきプロセスに含まれる処理薬品によ
り抵抗体が侵され、抵抗体の電気特性は著しく劣化する
。また、導体回路形成後に、抵抗体を作成しようとすれ
ば、たとえば抵抗体が厚膜焼成型抵抗体であれば、80
0°C以上の温度を必要とするため、先に形成した湿式
めっき導体が銅導体の場合、導体の緒特性を損なってし
まう結果となる。また、前記例示のように抵抗体端子部
にPdを含むガラス層を介在させた場合、抵抗体として
、特に電流ノイズの増大を伴ってしまうという欠点があ
った。このため抵抗体端子部に直接導体金属を析出させ
ることがこのましいが、電気特性を充分満足するものを
得るのが困難であった。既に、本発明者らは、抵抗体端
子部表面を粗化し、最下層に銅層を用い、加熱処理を行
った配線板について提案しているが、この場合において
も導電性および抵抗温度係数についてはすぐれたもので
あるが、電流ノイズ特性に必ずしも充分でない場合もあ
ることが判明した。
(Problem to be Solved by the Invention) If a method for producing a ceramic printed wiring board using a wet plating method is used as is for a substrate containing thick film resistors, the processing chemicals included in the wet plating process may damage the resistors. is attacked, and the electrical characteristics of the resistor are significantly deteriorated. In addition, if you try to create a resistor after forming the conductor circuit, for example, if the resistor is a thick film fired resistor,
Since a temperature of 0° C. or higher is required, if the previously formed wet-plated conductor is a copper conductor, the conductor's properties will be impaired. Further, when a glass layer containing Pd is interposed in the terminal portion of the resistor as in the above example, there is a drawback that the resistor is accompanied by an increase in current noise. For this reason, it is preferable to deposit a conductive metal directly on the terminal portion of the resistor, but it has been difficult to obtain one that satisfies the electrical properties. The present inventors have already proposed a wiring board in which the surface of the resistor terminal part is roughened, a copper layer is used as the bottom layer, and heat treatment is performed, but even in this case, the conductivity and temperature coefficient of resistance are It has been found that although the current noise characteristics are excellent, the current noise characteristics are not necessarily sufficient in some cases.

(課題を解決するための手段) 本発明者らは、従来技術の問題点を解決し、高精度、高
特性を有するセラミックプリント配線板の作成を鋭意検
討の結果、本発明に到達した。すなわち、セラミック基
板上に少なくとも厚膜抵抗体層と湿式めっき法により形
成された導体層とが配されてなるセラミックプリント配
線板において、厚膜抵抗体層の端子部において該厚膜抵
抗体層と接触するめっき導体がニッケル主体層であるこ
とを特徴とするセラミックプリント配線板である。
(Means for Solving the Problems) The present inventors solved the problems of the prior art and arrived at the present invention as a result of intensive studies to create a ceramic printed wiring board having high precision and high characteristics. That is, in a ceramic printed wiring board in which at least a thick film resistor layer and a conductor layer formed by a wet plating method are disposed on a ceramic substrate, the thick film resistor layer and the conductor layer are formed at terminal portions of the thick film resistor layer. This is a ceramic printed wiring board characterized in that the plated conductor in contact is mainly a nickel layer.

本発明におけるセラミνり基板とは、アルミナ系基板、
窒化アルミニウム基板、炭化ケイ素基板、ガラス系基板
などのセラミック系基板である。また、前記セラミック
系基板はそのまま使用することができるが、好ましくは
めっき導体の密着力を上げるために基板表面を機械的お
よびまたは化学的に粗化したセラミンク基板を使用する
The ceramic v-cured substrate in the present invention refers to an alumina-based substrate,
These are ceramic substrates such as aluminum nitride substrates, silicon carbide substrates, and glass substrates. Although the ceramic substrate can be used as is, it is preferable to use a ceramic substrate whose surface has been mechanically and/or chemically roughened in order to increase the adhesion of the plated conductor.

本発明における厚膜抵抗体層は、例えば、Run2系、
パイロクロア型ルテニウム酸金属系、窒素焼成型LaB
b系、同酸化錫系の厚膜焼成型抵抗体ペーストをセラミ
ック基板上に印刷後、適当な条件下で焼成し形成したも
のである。
The thick film resistor layer in the present invention is, for example, Run2 type,
Pyrochlore type metal ruthenate type, nitrogen firing type LaB
It is formed by printing a thick film sintered type resistor paste of B type and tin oxide type on a ceramic substrate and then firing it under appropriate conditions.

本発明においては、厚膜抵抗体の端子部に導体層を重ね
て形成せしめるとき、該端子部以外の厚膜抵抗体層上に
保護絶縁層を配して湿式めっきを行うが、このときもち
いる保護絶縁層としては、厚膜焼成型絶縁体ペースト、
および樹脂組成をもちいることができる。ニッケル主体
層とは、例えばニッケル/ホウ素、ニッケル/リンなど
で化学的に析出可能なニッケル主体の導体層をいう。ま
た湿式めっきによる導体層とは厚膜抵抗体層の端子部と
直接接触するニッケル主体層とおなしものでよいが、目
的により、ニッケル主体層上に銅、銀、白金、白金族、
金、ルテニウム、およびコバルトの無電解めっき、およ
びまたは電気めっきが組み合わされ多層に形成されたも
のでもよい。
In the present invention, when forming a conductive layer over the terminal portion of a thick film resistor, a protective insulating layer is placed on the thick film resistor layer other than the terminal portion and wet plating is performed. The protective insulating layer used is thick film sintered insulator paste,
and resin compositions can be used. The nickel-based layer refers to a nickel-based conductor layer that can be chemically precipitated using, for example, nickel/boron or nickel/phosphorus. The wet-plated conductor layer may be the same as the nickel-based layer that directly contacts the terminal portion of the thick-film resistor layer, but depending on the purpose, copper, silver, platinum, platinum group metals, etc. may be formed on the nickel-based layer.
It may be formed into a multilayer by combining electroless plating and/or electroplating of gold, ruthenium, and cobalt.

めっき導体パターンの形成法は、サブストラクト法、セ
ミアヂチプ法、フルアヂチブ法のいずれでも実施可能で
ある。
The plating conductor pattern can be formed by any of the substrate method, semi-additive method, and full additive method.

本発明における抵抗体層端子部は、そのままで導体層を
形成せしめてもよいが、表面粗化を行ってから導体層を
形成せしめたほうがよい。ここでいう表面粗化とは、抵
抗体端子部の機械的およびまたは化学的粗化をいい、め
っき導体と厚膜抵抗体の接続部の密着力を上げ、熱衝撃
等の信頼性試験にも充分耐えうるようにするために行う
もので、機械的粗化とは、例えばセラミツ、り粉のよう
な比較的硬い微粉を、抵抗体端子部に吹きつけ、端子部
表面を物理的に粗化する方法をいう、この表面粗さはR
,−(0,1〜0.5)μmの範囲に入る様に表面粗化
を行うのが好ましい、また化学的粗化とはフッソ化合物
または酸、アルカリ化合物の水溶液または溶融塩を用い
て、電子顕微鏡レベルの細孔を抵抗体端子部表面に形成
させる方法をいう、前記表面粗化方法は、それぞれ単独
でも良好な端子密着力を示すが、好ましくは機械的粗化
後更に化学的粗化を行うことにより、より高い端子密着
力を得ることができる。
Although the conductor layer may be formed on the resistor layer terminal portion of the present invention as it is, it is better to form the conductor layer after surface roughening. Surface roughening here refers to mechanical and/or chemical roughening of the resistor terminal area, which increases the adhesion between the plated conductor and the thick film resistor, and is also suitable for reliability tests such as thermal shock. Mechanical roughening is the process of physically roughening the terminal surface by spraying relatively hard fine powder, such as ceramic or glue powder, onto the resistor terminal. This surface roughness is R
It is preferable to roughen the surface so that it falls within the range of . The above-mentioned surface roughening methods, which are methods for forming pores on the surface of resistor terminals on the level of an electron microscope, exhibit good terminal adhesion even when used alone, but it is preferable to use chemical roughening after mechanical roughening. By doing this, higher terminal adhesion can be obtained.

(実施例) 〔比較例〕 アルミナを96%含有するm50.8mm、横50.8
mm、厚さ0.635Mの白色セラミック基板を340
°Cに保持された溶融がせいソウダに、10分間浸漬し
基板表面を適度に粗化した。次に、前記粗化されたセラ
ミック基板に厚膜焼成型抵抗体ペースト#6829(シ
ート抵抗:IKΩ/口)(Dupont  Japan
製〕をスクリーン印刷法により所望パターン状に塗布し
、850°Cで10分間(トータル35分間)空気中焼
成して抵抗体層を形成した。この抵抗体層上に#913
7 (DuponL  Japan製〕抵抗体保護用厚
膜焼成型ガラスペーストを抵抗体端子部を残し、抵抗体
表面および壁面をカバーするようにスクリーン印刷法に
より塗布し、550 ’Cで2分間(トータル20分1
.”l )空気中焼成した。抵抗体層の焼成後形状は、
幅1.0m、長さ1. 5mm、厚さ10μmである。
(Example) [Comparative example] Containing 96% alumina, m 50.8 mm, width 50.8
340mm, 0.635M thick white ceramic substrate
The substrate surface was appropriately roughened by immersing it in molten soda kept at .degree. C. for 10 minutes. Next, thick film fired resistor paste #6829 (sheet resistance: IKΩ/hole) (Dupont Japan) was applied to the roughened ceramic substrate.
] was coated in a desired pattern by screen printing and baked in air at 850°C for 10 minutes (total 35 minutes) to form a resistor layer. #913 on this resistor layer
7. Apply a thick film sintered glass paste for resistor protection (manufactured by DuponL Japan) by screen printing to cover the resistor surface and wall, leaving the resistor terminals, and heat at 550'C for 2 minutes (total 20 minute 1
.. "l) Fired in air. The shape of the resistor layer after firing is as follows.
Width 1.0m, length 1. It is 5 mm and 10 μm thick.

ガラス絶縁層の焼成後形状は、幅1゜OM、長さ1.5
nu++、厚さ1107zであり、抵抗体層と十字型を
成し、抵抗体端子部として抵抗体層の両端250μm幅
がガラス絶縁層に覆われていないものである。この基板
全面に、500eshα−アルミナ粉を圧力1 kg 
/ ciで、0.5秒間吹きつけて機械的粗化を行ない
、さらに50°Cの4MNaOH水溶液に30分間浸漬
し、純水中で超音波洗浄後セミアデイティブにより抵抗
体端子部に重なるようにめっき導体回路パターンを形成
した。具体的には、まず、基板前面を無電解銅めっきで
被覆した。無電解銅めっきは、PTHプロセス4 (S
hipley  Far  East)により、1.0
μmの無電解銅めっき皮膜を得た。さらに、感光性ドラ
イフィルムを用いてネガ型のメンキレジストを回路パタ
ーン状に形成し、電気銅めっきを約10μm析出させた
。電気銅めっき後、レジストを剥離、1付での無電解銅
めっき部分を、0.1 MHz Ox 10.1 MH
zSO6のエッチングン夜で除去した。
The shape of the glass insulating layer after firing is 1° OM in width and 1.5 in length.
nu++, thickness 1107z, forms a cross shape with the resistor layer, and 250 μm width at both ends of the resistor layer is not covered with the glass insulating layer as the resistor terminal portion. Apply 500 esh α-alumina powder to the entire surface of this substrate at a pressure of 1 kg.
/ci for 0.5 seconds to mechanically roughen it, then immerse it in a 4M NaOH aqueous solution at 50°C for 30 minutes, and after ultrasonic cleaning in pure water, semi-additively clean it so that it overlaps the resistor terminal. A plated conductor circuit pattern was formed. Specifically, first, the front surface of the substrate was coated with electroless copper plating. Electroless copper plating is performed using PTH process 4 (S
1.0 by hipley Far East)
An electroless copper plating film of μm thickness was obtained. Furthermore, a negative Menki resist was formed into a circuit pattern using a photosensitive dry film, and electrolytic copper plating was deposited to a thickness of about 10 μm. After electrolytic copper plating, the resist was peeled off and the electroless copper plated part was heated at 0.1 MHz Ox 10.1 MH.
It was removed by zSO6 etching.

電気特性は、シート抵抗値、電流雑音、抵抗温度係数を
測定した。初期の電気特性と熱衝撃試験(−55°Cの
トリクレンに5分間浸漬→室温10秒放置→+125 
’Cのシリコーンオイルに5分間浸漬→室温10秒間放
置を1サイクルとする熱衝撃試験)25サイクル後の電
気特性値を表1に示した。
For electrical properties, sheet resistance, current noise, and temperature coefficient of resistance were measured. Initial electrical properties and thermal shock test (immersed in -55°C trichloride for 5 minutes → left at room temperature for 10 seconds → +125
Table 1 shows the electrical property values after 25 cycles (thermal shock test in which one cycle was immersion in silicone oil of 'C for 5 minutes and then left at room temperature for 10 seconds).

〔実施例−1〕 比較例に示したと同一の方法で、表面粗化した白色セラ
ミック基板にガラス絶縁層で保護された抵抗体を形成し
た。この基板を脱脂処理後、純水中で超音波洗浄し、基
板全面を無電解ニッケルめっきで被覆した。無電解ニケ
ンルめっきは、触媒化プロセスにCataposit 
44プロセス、無電解ニッケルめっきN1−posit
 468 (いずれも(Shipley Far Ea
st)を用い、約1.OIImのニッケル皮膜を得た。
[Example-1] A resistor protected by a glass insulating layer was formed on a white ceramic substrate with a roughened surface by the same method as shown in the comparative example. After degreasing this substrate, it was subjected to ultrasonic cleaning in pure water, and the entire surface of the substrate was coated with electroless nickel plating. Electroless Nickel plating uses Cataposit in the catalytic process.
44 process, electroless nickel plating N1-posit
468 (Shipley Far Ea
st), about 1. A nickel film of OIIm was obtained.

以下、比較例Iに示したと同一の方法でめっき導体回路
パターンを形成した。二、ケル皮膜の組成はN i /
 B =99.7510.25であった。
Thereafter, a plated conductor circuit pattern was formed using the same method as shown in Comparative Example I. 2. The composition of Kel film is N i /
B=99.7510.25.

初期の電気特性と熱衝撃試験25サイクル後の電気特性
の結果を表1に示した。
Table 1 shows the results of the initial electrical properties and the electrical properties after 25 cycles of the thermal shock test.

〔実施例−2〕 比較例に示したと同一の方法で、表面粗化した白色セラ
ミック基板にガラス絶縁層で保護された抵抗体を形成し
、機械的粗化後、50″Cの4MUaOH水溶液に30
分間の浸漬を行った。この基板を純水中で超音波洗浄後
、基板全面を無電解ニッケルめっきで被覆した。無電解
ニッケルめっきは、触媒化プロセスにCataposi
t 44プロセス、無電解ニッケルめっきN1−pos
it 468 (いずれも(Shipley Far 
East)を用い、約1.Oltmのニッケル皮膜を得
た。以下、比較例■に示したと同一の方法で銅めっき導
体回路パターンを形成した。ニッケル皮膜の組成はN 
i / B = 99.75 / 0゜25であった。
[Example-2] A resistor protected by a glass insulating layer was formed on a surface-roughened white ceramic substrate by the same method as shown in the comparative example, and after mechanical roughening, it was soaked in a 4MUaOH aqueous solution at 50"C. 30
Immersion was performed for 1 minute. After this substrate was ultrasonically cleaned in pure water, the entire surface of the substrate was coated with electroless nickel plating. Electroless nickel plating uses Cataposi in the catalytic process.
t44 process, electroless nickel plating N1-pos
it 468 (both (Shipley Far
East), about 1. A nickel film of Oltm was obtained. Thereafter, a copper-plated conductor circuit pattern was formed using the same method as shown in Comparative Example (2). The composition of the nickel film is N
i/B = 99.75/0°25.

初期の電気特性と熱衝撃試験25サイクル後の電気特性
の結果を表1に示した。
Table 1 shows the results of the initial electrical properties and the electrical properties after 25 cycles of the thermal shock test.

〔実施例−3〕 比較例に示したと同一の方法で、表面粗化した白色セラ
ミック基板にガラス絶縁層で保護された抵抗体を形成し
、機械的粗化後、50°Cの4MNaOH水溶液に30
分間の浸漬を行った。この基板を純水中で超音波洗浄後
、基板全面を無電解ニッケルめっきで被覆した。無電解
ニッケルめっきは、触媒化プロセスにCataposi
t 44プロセス、無電解ニッケルめっきN1−pos
it 65  (いずれも(Shipley Far 
East)を用い、約1.Opmのニッケル皮膜を得た
。以下、比較例Iに示したと同一の方法で銅めっき導体
回路パターンを形成した。ニッケル皮膜の組成はN i
 / P = 90 / 10であった。初期の電気特
性と熱衝撃試験25サイクル後の電気特性の結果を表1
に示した。
[Example 3] A resistor protected by a glass insulating layer was formed on a surface-roughened white ceramic substrate by the same method as shown in the comparative example, and after mechanical roughening, it was soaked in a 4M NaOH aqueous solution at 50°C. 30
Immersion was performed for 1 minute. After this substrate was ultrasonically cleaned in pure water, the entire surface of the substrate was coated with electroless nickel plating. Electroless nickel plating uses Cataposi in the catalytic process.
t44 process, electroless nickel plating N1-pos
it 65 (both (Shipley Far
East), about 1. A nickel coating of Opm was obtained. Thereafter, a copper-plated conductor circuit pattern was formed using the same method as shown in Comparative Example I. The composition of the nickel film is Ni
/P = 90/10. Table 1 shows the results of initial electrical properties and electrical properties after 25 cycles of thermal shock testing.
It was shown to.

表 シート抵抗値  電流ノイズ (KΩ/口)     (dB) 比較例 初期値 熱衝撃試験 1.1500 1.1560 実施例(−1) 初期値 熱衝撃試験 1.1500    一部 1.1510    −23 抵抗温度係数 (ppm/K) 5℃→125℃ 5℃→−55℃ =(資) (発明の効果) 本発明の実施により、厚膜抵抗体の本来の特性をそこな
うことな(、導体パターンをめっき導体で微細かつ間精
度に形成できることは、セラミ・ンクプリント配線板の
高精度化、高特性化に極めて有益である。
Table sheet resistance value Current noise (KΩ/mouth) (dB) Comparative example Initial value thermal shock test 1.1500 1.1560 Example (-1) Initial value thermal shock test 1.1500 Part 1.1510 -23 Resistance temperature Coefficient (ppm/K) 5°C → 125°C 5°C → -55°C = (Equity) (Effect of the invention) By carrying out the present invention, the conductor pattern can be plated without impairing the original characteristics of the thick film resistor. The ability to form conductors with fine precision and spacing is extremely useful for improving the precision and characteristics of ceramic printed wiring boards.

特許出願人  東洋紡績株式会社 実施例(−2) 初期値 熱衝撃試験 1.1500    −25 1.1505    −25 実施例(−3) 初期値 熱衝撃試験 1.1500    −25 1.1505    −25 比較例と実施例の測定値はn=20の平均値手続補正書
(自発) 昭和63年9月28日 1゜ λ 3゜ 事件の表示 昭和63年特許願第187495号 発明の名称 セラミックプリント配線板 補正をする者 事件との関係  特許出願人 大阪市北区堂島浜二丁目2番8号 明細書の発明の詳細な説明の欄 a 補正の内容 (1)  明細書第5頁第4行目のr〜も実施可能であ
る。」と第5行目の「本発明における〜」とのに、「本
発明のセラミックプリント配線板においては、印刷焼成
が繰り返しおこなわれる厚膜焼ペーストを用いて得られ
るセラミックプリント線板に比較して、工程の短縮化、
コストの低減化、スルーホールを用いての両面配線の容
易化等すぐれた利点を有している。」を挿入する。
Patent applicant Toyobo Co., Ltd. Example (-2) Initial value thermal shock test 1.1500 -25 1.1505 -25 Example (-3) Initial value thermal shock test 1.1500 -25 1.1505 -25 Comparison The measured values of Examples and Examples are the average values of n=20 Procedural amendment (voluntary) September 28, 1985 1゜λ 3゜Indication of incident 1987 Patent application No. 187495 Name of invention Ceramic printed wiring board Relationship with the case of the person making the amendment Detailed description of the invention in the specification of the patent applicant No. 2-2-8 Dojimahama, Kita-ku, Osaka City Contents of the amendment (1) r on page 5, line 4 of the specification ~ is also possible. ” and “In the present invention” in the fifth line, “In the ceramic printed wiring board of the present invention, compared to a ceramic printed wiring board obtained using a thick film baking paste in which printing and baking are repeated, By shortening the process,
It has excellent advantages such as cost reduction and easy double-sided wiring using through holes. ” is inserted.

■ 明細書第4頁第12行目の「樹脂組成を」を「樹脂
組成物を」に訂正する。
■ "Resin composition" on page 4, line 12 of the specification is corrected to "resin composition."

昭和 年 月 日(自発)Showa Year Month Day (voluntary)

Claims (1)

【特許請求の範囲】[Claims] (1)セラミック基板上に少なくとも厚膜抵抗体層と湿
式めっき法により形成された導体層とが配されてなるセ
ラミックプリント配線板において、厚膜抵抗体層の端子
部において該厚膜抵抗体層と接触するめっき導体がニッ
ケル主体層であることを特徴とするセラミックプリント
配線板。
(1) In a ceramic printed wiring board in which at least a thick film resistor layer and a conductor layer formed by wet plating are arranged on a ceramic substrate, the thick film resistor layer is disposed at the terminal portion of the thick film resistor layer. A ceramic printed wiring board characterized in that the plated conductor in contact with the plated conductor is mainly composed of nickel.
JP16749588A 1988-07-05 1988-07-05 Ceramic printed wiring board Pending JPH0216788A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16749588A JPH0216788A (en) 1988-07-05 1988-07-05 Ceramic printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16749588A JPH0216788A (en) 1988-07-05 1988-07-05 Ceramic printed wiring board

Publications (1)

Publication Number Publication Date
JPH0216788A true JPH0216788A (en) 1990-01-19

Family

ID=15850740

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16749588A Pending JPH0216788A (en) 1988-07-05 1988-07-05 Ceramic printed wiring board

Country Status (1)

Country Link
JP (1) JPH0216788A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6026071A (en) * 1983-07-21 1985-02-08 Mitsui Petrochem Ind Ltd Adhesive for chlorine-containing polymer
US5222778A (en) * 1990-11-28 1993-06-29 Hofmann Maschinenbau Gmbh Workpiece gripping apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6026071A (en) * 1983-07-21 1985-02-08 Mitsui Petrochem Ind Ltd Adhesive for chlorine-containing polymer
JPH044353B2 (en) * 1983-07-21 1992-01-28
US5222778A (en) * 1990-11-28 1993-06-29 Hofmann Maschinenbau Gmbh Workpiece gripping apparatus

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