JPS6346595B2 - - Google Patents

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Publication number
JPS6346595B2
JPS6346595B2 JP58044276A JP4427683A JPS6346595B2 JP S6346595 B2 JPS6346595 B2 JP S6346595B2 JP 58044276 A JP58044276 A JP 58044276A JP 4427683 A JP4427683 A JP 4427683A JP S6346595 B2 JPS6346595 B2 JP S6346595B2
Authority
JP
Japan
Prior art keywords
conductor layer
layer
weight
noble metal
firing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58044276A
Other languages
Japanese (ja)
Other versions
JPS59171195A (en
Inventor
Akio Yano
Fukuzo Mizuno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NGK Insulators Ltd
Original Assignee
NGK Insulators Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Insulators Ltd filed Critical NGK Insulators Ltd
Priority to JP4427683A priority Critical patent/JPS59171195A/en
Publication of JPS59171195A publication Critical patent/JPS59171195A/en
Publication of JPS6346595B2 publication Critical patent/JPS6346595B2/ja
Granted legal-status Critical Current

Links

Description

【発明の詳細な説明】[Detailed description of the invention]

本発明は混成集積回路部品に使用されるセラミ
ツク多層配線基板の製造法に関する。 従来、混成集積回路基板の製造法として、第1
図に示すようにセラミツクグリーンシート1上に
タングステンあるいはモリブデン等の高融点金属
を主成分とする第1の導体層2、その第1の導体
層2上に導体層2に一部を開口する絶縁層3を印
刷形成した後還元雰囲気で焼成し、次いで第1の
導体層2の開口部および絶縁層3上に銀等の厚膜
導体ペーストを印刷し酸化雰囲気で焼成して第2
の導体層4を形成してセラミツク多層配線基板を
得ることが知られている。 ところが、第2の導体層4は酸化雰囲気で焼成
されるため第1の導体層2が酸化されて電気抵抗
が高くなり、混成集積回路基板としては不適のも
のになる。 このため、第1の導体層2の開口部に金等の耐
酸化性の貴金属のメツキを施したり、第1の導体
層2の組成を耐酸化性にする試みが提案されてい
る。ところが、メツキする方法では金メツキ厚を
2μにしても厚膜ペーストの焼成温度を700℃以上
にすると、第1の導体層が酸化され、また、第1
の導体層2に白金を添加した組成にしても、焼成
温度を650℃以上にすると、第1の導体層が酸化
されて混成集積回路基板としては不適なものであ
つた。 従つて、第2の導体層に使用できる厚膜ペース
トの選択に制限があるものであつた。 本発明は前記のような欠点を無くすために成さ
れたもので、高融点金属を主成分とする導体層が
設けられたセラミツク基板に厚膜導体層を酸化雰
囲気で焼成して得られるセラミツク多層配線基板
の製造法において、高融点金属を主成分とする導
体層にニツケルメツキし、次いでそのニツケルメ
ツキ上に主成分が銀25〜90重量%、金10〜75重量
%からなる貴金属層、または主成分が銀が25〜90
重量%、金とパラジウムの合計が10〜75重量%、
かつ、パラジウムが30重量%以下の範囲からなる
貴金属層を形成後熱処理によりその貴金属層を溶
融し、その溶融された貴金属層上に厚膜導体層を
印刷し、酸化雰囲気で焼成するセラミツク多層配
線基板の製造法である。 本発明の詳細を、第2図に示すフローチヤート
および第3図の構成図に従つて本発明の方法を各
工程ごとに順次説明する。 まず、アルミナ、ベリリア等を主成分とするセ
ラミツクグリーンシートを公知のドクターブレー
ド法等によつて調整し、混成集積回路基板として
必要な寸法にしたセラミツクグリーンシート1を
準備する。 次いで、タングステン、モリブデン等の高融点
金属、すなわちセラミツクグリーンシート1の焼
成温度よりも融点が高くかつ電気抵抗が小さい金
属を主成分とする導電ペーストを調整し、前記の
セラミツクグリーンシート1上にスクリーン印刷
あるいは転写印刷により所要の回路パターンとな
る第1の導体層2を印刷する。 次に、第1の導体層2の一部を開口するように
その導体層2上に絶縁ペーストをスクリーン印刷
あるいは転写印刷により絶縁層3を形成する。絶
縁層3によつて開口された第1の導体層は、後で
説明するように第2の導体層と電気的に接続する
ためのものである。絶縁ペーストとしてはセラミ
ツクグリーンシートと同一成分のものが用いられ
る。 第1の導体層および絶縁層はそれぞれ1層に限
られるものではなく、例えば第4図に示すように
導体層を複数層2,2、絶縁層を複数層3,3と
してもよい。この場合導体層間を電気的に接続す
る開口部は第1の導体層と同一の成分を以つて形
成される。 第1の導体層と絶縁層とが印刷されたセラミツ
クグリーンシートを還元雰囲気で焼成する。焼成
条件はセラミツクグリーンシートの組成、高融点
金属ペーストの成分により定められるが、1400℃
〜1800℃で5分〜180分である。 焼成後、絶縁層の開口部に露出する第1の導体
層2上にニツケルメツキによりニツケルメツキ層
5を形成する。ニツケルメツキする理由は後で説
明する貴金属との濡れ性の向上をはかると共に第
2の導体層を酸化雰囲気中で焼成するときの第1
の導体層の酸化防止を図るためである。従つて、
ニツケルメツキの厚みは貴金属の種類とその熱処
理温度、第2の導体層の焼成温度によつて選定す
ればよいが、通常1〜5μである。ニツケルメツ
キにおける電解、無電解メツキ法の選択は、メツ
キ用電極の要否により選択される。 ニツケルメツキ後、ニツケルメツキ層と第1の
導体層との密着強度を向上するため800〜1200℃、
5〜30分還元雰囲気中で熱処理をしてもよい。 次いで、主成分が銀90〜25重量%、金が10〜75
重量%(但し金の一部が30重量%以下のパラジウ
ムで置換したものを含む)の範囲よりなる貴金属
を主成分とする貴金属層6をニツケルメツキ層5
上に形成する。 その方法としては、金属あるいは合金箔を単に
ニツケルメツキ層上に載置する方法、メツキによ
り形成する方法、印刷ペーストを以つて形成する
方法が採られる。印刷の場合はその厚みは30μ程
度が適切である。 貴金属成分を上記とする理由は、後工程で溶融
し、その後厚膜導電ペーストを酸化性雰囲気中で
焼成した時、銀が90重量%以上であると、溶融貴
金属中に酸素が固溶して酸素の遮断性がそこなわ
れ、ニツケルメツキ表面が酸化して導通抵抗が大
きくなるためであり、銀以外の主成分が、金やパ
ラジウムであるのは、銀と完全に固溶するため銀
中酸素の固溶を押さえる効果があるためである。
金が75重量%及びパラジウムが30重量%以下であ
るのは、溶融時に下地のニツケルが貴金属中に溶
け出して貴金属の純度が低下し、貴金属の表面に
酸化膜が形成され、導通抵抗が大きくなるのを押
さえるためである。 但し、銀が90重量%を越え金または金とパラジ
ウムの合計が10重量%未満であると、溶融形成し
た合金の酸素遮断効果が弱まりニツケルが、850
℃の酸化雰囲気中での焼成時に酸化することによ
り導電性が損なわれるため、銀は90重量%以下
で、金または金とパラジウムは10重量%以上であ
ることが必要である。 次いで、貴金属層6が形成されたセラミツク基
板を熱処理する。熱処理温度は、貴金属層の成分
によるが、ニツケルの溶融温度である1450℃以下
であつて後記する第2の導体層の焼成温度に応じ
て選択されるが、貴金属層が溶融する960〜1400
℃、5〜30分で行う。 熱処理されたセラミツク基板1の貴金属層6お
よび絶縁層3上に、銀等を主成分とする厚膜導電
ペーストにより所要の回路パターンとなる第2の
導体層7を印刷する。第2の導体層は導電ペース
トに限られるものではなく、抵抗ペースト等必要
に応じて用いることができる。 次いで、印刷された第2の導体層を酸化雰囲気
で焼成して、セラミツク多層配線基板を得る。焼
成条件は厚膜ペーストの成分によるが700〜850
℃、50〜20分である。 実施例 セラミツク成分としてアルミナ90重量%の他、
シリカ、マグネシア等の添加物とポリビニールブ
チラール等の有機バインダーを混合し、ドクター
ブレード法により厚み0.8mmのセラミツクグリー
ンシートを作成後、そのセラミツクグリーンシー
ト上にタングステン粉末98重量%、シリカ2重量
%のメタライズ成分に印刷助剤を加えたメタライ
ズペーストを用いてスクリーン印刷により第1の
導体層を形成し、次いでセラミツクグリーンシー
トと同一の組成の絶縁ペーストを以つて前記の第
1の導体層の後記する第2の導体層と電気的に接
続するための直径0.5mmの開口部分を残してスク
リーン印刷により絶縁層を形成した後、露点35℃
の水素雰囲気中で昇温率300℃/時間、1550℃、
2時間保持後、降温率600℃/時間で焼結した。 次に、焼結したセラミツク基板の開口部の第1
の導体層上に、硼化水素浴系の無電解メツキによ
りニツケル厚3μ析出した。 次に、メツキしたセラミツク基板を水素雰囲気
中で1200℃、30分熱処理後、第1表に示す貴金属
組成のペーストを以つて印刷厚みが約30μになる
ようにスクリーン印刷し、水素雰囲気中960〜
1400℃、10〜30分それぞれの貴金属組成のペース
トの融点にあわせて、貴金属を溶かした。 次に、厚膜導電ペーストである銀―白金系ペー
スト(昭和化学製品番D―4021)および銀―パラ
ジウム系ペースト(昭和化学製品番D―4344)を
それぞれシルクスクリーン印刷した後、銀―白金
系ペースト(D―4021)を印刷したものは、空気
中で700℃、10分、銀―パラジウム系ペースト
(D―4344)を印刷したものは、空気中で850℃、
10分焼成し、第5図に示すように第1の導体層2
上に各々第2の導体層4,4を複数設けたセラミ
ツク多層配線基板を得た。 本発明と比較するため、上記のセラミツク多層
配線基板とは別に、第1の導体層2のみを形成し
たものと第1の導体層2上にニツケルメツキした
後熱処理したものとをそれぞれ上記のセラミツク
多層配線基板と同じ厚膜導電ペーストを以つて第
2の導体層を形成したものを作成した。 このようにして得られたセラミツク多層配線基
板の第2の導体層間の電気抵抗を測定した。その
結果を第1表に示す。
The present invention relates to a method for manufacturing ceramic multilayer wiring boards used in hybrid integrated circuit components. Conventionally, the first method for manufacturing hybrid integrated circuit boards has been
As shown in the figure, a first conductor layer 2 whose main component is a high melting point metal such as tungsten or molybdenum is formed on a ceramic green sheet 1, and an insulating layer 2 is formed on the first conductor layer 2 by opening a part of the conductor layer 2. After the layer 3 is printed and formed, it is fired in a reducing atmosphere, and then a thick film conductor paste such as silver is printed on the openings of the first conductor layer 2 and the insulating layer 3 and fired in an oxidizing atmosphere to form the second layer 3.
It is known that a ceramic multilayer wiring board can be obtained by forming a conductor layer 4 of. However, since the second conductor layer 4 is fired in an oxidizing atmosphere, the first conductor layer 2 is oxidized and its electrical resistance becomes high, making it unsuitable for use as a hybrid integrated circuit board. For this reason, attempts have been made to plate the openings of the first conductor layer 2 with an oxidation-resistant noble metal such as gold, or to make the composition of the first conductor layer 2 oxidation-resistant. However, with the plating method, the thickness of the gold plating cannot be adjusted.
Even if the thickness is 2μ, if the firing temperature of the thick film paste is 700℃ or higher, the first conductor layer will be oxidized and the first conductor layer will be oxidized.
Even if platinum was added to the conductor layer 2, if the firing temperature was increased to 650° C. or higher, the first conductor layer would be oxidized, making it unsuitable for use as a hybrid integrated circuit board. Therefore, there are restrictions on the selection of thick film pastes that can be used for the second conductor layer. The present invention has been made to eliminate the above-mentioned drawbacks, and is a ceramic multilayer structure obtained by firing a thick film conductor layer in an oxidizing atmosphere on a ceramic substrate provided with a conductor layer mainly composed of a high-melting point metal. In a method of manufacturing a wiring board, a conductor layer containing a high-melting point metal as a main component is plated with nickel, and then a noble metal layer containing 25 to 90% by weight of silver and 10 to 75% by weight of gold as a main component is formed on the nickel plating. but silver is 25~90
% by weight, the sum of gold and palladium is 10-75% by weight,
Furthermore, a ceramic multilayer wiring is produced by forming a noble metal layer containing palladium in a range of 30% by weight or less, melting the noble metal layer by heat treatment, printing a thick film conductor layer on the melted noble metal layer, and firing it in an oxidizing atmosphere. This is a method of manufacturing a substrate. The details of the present invention will be sequentially explained for each step of the method of the present invention according to the flowchart shown in FIG. 2 and the block diagram shown in FIG. First, a ceramic green sheet 1 containing alumina, beryllia, etc. as a main component is adjusted by a known doctor blade method or the like to prepare a ceramic green sheet 1 having dimensions required for a hybrid integrated circuit board. Next, a conductive paste whose main component is a high melting point metal such as tungsten or molybdenum, that is, a metal whose melting point is higher than the firing temperature of the ceramic green sheet 1 and whose electrical resistance is low, is prepared and applied as a screen onto the ceramic green sheet 1. The first conductor layer 2 having a desired circuit pattern is printed by printing or transfer printing. Next, an insulating layer 3 is formed on the first conductive layer 2 by screen printing or transfer printing with an insulating paste so that a part of the first conductive layer 2 is opened. The first conductor layer opened by the insulating layer 3 is for electrical connection with the second conductor layer as will be explained later. The insulating paste used has the same components as the ceramic green sheet. The number of the first conductor layer and the insulating layer is not limited to one layer, respectively. For example, as shown in FIG. 4, a plurality of conductor layers 2, 2 and a plurality of insulating layers 3, 3 may be used. In this case, the opening for electrically connecting the conductor layers is formed using the same component as the first conductor layer. The ceramic green sheet on which the first conductive layer and the insulating layer are printed is fired in a reducing atmosphere. The firing conditions are determined by the composition of the ceramic green sheet and the components of the high melting point metal paste, but the firing conditions are 1400℃.
5 minutes to 180 minutes at ~1800°C. After firing, a nickel plating layer 5 is formed by nickel plating on the first conductor layer 2 exposed in the opening of the insulating layer. The reason for nickel plating is to improve the wettability with precious metals, which will be explained later, and to improve the first conductor layer when firing the second conductor layer in an oxidizing atmosphere.
This is to prevent oxidation of the conductor layer. Therefore,
The thickness of the nickel plating may be selected depending on the type of noble metal, its heat treatment temperature, and the firing temperature of the second conductor layer, but is usually 1 to 5 microns. The selection of electrolytic and electroless plating methods for nickel plating is determined depending on whether or not a plating electrode is required. After nickel plating, heat treatment at 800 to 1200°C to improve the adhesion strength between the nickel plating layer and the first conductor layer.
Heat treatment may be performed in a reducing atmosphere for 5 to 30 minutes. Next, the main components are 90-25% by weight of silver and 10-75% by weight of gold.
The nickel-plated layer 5 is made of a noble metal layer 6 whose main component is a precious metal with a range of % by weight (including those in which part of gold is replaced with palladium of 30% by weight or less).
Form on top. The methods include simply placing a metal or alloy foil on the nickel plating layer, forming it by plating, and forming it using a printing paste. In the case of printing, the appropriate thickness is about 30μ. The reason why the precious metal components are specified above is that when the thick film conductive paste is melted in the subsequent process and then fired in an oxidizing atmosphere, if the silver content is 90% by weight or more, oxygen will be dissolved in the molten precious metal. This is because the oxygen barrier properties are impaired and the nickel plating surface is oxidized, increasing the conduction resistance.The reason why the main components other than silver are gold and palladium is that they are completely dissolved in silver, so oxygen in the silver is removed. This is because it has the effect of suppressing solid solution.
The reason why gold is 75% by weight and palladium is 30% by weight or less is because the underlying nickel dissolves into the precious metal during melting, reducing the purity of the precious metal, forming an oxide film on the surface of the precious metal, and increasing conduction resistance. This is to prevent this from happening. However, if the silver content exceeds 90% by weight, or the total amount of gold or gold and palladium is less than 10% by weight, the oxygen blocking effect of the melted alloy will be weakened, and the
Since conductivity is impaired due to oxidation during firing in an oxidizing atmosphere at ℃, the content of silver must be 90% by weight or less, and the content of gold or gold and palladium must be 10% by weight or more. Next, the ceramic substrate on which the noble metal layer 6 is formed is heat treated. The heat treatment temperature depends on the components of the precious metal layer, but is selected depending on the firing temperature of the second conductor layer, which is below 1450°C, which is the melting temperature of nickel, and will be described later, and is between 960°C and 1400°C, which is the temperature at which the noble metal layer melts.
℃ for 5 to 30 minutes. A second conductive layer 7 forming a desired circuit pattern is printed on the noble metal layer 6 and insulating layer 3 of the heat-treated ceramic substrate 1 using a thick film conductive paste containing silver or the like as a main component. The second conductive layer is not limited to a conductive paste, and a resistive paste or the like can be used as necessary. Next, the printed second conductor layer is fired in an oxidizing atmosphere to obtain a ceramic multilayer wiring board. The firing conditions depend on the ingredients of the thick film paste, but the temperature is 700 to 850.
°C, 50-20 minutes. Example In addition to 90% by weight of alumina as a ceramic component,
After mixing additives such as silica and magnesia with organic binders such as polyvinyl butyral and creating a ceramic green sheet with a thickness of 0.8 mm using the doctor blade method, 98% by weight of tungsten powder and 2% by weight of silica are placed on the ceramic green sheet. A first conductor layer is formed by screen printing using a metallization paste prepared by adding a printing aid to the metallization component of After forming an insulating layer by screen printing, leaving an opening with a diameter of 0.5 mm for electrical connection with the second conductor layer, the dew point is 35°C.
Temperature increase rate 300℃/hour, 1550℃ in hydrogen atmosphere,
After holding for 2 hours, sintering was performed at a cooling rate of 600°C/hour. Next, the first part of the opening of the sintered ceramic substrate is
A 3μ thick nickel layer was deposited on the conductor layer by electroless plating in a hydrogen boride bath. Next, the plated ceramic substrate was heat treated at 1200℃ for 30 minutes in a hydrogen atmosphere, and then screen printed with a paste having the noble metal composition shown in Table 1 to a printing thickness of about 30μ.
The noble metal was melted at 1400°C for 10 to 30 minutes to match the melting point of the paste with each noble metal composition. Next, after silk-screen printing silver-platinum paste (Showa Kagaku product number D-4021) and silver-palladium paste (Showa Kagaku product number D-4344), which are thick film conductive pastes, Those printed with paste (D-4021) were heated at 700℃ in air for 10 minutes, and those printed with silver-palladium paste (D-4344) were heated at 850℃ in air.
After baking for 10 minutes, the first conductor layer 2 is formed as shown in Figure 5.
A ceramic multilayer wiring board having a plurality of second conductor layers 4, 4 provided thereon was obtained. In order to compare with the present invention, in addition to the above ceramic multilayer wiring board, one in which only the first conductor layer 2 was formed and one in which the first conductor layer 2 was plated with nickel and then heat treated were prepared. A second conductor layer was formed using the same thick film conductive paste as the wiring board. The electrical resistance between the second conductor layers of the ceramic multilayer wiring board thus obtained was measured. The results are shown in Table 1.

【表】【table】

【表】 第1表から明らかなように、本発明によつて得
られるセラミツク多層配線基板は第2の導体層、
すなわち厚膜ペーストを以つて印刷、酸化雰囲気
中で焼成形成される回路パターンは、電気抵抗が
小さく、しかも方法が従来セラミツク多層配線基
板の製造に使用されている設備で容易に実施でき
る方法であつて、電子工業の発展に寄与する所大
なるものである。
[Table] As is clear from Table 1, the ceramic multilayer wiring board obtained by the present invention has a second conductor layer,
In other words, a circuit pattern formed by printing a thick film paste and firing it in an oxidizing atmosphere has a low electrical resistance, and the method can be easily implemented using the equipment conventionally used for manufacturing ceramic multilayer wiring boards. This is a major contribution to the development of the electronics industry.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のセラミツク多層配線基板の要部
断面図、第2図は本発明を説明するための工程フ
ローチヤート、第3図ないし第5図はそれぞれ本
発明によつて得られるセラミツク多層配線基板の
一実施例を示す要部断面図である。 1…セラミツク基板、2…第1の導体層、3…
絶縁層、4,7…第2の導体層、5…ニツケルメ
ツキ層、6…貴金属層。
FIG. 1 is a sectional view of a main part of a conventional ceramic multilayer wiring board, FIG. 2 is a process flowchart for explaining the present invention, and FIGS. 3 to 5 are ceramic multilayer wiring obtained by the present invention. FIG. 2 is a sectional view of a main part showing an example of a substrate. DESCRIPTION OF SYMBOLS 1... Ceramic substrate, 2... First conductor layer, 3...
Insulating layer, 4, 7... Second conductor layer, 5... Nickel plating layer, 6... Precious metal layer.

Claims (1)

【特許請求の範囲】 1 高融点金属を主成分とする導体層が設けられ
たセラミツク基板に厚膜導体層を酸化雰囲気で焼
成して得られるセラミツク多層配線基板の製造法
において、高融点金属を主成分とする導体層にニ
ツケルメツキし、次いでそのニツケルメツキ上に
主成分が銀25〜90重量%と、金が10〜75重量%の
範囲からなる貴金属層を形成後熱処理によりその
貴金属層を溶融し、その溶融された貴金属層上に
厚膜導体層を印刷し、酸化雰囲気で焼成すること
を特徴とするセラミツク多層配線基板の製造法。 2 高融点金属を主成分とする導体層が設けられ
たセラミツク基板に厚膜導体層を酸化雰囲気で焼
成して得られるセラミツク多層配線基板の製造法
において、高融点金属を主成分とする導体層にニ
ツケルメツキし、次いでそのニツケルメツキ上に
主成分が銀25〜90重量%、金とパラジウムの合計
が10〜75重量%、かつ、パラジウムが30重量%以
下の範囲からなる貴金属層を形成後熱処理により
その貴金属層を溶融し、その溶融された貴金属層
上に厚膜導体層を印刷し、酸化雰囲気で焼成する
ことを特徴とするセラミツク多層配線基板の製造
法。
[Claims] 1. In a method for manufacturing a ceramic multilayer wiring board obtained by firing a thick film conductor layer on a ceramic substrate provided with a conductor layer containing a high melting point metal in an oxidizing atmosphere, The conductor layer as the main component is plated with nickel, and then a noble metal layer containing 25 to 90% by weight of silver and 10 to 75% by weight of gold as the main components is formed on the nickel plated, and then the noble metal layer is melted by heat treatment. A method for manufacturing a ceramic multilayer wiring board, which comprises printing a thick film conductor layer on the molten noble metal layer and firing it in an oxidizing atmosphere. 2. In a method for manufacturing a ceramic multilayer wiring board obtained by firing a thick film conductor layer on a ceramic substrate provided with a conductor layer mainly composed of a high melting point metal in an oxidizing atmosphere, the conductor layer mainly composed of a high melting point metal is used. After forming a noble metal layer on the nickel plating, the main components of which are 25 to 90% by weight of silver, 10 to 75% by weight of gold and palladium in total, and 30% by weight or less of palladium, and then heat-treated. A method for manufacturing a ceramic multilayer wiring board, characterized by melting the noble metal layer, printing a thick film conductor layer on the melted noble metal layer, and firing it in an oxidizing atmosphere.
JP4427683A 1983-03-18 1983-03-18 Method of producing ceramic multilayer circuit board Granted JPS59171195A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4427683A JPS59171195A (en) 1983-03-18 1983-03-18 Method of producing ceramic multilayer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4427683A JPS59171195A (en) 1983-03-18 1983-03-18 Method of producing ceramic multilayer circuit board

Publications (2)

Publication Number Publication Date
JPS59171195A JPS59171195A (en) 1984-09-27
JPS6346595B2 true JPS6346595B2 (en) 1988-09-16

Family

ID=12686981

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4427683A Granted JPS59171195A (en) 1983-03-18 1983-03-18 Method of producing ceramic multilayer circuit board

Country Status (1)

Country Link
JP (1) JPS59171195A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0693545B2 (en) * 1988-12-23 1994-11-16 株式会社住友金属セラミックス Ceramic multilayer wiring board and manufacturing method thereof
JPH02252290A (en) * 1989-03-27 1990-10-11 Ngk Insulators Ltd Manufacture of multilayer wiring board
JPH0691318B2 (en) * 1989-05-01 1994-11-14 日本碍子株式会社 Ceramic multilayer wiring board
JPH0327590A (en) * 1989-06-23 1991-02-05 Ngk Insulators Ltd Ceramic circuit board

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4954859A (en) * 1972-09-27 1974-05-28
JPS5053863A (en) * 1973-09-12 1975-05-13
JPS51133766A (en) * 1975-05-14 1976-11-19 Ngk Spark Plug Co Method of forming thick film circuit components on ceramic substrate
JPS5651899A (en) * 1979-10-05 1981-05-09 Nippon Electric Co Method of manufacturing high density multilayer circuit board
JPS56130992A (en) * 1980-03-18 1981-10-14 Hitachi Ltd Method of producing thick film board
JPS5712600A (en) * 1980-06-27 1982-01-22 Hitachi Ltd Method of producing thick film multilayer circuit board
JPS5830194A (en) * 1981-08-14 1983-02-22 日本碍子株式会社 Ceramic multilayer circuit board and method of producing same

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4954859A (en) * 1972-09-27 1974-05-28
JPS5053863A (en) * 1973-09-12 1975-05-13
JPS51133766A (en) * 1975-05-14 1976-11-19 Ngk Spark Plug Co Method of forming thick film circuit components on ceramic substrate
JPS5651899A (en) * 1979-10-05 1981-05-09 Nippon Electric Co Method of manufacturing high density multilayer circuit board
JPS56130992A (en) * 1980-03-18 1981-10-14 Hitachi Ltd Method of producing thick film board
JPS5712600A (en) * 1980-06-27 1982-01-22 Hitachi Ltd Method of producing thick film multilayer circuit board
JPS5830194A (en) * 1981-08-14 1983-02-22 日本碍子株式会社 Ceramic multilayer circuit board and method of producing same

Also Published As

Publication number Publication date
JPS59171195A (en) 1984-09-27

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