JPH0617329Y2 - Flexible printed circuit board - Google Patents

Flexible printed circuit board

Info

Publication number
JPH0617329Y2
JPH0617329Y2 JP12950386U JP12950386U JPH0617329Y2 JP H0617329 Y2 JPH0617329 Y2 JP H0617329Y2 JP 12950386 U JP12950386 U JP 12950386U JP 12950386 U JP12950386 U JP 12950386U JP H0617329 Y2 JPH0617329 Y2 JP H0617329Y2
Authority
JP
Japan
Prior art keywords
fpc
test
printed circuit
circuit board
flexible printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP12950386U
Other languages
Japanese (ja)
Other versions
JPS6338358U (en
Inventor
公人 石見
Original Assignee
日立電子株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日立電子株式会社 filed Critical 日立電子株式会社
Priority to JP12950386U priority Critical patent/JPH0617329Y2/en
Publication of JPS6338358U publication Critical patent/JPS6338358U/ja
Application granted granted Critical
Publication of JPH0617329Y2 publication Critical patent/JPH0617329Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Tests Of Electronic Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Combinations Of Printed Boards (AREA)

Description

【考案の詳細な説明】 〔技術分野〕 本考案は電子機器に使用しているフレキシブルプリント
基板(以下FPC)の改善に関するものである。
[Detailed Description of the Invention] [Technical Field] The present invention relates to an improvement of a flexible printed circuit (FPC) used in electronic equipment.

〔従来技術とその問題点〕[Prior art and its problems]

電子機器の軽,薄,短,小,化に伴い紙のように薄く,
柔軟性があり又折曲可能なプリント基板として開発され
たのがFPCである。
As electronic devices become lighter, thinner, shorter, smaller, and thinner, they are as thin as paper,
The FPC was developed as a flexible and bendable printed circuit board.

しかしFPCは第3図の例に示すとおりその薄さ柔軟性
から基板がわん曲しやすく部品実装工程においてFPC
1に部品3を正常に実装できない上FPC1のプリント
パターンと部品3の電極及びリードを正常に接合できな
い。
However, as shown in the example of Fig. 3, the FPC is easily bent due to its thinness and flexibility.
In addition, the component 3 cannot be normally mounted on No. 1 and the print pattern of the FPC 1 and the electrodes and leads of the component 3 cannot be normally joined.

又試験作業においては部品が高密度実装されていること
基板がわん曲しやすいことから正規の試験ポイントに試
験治具4の試験用ピン5を正確に接触させることができ
ずまちがった試験ポイントに試験用ピン4が当り電気
的,機械的にFPC1及び部品3を破損してしまう。
Also, in the test work, since the components are mounted at a high density and the board is easily bent, the test pin 5 of the test jig 4 cannot be accurately brought into contact with the regular test point, and the test point may be incorrect. The test pin 4 hits and damages the FPC 1 and the component 3 electrically and mechanically.

これらのことから一般的には硬質基板2を下敷としこれ
にFPC1を貼合せて各種作業工程の効率向上を図る硬
質基板方式が広く採用されている。
From these facts, generally, a hard substrate system is widely adopted in which the hard substrate 2 is used as an underlay and the FPC 1 is attached thereto to improve the efficiency of various work processes.

しかし高密度実装されたFPCはこの中のプリントパタ
ーンも高密度配線されている。このため各試験ポイント
に接触させる治具4内の試験用ピン5同志が接触しやす
いことなどから試験用ピン5の設置本数が制約されFP
C単体としての十分な試験を実行することができず,総
合組立配線してから残りの試験を実行しなければならず
効率が低下すると共にFPC単体としての不良が早期に
発見できない。
However, in the FPC mounted in high density, the print pattern therein is also wired in high density. Therefore, the test pins 5 in the jig 4 that come into contact with each test point easily come into contact with each other, and thus the number of test pins 5 to be installed is restricted, and the FP is limited.
It is not possible to carry out a sufficient test as a C unit, and it is necessary to carry out the rest of the tests after comprehensive assembly and wiring, which reduces efficiency and makes it impossible to detect defects as a FPC unit at an early stage.

〔目的〕〔Purpose〕

本考案はFPCと硬質基板とからなるFPCにおいてF
PC内の信号ラインを集約した副FPCを前記FPCの
端に複数枚設け、副FPCに集約した信号ラインとこれ
に対応した硬質基板上のプリントパターンとを接合部で
導電体により接続し見掛上一体化のプリント基板とした
ことを特徴としその目的は部品を実装したFPCの試験
工程における試験精度の向上及び効率向上を図るもので
ある。
The present invention is applicable to an FPC including an FPC and a hard substrate.
A plurality of sub-FPCs that aggregate the signal lines in the PC are provided at the end of the FPC, and the signal lines aggregated in the sub-FPCs and the corresponding printed pattern on the hard board are connected by a conductor at the joints, and they are apparent. It is characterized in that it is an upper integrated printed circuit board, and its purpose is to improve the test accuracy and efficiency in the test process of the FPC on which the components are mounted.

〔実施例〕〔Example〕

以下第1図によって本考案の実施例について説明する。 An embodiment of the present invention will be described below with reference to FIG.

FPC1内の信号ライン6は高密度配線されている。前
記信号ライン6を副FPC7にプリントパターンにより
延長集約する。集約した信号ライン8とこれに対応した
試験用プリントパターン9を硬質基板2に設け接合部10
をはんだ及びジャンパー線等導電体により接続する。硬
質基板2に設けた試験用プリントパターン9は硬質基板
2の試験ポイント11まで拡散配線する,さらにその延長
線上にコネクター12を設ける。
The signal line 6 in the FPC 1 is wired with high density. The signal line 6 is extended and integrated in the sub FPC 7 by a print pattern. The integrated signal line 8 and the test print pattern 9 corresponding to the signal line 8 are provided on the hard substrate 2 and the joint portion 10 is provided.
Are connected by a conductor such as solder and jumper wires. The test print pattern 9 provided on the hard board 2 is diffused to the test point 11 on the hard board 2, and the connector 12 is provided on the extension line.

硬質基板2は従来プリントパターン化していないのでパ
ターン間隔を十分に広く取ることができ試験ポイントを
多く設定することが可能となる。又硬質基板2に設けた
コネクター12を使用することにより試験治具の試験用ピ
ンを大幅に削減することができる。
Since the hard substrate 2 is not conventionally formed into a print pattern, the pattern interval can be set sufficiently wide and many test points can be set. Further, by using the connector 12 provided on the hard substrate 2, the number of test pins of the test jig can be greatly reduced.

これにより従来高密度実装及び高密度配線に伴う試験治
具の試験用ピン同志の接触等から試験用ピンの設置本数
が制約されがちであったがこれが解決されるため試験精
度の向上が図れる試験終了後は切断部13を切断しFPC
1を取出す。
As a result, the number of test pins installed tended to be limited due to the contact of test pins of test jigs with high-density mounting and high-density wiring, but this can be solved and the test accuracy can be improved. After finishing, cut the cutting part 13 and FPC
Take 1 out.

第2図本考案の他の実施例を示す。FIG. 2 shows another embodiment of the present invention.

副FPC7を硬質基板2の端まで延長し副FPC7に集
約した信号ライン8も拡散延長してその先端にコネクタ
ーを設ける,これを硬質基板2にしっかり貼合せる,こ
とにより見掛上一体のプリント板コネクター12を形成す
る。試験用接栓14と前記プリント板コネクター12とで試
験信号を入出力する。これにより特殊治具を用意するこ
となく容易に試験可能となり治具費の低減及び試験精度
の向上が図れる。試験終了後切断部13を切断しFPC1
を取出す。
The sub FPC 7 is extended to the end of the hard substrate 2 and the signal line 8 gathered in the sub FPC 7 is also diffused and extended, and a connector is provided at the tip thereof. Form the connector 12. Test signals are input and output between the test connector 14 and the printed board connector 12. As a result, the test can be easily performed without preparing a special jig, and the jig cost can be reduced and the test accuracy can be improved. After the test, cut the cutting part 13 and cut the FPC1
Take out.

〔効果〕〔effect〕

以上説明したごとく本考案によれば,従来FPCへの部
品実装工程に重点をおいていた硬質基板の活用が試験工
程にまで拡大され試験精度の向上及び試験工程での効率
向上さらに治具製作費用の低減が図れる。
As described above, according to the present invention, the utilization of the rigid board, which has conventionally been focused on the component mounting process on the FPC, is expanded to the test process, and the test accuracy is improved, the efficiency in the test process is improved, and the jig manufacturing cost is increased. Can be reduced.

【図面の簡単な説明】[Brief description of drawings]

第3図は従来の例を示し(イ)は部品実装FPCと試験治
具の断面図,(ロ)は部品実装FPCと硬質基板の断面
図,第1図及び第2図は本考案の実施例によるFPCと
硬質基板の平面図である。 1:FPC,2:硬質基板,3:実装部品,4:試験治
具,5:試験用ピン,6:FPC内信号ライン,7:副
FPC,8:副FPCに集約した信号ライン,9:硬質
基板に設けたプリントパターン,10:パターン接続点,
11:試験ポイント,12:プリント板コネクター,13:切
断部,14:試験用接栓。
FIG. 3 shows a conventional example, (a) is a sectional view of a component mounting FPC and a test jig, (b) is a sectional view of a component mounting FPC and a hard substrate, and FIGS. 1 and 2 are the embodiments of the present invention. FIG. 6 is a plan view of an FPC and a rigid substrate according to an example. 1: FPC, 2: hard board, 3: mounted component, 4: test jig, 5: test pin, 6: FPC signal line, 7: sub-FPC, 8: signal line integrated in sub-FPC, 9: Printed pattern on hard board, 10: pattern connection points,
11: Test point, 12: Printed board connector, 13: Cut part, 14: Test plug.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】フレキシブルプリント基板と硬質基板とか
らなるFPCにおいてFPC内の電源ライン、アースラ
イン、各種信号ライン(以下信号ライン)を集約した副
FPCを前記フレキシブルプリント基板の端に設け、副
FPCに集約した信号ラインとこれに対応した硬質基板
上のプリントパターンを接合部で導電体により接続し見
掛上一体化のプリント基板としたことを特徴としたFP
C。
1. An FPC comprising a flexible printed circuit board and a rigid substrate, wherein a sub-FPC in which a power line, an earth line, and various signal lines (hereinafter referred to as signal lines) in the FPC are integrated is provided at an end of the flexible printed circuit board. The FP characterized in that the signal line aggregated in 1) and the corresponding printed pattern on the hard substrate are connected by a conductor at the joint to form a seemingly integrated printed circuit board.
C.
JP12950386U 1986-08-27 1986-08-27 Flexible printed circuit board Expired - Lifetime JPH0617329Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12950386U JPH0617329Y2 (en) 1986-08-27 1986-08-27 Flexible printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12950386U JPH0617329Y2 (en) 1986-08-27 1986-08-27 Flexible printed circuit board

Publications (2)

Publication Number Publication Date
JPS6338358U JPS6338358U (en) 1988-03-11
JPH0617329Y2 true JPH0617329Y2 (en) 1994-05-02

Family

ID=31026129

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12950386U Expired - Lifetime JPH0617329Y2 (en) 1986-08-27 1986-08-27 Flexible printed circuit board

Country Status (1)

Country Link
JP (1) JPH0617329Y2 (en)

Also Published As

Publication number Publication date
JPS6338358U (en) 1988-03-11

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