JPH06138669A - Pattern forming method - Google Patents

Pattern forming method

Info

Publication number
JPH06138669A
JPH06138669A JP28853092A JP28853092A JPH06138669A JP H06138669 A JPH06138669 A JP H06138669A JP 28853092 A JP28853092 A JP 28853092A JP 28853092 A JP28853092 A JP 28853092A JP H06138669 A JPH06138669 A JP H06138669A
Authority
JP
Japan
Prior art keywords
pattern
resist
resin
forming method
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28853092A
Other languages
Japanese (ja)
Inventor
Masataka Endo
政孝 遠藤
Masaru Sasako
勝 笹子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP28853092A priority Critical patent/JPH06138669A/en
Publication of JPH06138669A publication Critical patent/JPH06138669A/en
Pending legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00Nanotechnology for materials or surface science, e.g. nanocomposites
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Composite Materials (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)

Abstract

PURPOSE:To form a resist pattern with good shape by clarifying the contrast between an exposing part and an unexposing part at the time of sillylation. CONSTITUTION:On a substrate 1, a resist 2 consisting of naphthoquinone diazide and a resin is applied, and then a heating process for bridging mutual resins or naphthoquinone diazide and the resin, a pattern exposure process using a desired mask 4, a process for forming a mono-molecular layer containing Si on a pattern exposing part of the resist 2 and a process for forming a resist pattern 2A by selectively developing the resist 2 by dry etching are executed to form a pattern. By sillylation in which the contrast between the exposing part and the unexposing part is clarified, the pattern forming with good shape is realized and thereby an industrial production of the device in good yield is attained.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体製造工程のうちの
微細パターン形成方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fine pattern forming method in a semiconductor manufacturing process.

【0002】[0002]

【従来の技術】従来、微細パターン形成方法として、ナ
フトキノンジアジドと樹脂よりなるレジストの表面のみ
を用いる高解像パターン形成としてのレジストのシリル
化とO 2エッチングによる方法が提唱されている(たと
えば、F.Coopmans et al., Proc. of SPIE, vol.631,
p.34 (1986))。ところが、この方法では、未露光部も
シリル化されるために、パターンの形状が劣化するとい
う問題が発生することがある。
2. Description of the Related Art Conventionally, a fine pattern forming method has been
Only the resist surface consisting of futoquinone diazide and resin
Of resist for high-resolution pattern formation using TiO2
And O 2Etching method has been proposed (tato
For example, F. Coopmans et al., Proc. Of SPIE, vol.631,
p.34 (1986)). However, with this method, unexposed areas
It is said that the pattern shape deteriorates due to silylation.
Problems may occur.

【0003】以下図面を参照しながら、上記した従来の
パターン形成方法の一例について説明する。
An example of the conventional pattern forming method described above will be described below with reference to the drawings.

【0004】(図2)は従来のパターン形成方法の工程
断面図を示すものである。基板1上に、ナフトキノンジ
アジドと樹脂よりなるレジスト(日本合成ゴム製PLA
SMASK301−U)2を1.5ミクロン塗布形成す
る(図2(a))。マスク4を介してKrFエキシマレ
ーザステッパ(NA0.42)にて露光5を行う(図2
(b))。そして、ヘキサメチルジシラザンにて180
゜C90秒の処理6を行う(図2(c))。O2RIE
7にて未露光部を除去して、パターン2Cを形成する
(図2(d))。ところが、未露光部2Dもシリル化さ
れたために、O2RIEにより2Dが完全に除去できず
パターンの劣化がみられた。このような劣化したパター
ンは、後の工程での不良につながり、結局素子の歩留り
低下の要因になった。
FIG. 2 is a process sectional view of a conventional pattern forming method. A resist composed of naphthoquinonediazide and resin (PLA manufactured by Japan Synthetic Rubber) is formed on the substrate 1.
SMASK301-U) 2 is formed by coating 1.5 μm (FIG. 2 (a)). Exposure 5 is performed using a KrF excimer laser stepper (NA 0.42) through the mask 4 (see FIG. 2).
(B)). And 180 with hexamethyldisilazane
Processing 6 of 90 ° C. is performed (FIG. 2 (c)). O 2 RIE
The unexposed portion is removed at 7 to form a pattern 2C (FIG. 2D). However, since the unexposed portion 2D was also silylated, the 2D could not be completely removed by O 2 RIE, and the pattern was deteriorated. Such a deteriorated pattern leads to a defect in a later process and eventually causes a reduction in the yield of the device.

【0005】[0005]

【発明が解決しようとする課題】本発明は上記問題点に
鑑み、レジスト未露光部のシリル化を防止して、シリル
化法の特徴を生かした微細パターン形成方法を提供する
ものである。
SUMMARY OF THE INVENTION In view of the above problems, the present invention provides a fine pattern forming method which prevents silylation of a resist unexposed area and makes full use of the characteristics of the silylation method.

【0006】[0006]

【課題を解決するための手段】上記問題点を解決するた
めに本発明のパターン形成方法は、樹脂同士またはナフ
トキノンジアジドと樹脂が架橋するような加熱を行なう
工程を新たに備えたものである。
In order to solve the above problems, the pattern forming method of the present invention newly includes a step of heating such that the resins or the naphthoquinonediazide and the resin are crosslinked.

【0007】すなはち、本発明は、基板上に、ナフトキ
ノンジアジドと樹脂よりなるレジストを塗布し、樹脂同
士またはナフトキノンジアジドと樹脂が架橋するような
加熱を行なう工程と、所望のマスクを用いてパターン露
光を行う工程と、前記レジストのパターン露光部にSi
を含む単分子層を形成する工程と、前記レジストを選択
的にドライエッチングにより現像してレジストパターン
を形成する工程とを備えたことを特徴とするパターン形
成方法である。
That is, according to the present invention, a step of applying a resist consisting of naphthoquinone diazide and a resin on a substrate and performing heating so that the resins or the naphthoquinone diazide and the resin are crosslinked, and a desired mask are used. A step of performing pattern exposure, and Si on the pattern exposed portion of the resist.
And a step of forming a resist layer by selectively developing the resist by dry etching to form a resist pattern.

【0008】[0008]

【作用】本発明は上記した方法によって、レジスト膜の
形成時に、レジスト中の樹脂同士またはナフトキノンジ
アジドと樹脂が架橋するような加熱を行なうことにより
非常に効率良くレジストの未露光部を架橋させるため
に、レジストの未露光部のシリル化反応を防止し、露光
部のみがシリル化され、結局O2エッチングにより未露
光部が完全に除去され、形状のよい微細パターンが形成
できる。
According to the present invention, when the resist film is formed by the above-mentioned method, the unexposed portions of the resist are crosslinked very efficiently by performing heating so that the resins in the resist or the naphthoquinonediazide and the resin are crosslinked. Moreover, the silylation reaction of the unexposed portion of the resist is prevented, only the exposed portion is silylated, and the unexposed portion is completely removed by O 2 etching, so that a fine pattern having a good shape can be formed.

【0009】[0009]

【実施例】以下本発明の一実施例のパターン形成方法に
ついて、図面を参照しながら説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A pattern forming method according to an embodiment of the present invention will be described below with reference to the drawings.

【0010】(図1)は本発明の実施例におけるパター
ン形成方法を示すものである。半導体基板1上に、ナフ
トキノンジアジドと樹脂よりなるレジスト(日本合成ゴ
ム製PLASMASK301−U)2を1.5ミクロン
塗布し(図1(a))、130℃90秒の加熱3を行な
う(図1(b))。マスク4を介してKrFエキシマレ
ーザステッパ(NA0.42)にて露光5を行う(図1
(c))。そして、レジスト2の表面にSiを含む単分
子層を形成する処理を行なう。たとえば、ヘキサメチル
ジシラザン蒸気6にて180゜C90秒の処理を行う
(図1(d))。O2RIE7にて未露光部2Bを除去
して、パターン2Aを形成する(図1(e))。レジス
ト塗布後の加熱による未露光部の架橋により、未露光部
2Bはシリル化されなかったために、O2RIEにより
完全に選択的に露光部パターン2Aのみが残るようにド
ライ現像された。これにより、パターン2Aは、パター
ンのつながりなどない形状のよい0.25μmパターンを得
ることができた。
FIG. 1 shows a pattern forming method in an embodiment of the present invention. On the semiconductor substrate 1, a resist (PLASMASK301-U made by Japan Synthetic Rubber) 2 composed of naphthoquinonediazide and a resin is applied in a thickness of 1.5 μm (FIG. 1 (a)), and heating 3 at 130 ° C. for 90 seconds is performed (FIG. 1). (B)). Exposure 5 is performed using a KrF excimer laser stepper (NA 0.42) through the mask 4 (see FIG. 1).
(C)). Then, a process for forming a monomolecular layer containing Si on the surface of the resist 2 is performed. For example, a treatment with hexamethyldisilazane vapor 6 at 180 ° C. for 90 seconds is performed (FIG. 1 (d)). The unexposed portion 2B is removed by O 2 RIE7 to form a pattern 2A (FIG. 1 (e)). Since the unexposed portion 2B was not silylated due to the crosslinking of the unexposed portion due to the heating after the application of the resist, it was completely selectively dry-developed by O 2 RIE so that only the exposed portion pattern 2A remained. As a result, the pattern 2A could be a 0.25 μm pattern having a good shape with no pattern connection.

【0011】なお、この加熱は、樹脂同士またはナフト
キノンジアジドと樹脂が架橋するような温度・時間であ
れば、任意であり、たとえば、温度は130℃程度、時
間は90秒程度が挙げられるが、この限りではない。こ
の加熱によるパターン露光の露光部への架橋の影響はパ
ターン露光のエネルギーの方が高いために無視できる。
シリル化の方法としては、塗布または蒸着が挙げられ
る。シリル化の材料としては、ジシラザン化合物(たと
えば、ヘキサメチルジシラザン、テトラメチルジシラザ
ンなど)、トリシラザン化合物が挙げられるが、これら
の限りではない。樹脂としては、ノボラック樹脂、フェ
ノール樹脂などが挙げられるが、これらの限りではな
い。
The heating is optional as long as the temperature and time are such that the resins or the naphthoquinonediazide and the resin are crosslinked. For example, the temperature is about 130 ° C. and the time is about 90 seconds. Not limited to this. The influence of the crosslinking on the exposed portion of the pattern exposure due to this heating can be ignored because the energy of the pattern exposure is higher.
Examples of the silylation method include coating and vapor deposition. Examples of silylation materials include, but are not limited to, disilazane compounds (eg, hexamethyldisilazane, tetramethyldisilazane, etc.) and trisilazane compounds. Examples of resins include, but are not limited to, novolac resins and phenol resins.

【0012】[0012]

【発明の効果】以上のように本発明は、レジスト膜形成
時にレジスト中の樹脂同士またはナフトキノンジアジド
と樹脂が架橋するような加熱を行なうことにより、形状
のよいパターンを形成でき、半導体素子の歩留り向上に
大きく寄与するものである。
As described above, according to the present invention, a pattern having a good shape can be formed by heating such that the resins in the resist or the naphthoquinonediazide and the resin are crosslinked during the formation of the resist film, and the yield of semiconductor elements can be improved. It greatly contributes to the improvement.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例におけるパターン形成方法の工
程断面図
FIG. 1 is a process sectional view of a pattern forming method in an embodiment of the present invention.

【図2】従来のパターン形成方法の工程断面図FIG. 2 is a process sectional view of a conventional pattern forming method.

【符号の説明】[Explanation of symbols]

1 基板 2 レジスト 3 加熱 4 マスク 5 KrFエキシマレーザ光 6 ヘキサメチルジシラザン蒸気 7 O2RIE 2A,2C パターン 2B,2D 未露光部1 substrate 2 resist 3 heating 4 mask 5 KrF excimer laser light 6 hexamethyldisilazane vapor 7 O 2 RIE 2A, 2C patterns 2B, 2D unexposed part

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】基板上に、ナフトキノンジアジドと樹脂よ
りなるレジストを塗布し、樹脂同士またはナフトキノン
ジアジドと樹脂が架橋するような加熱を行なう工程と、
所望のマスクを用いてパターン露光を行う工程と、前記
レジストのパターン露光部にSiを含む単分子層を形成
する工程と、前記レジストを選択的にドライエッチング
により現像してレジストパターンを形成する工程とを備
えたことを特徴とするパターン形成方法。
1. A step of applying a resist comprising naphthoquinone diazide and a resin on a substrate and performing heating so that the resins or the naphthoquinone diazide and the resin are cross-linked.
A step of pattern exposure using a desired mask, a step of forming a monomolecular layer containing Si in the pattern exposed portion of the resist, and a step of selectively developing the resist by dry etching to form a resist pattern And a pattern forming method comprising:
JP28853092A 1992-10-27 1992-10-27 Pattern forming method Pending JPH06138669A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28853092A JPH06138669A (en) 1992-10-27 1992-10-27 Pattern forming method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28853092A JPH06138669A (en) 1992-10-27 1992-10-27 Pattern forming method

Publications (1)

Publication Number Publication Date
JPH06138669A true JPH06138669A (en) 1994-05-20

Family

ID=17731438

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28853092A Pending JPH06138669A (en) 1992-10-27 1992-10-27 Pattern forming method

Country Status (1)

Country Link
JP (1) JPH06138669A (en)

Similar Documents

Publication Publication Date Title
JPH0745510A (en) Pattern forming method
JPH06267843A (en) Pattern forming method
JPH06138669A (en) Pattern forming method
KR100275661B1 (en) Method for photoresist pattern used silylation
JPH11204414A (en) Pattern formation method
JPH02156244A (en) Pattern forming method
KR20010037049A (en) Lithography method using silylation
JPH02181910A (en) Formation of resist pattern
JPH02271359A (en) Method for hardening positive type photoresist by silylation
JPH05303211A (en) Pattern forming method
JPH0385544A (en) Resist pattern forming method
KR100284026B1 (en) Fine pattern formation method using sillation
US20080090180A1 (en) Method of fabricating semiconductor device
KR100380274B1 (en) Method for forming etching silicon oxide layer using DUV process
JPH036566A (en) Pattern forming method by excimer laser
JPH07142323A (en) Resist pattern formation method
JPS61209442A (en) Formation of pattern
JPH05304086A (en) Pattern forming method
JPH0513325A (en) Pattern formation method
JPS58145126A (en) Manufacture of semiconductor device
JPH03101218A (en) Formation of resist pattern
JPH11307525A (en) Semiconductor device and its manufacture
JPH01102459A (en) Pattern forming method
JPH03188447A (en) Formation of resist pattern
JPS61121332A (en) Pattern forming method