JPH05304086A - Pattern forming method - Google Patents

Pattern forming method

Info

Publication number
JPH05304086A
JPH05304086A JP10964992A JP10964992A JPH05304086A JP H05304086 A JPH05304086 A JP H05304086A JP 10964992 A JP10964992 A JP 10964992A JP 10964992 A JP10964992 A JP 10964992A JP H05304086 A JPH05304086 A JP H05304086A
Authority
JP
Japan
Prior art keywords
pattern
resist
forming
forming method
far
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10964992A
Other languages
Japanese (ja)
Inventor
Masataka Endo
政孝 遠藤
Kazuhiro Yamashita
一博 山下
Masaru Sasako
勝 笹子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10964992A priority Critical patent/JPH05304086A/en
Publication of JPH05304086A publication Critical patent/JPH05304086A/en
Pending legal-status Critical Current

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  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To form a resist pattern excellent in shape by a method wherein an exposed part and an unexposed part is made clear in contrast at silylation. CONSTITUTION:A resist 2 is formed on a substrate 1 and exposed to light using a mask of required pattern, far-ultraviolet rays are made to irradiate the resist 2 to form an Si-containing monomolecular layer on the pattern-exposed part of the resist 2, and then the resist 2 is selectively developed by etching for the formation of a resist pattern. Contrast between the exposed part and the unexposed part is made clear at sililation, a pattern of excellent shape can be formed, and consequently a device can be manufactured high in yield.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体製造工程のうちの
微細パターン形成方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fine pattern forming method in a semiconductor manufacturing process.

【0002】[0002]

【従来の技術】従来、微細パターン形成方法として、レ
ジストの表面のみを用いる高解像パターン形成としての
レジストのシリル化(Siを含む単分子層形成)とO2
エッチングによる方法が提唱されている。(たとえば、
F.Coopmans et al., Proc. ofSPIE, vol.631, p.34 (19
86))ところが、この方法では、未露光部もシリル化さ
れるために、パターンの形状が劣化するという問題が発
生することがある。
2. Description of the Related Art Conventionally, as a method for forming a fine pattern, silylation of a resist (formation of a monomolecular layer containing Si) and O 2 for forming a high resolution pattern using only the surface of a resist.
A method by etching has been proposed. (For example,
F. Coopmans et al., Proc. Of SPIE, vol.631, p.34 (19
86)) However, in this method, there is a problem that the pattern shape is deteriorated because the unexposed portion is silylated.

【0003】以下図面を参照しながら、上記した従来の
パターン形成方法の一例について説明する。
An example of the above-mentioned conventional pattern forming method will be described below with reference to the drawings.

【0004】(図2)は従来のパターン形成方法の工程
断面図を示すものである。基板1上に、レジスト(日本
合成ゴム製PLASMASK301−U)2を1.5ミ
クロン塗布形成する(図2(a))。マスク3を介して
KrFエキシマレーザステッパ(NA0.42)にて露
光4を行う(図2(b))。この後、180゜C60秒
の加熱8を行う(図2(c))。そして、ヘキサメチル
ジシラザンの蒸気6を180゜C90秒の加熱7により
露光部のシリル化処理を行う(図2(d))。O2RI
Eにて未露光部を除去して、パターン2Cを形成する
(図2(e))。ところが、未露光部2Dもシリル化さ
れたために、O2RIEにより2Dが完全に除去できず
パターンの劣化がみられた。このような劣化したパター
ンは、後の工程での不良につながり、結局素子の歩留り
低下の要因になった。
FIG. 2 is a process sectional view of a conventional pattern forming method. A resist (PLASMASK301-U made by Nippon Synthetic Rubber) 2 is applied and formed on the substrate 1 by 1.5 μm (FIG. 2 (a)). Exposure 4 is performed using a KrF excimer laser stepper (NA 0.42) through the mask 3 (FIG. 2B). Then, heating 8 at 180 ° C. for 60 seconds is performed (FIG. 2 (c)). Then, the vapor 6 of hexamethyldisilazane is heated at 180 ° C. for 90 seconds to perform silylation treatment on the exposed portion (FIG. 2 (d)). O 2 RI
The unexposed portion is removed at E to form a pattern 2C (FIG. 2E). However, since the unexposed portion 2D was also silylated, the 2D could not be completely removed by O 2 RIE, and the pattern was deteriorated. Such a deteriorated pattern leads to a defect in a later process and eventually causes a reduction in the yield of the device.

【0005】[0005]

【発明が解決しようとする課題】上記のような構成で
は、パターンの不良により、半導体素子の歩留り低下の
要因となるという問題点を有していた。
The above-mentioned structure has a problem that a defective pattern causes a reduction in the yield of semiconductor devices.

【0006】[0006]

【課題を解決するための手段】すなわち、本発明のパタ
ーン形成方法は、パターン露光後に加熱する工程のかわ
りに遠紫外光をシリル化前に全面照射する工程を備えた
ものである。
That is, the pattern forming method of the present invention comprises a step of irradiating the entire surface with far-ultraviolet light before silylation, instead of the step of heating after pattern exposure.

【0007】本発明は上記問題点に鑑み、レジスト未露
光部のシリル化を防止して、シリル化法の特徴を生かし
た微細パターン形成方法を提供するものである。すなわ
ち、本発明は、基板上に、レジストを形成する工程と、
所望のマスクを用いてパターン露光を行う工程と、前記
レジストに前記パターン露光よりもエネルギーの低い遠
紫外光を全面照射する工程と、前記レジストのパターン
露光部にSiを含む単分子層(シリル化)を形成する工
程と、前記レジストを選択的にドライエッチングにより
現像してレジストパターンを形成する工程とを備えたこ
とを特徴とするパターン形成方法である。
In view of the above problems, the present invention provides a fine pattern forming method which prevents silylation of a resist unexposed area and makes the best use of the characteristics of the silylation method. That is, the present invention comprises a step of forming a resist on a substrate,
Pattern exposing using a desired mask, irradiating the resist with far-ultraviolet light having lower energy than the pattern exposing, and exposing the resist pattern exposed portion to a monomolecular layer containing Si (silylation ) Is formed, and the resist is selectively developed by dry etching to form a resist pattern.

【0008】[0008]

【作用】本発明は上記した構成によって、遠紫外光がレ
ジストのパターン露光の未露光部を架橋させるために、
シリル化の未露光部への反応を防止し、露光部のみがシ
リル化され、結局O2エッチングにより形状のよい微細
パターンが形成できる。なお、遠紫外光によるパターン
露光の露光部への架橋の影響はパターン露光のエネルギ
ーの方が高いために無視できる。すなわち、従来加熱に
より未露光部の架橋を行っていたが、遠紫外光の方が架
橋させる効率がよく、また、露光部を架橋させないとい
う選択性に優れていることを本発明者らは見いだした。
According to the present invention, since the far ultraviolet light cross-links the unexposed portion of the resist pattern-exposed by the above-mentioned constitution,
The reaction of the silylation to the unexposed area is prevented, and only the exposed area is silylated, so that a fine pattern having a good shape can be formed by O 2 etching. The influence of crosslinking on the exposed portion of the pattern exposure by far ultraviolet light can be ignored because the energy of the pattern exposure is higher. That is, although the non-exposed portion was conventionally cross-linked by heating, the present inventors have found that far-ultraviolet light has a higher efficiency of cross-linking and that the exposed portion is not cross-linked. It was

【0009】[0009]

【実施例】以下本発明の一実施例のパターン形成方法に
ついて、図面を参照しながら説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A pattern forming method according to an embodiment of the present invention will be described below with reference to the drawings.

【0010】(図1)は本発明の実施例におけるパター
ン形成方法を示すものである。半導体等の基板1上に、
レジスト(たとえば日本合成ゴム製PLASMASK3
01−U)2を1.5ミクロン塗布形成する(図1
(a))。マスク3を介してKrFエキシマレーザステ
ッパ(NA0.42)にて露光4を行う(図1
(b))。この後、ArF光5を10mJ/cm2全面
に照射する(図1(c))。そして、ヘキサメチルジシ
ラザンの蒸気6を180゜C90秒の加熱7により露光
部のシリル化処理を行う(図1(d))。すなわち、こ
の工程にて、レジスト2の露光部はシリル化されSiを
含む単分子層が形成される。O2RIEにて未露光部2
Bを除去して、パターン2Aを形成する(図1
(e))。以上の方法では、ArF光5によるレジスト
2の未露光部2Bの架橋により、未露光部2Bはシリル
化されなかったために、O2RIEにより完全に選択的
にパターン2Aのみが残るようにドライ現像された。こ
れにより、パターン2Aは、パターンのつながりなどな
い形状のよい0.25μmパターンだった。遠紫外光として
は、水銀ランプによる光あるいはArFレーザ光などが
挙げられる。シリル化の方法としては、塗布または蒸着
が挙げられる。シリル化の材料としては、ジシラザン、
トリシラザン化合物が挙げられる。
FIG. 1 shows a pattern forming method in an embodiment of the present invention. On a substrate 1 such as a semiconductor,
Resist (for example, PLASMASK3 made by Japan Synthetic Rubber)
01-U) 2 is formed by coating 1.5 μm (FIG. 1).
(A)). Exposure 4 is performed using a KrF excimer laser stepper (NA 0.42) through the mask 3 (see FIG. 1).
(B)). After that, ArF light 5 is applied to the entire surface at 10 mJ / cm 2 (FIG. 1C). Then, the vapor 6 of hexamethyldisilazane is heated at 180 ° C. for 90 seconds to silylate the exposed portion (FIG. 1 (d)). That is, in this step, the exposed portion of the resist 2 is silylated to form a monomolecular layer containing Si. Unexposed area 2 by O 2 RIE
B is removed to form pattern 2A (see FIG. 1).
(E)). In the above method, since the unexposed portion 2B of the resist 2 was not crosslinked by the cross-linking of the unexposed portion 2B with the ArF light 5, the dry development was performed so that only the pattern 2A remained completely selectively by O 2 RIE. Was done. As a result, the pattern 2A was a 0.25 μm pattern having a good shape without any pattern connection. Examples of the far-ultraviolet light include light from a mercury lamp or ArF laser light. Examples of the silylation method include coating and vapor deposition. As the silylation material, disilazane,
Trisilazane compounds may be mentioned.

【0011】[0011]

【発明の効果】以上のように本発明は、加熱のかわりに
遠紫外光をシリル化前に照射することにより、形状のよ
いパターンを形成でき、素子の歩留り向上につながっ
た。
As described above, according to the present invention, a pattern having a good shape can be formed by irradiating far-ultraviolet light before silylation instead of heating, which leads to an improvement in device yield.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例におけるパターン形成方法の工
程断面図
FIG. 1 is a process sectional view of a pattern forming method in an embodiment of the present invention.

【図2】従来のパターン形成方法の工程断面図FIG. 2 is a process sectional view of a conventional pattern forming method.

【符号の説明】[Explanation of symbols]

1 基板 2 レジスト 3 マスク 4 KrFエキシマレーザ光 5 ArF光 6 ヘキサメチルジシラザン蒸気 7 加熱 8 加熱 2A,2C パターン 2B,2D 未露光部 1 substrate 2 resist 3 mask 4 KrF excimer laser light 5 ArF light 6 hexamethyldisilazane vapor 7 heating 8 heating 2A, 2C patterns 2B, 2D unexposed area

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】基板上に、レジストを形成する工程と、所
望のマスクを用いてパターン露光を行う工程と、前記レ
ジストに遠紫外光を全面照射する工程と、前記レジスト
のパターン露光部にSiを含む単分子層を形成する工程
と、前記レジストを選択的にドライエッチングにより現
像してレジストパターンを形成する工程とを備えたこと
を特徴とするパターン形成方法。
1. A step of forming a resist on a substrate, a step of performing pattern exposure using a desired mask, a step of irradiating the resist with far-ultraviolet light over the entire surface, and a pattern-exposed portion of the resist containing Si. A method for forming a pattern, comprising: a step of forming a monomolecular layer containing: and a step of selectively developing the resist by dry etching to form a resist pattern.
【請求項2】遠紫外光が、水銀ランプによる光あるいは
ArFレーザ光によることを特徴とする請求項1記載の
パターン形成方法。
2. The pattern forming method according to claim 1, wherein the far-ultraviolet light is light from a mercury lamp or ArF laser light.
【請求項3】単分子層を形成する方法が、塗布または蒸
着によることを特徴とする請求項1記載のパターン形成
方法。
3. The pattern forming method according to claim 1, wherein the method for forming the monomolecular layer is coating or vapor deposition.
【請求項4】Siを含む単分子層を形成する材料が、ジ
シラザン、トリシラザン化合物であることを特徴とする
請求項1記載のパターン形成方法。
4. The pattern forming method according to claim 1, wherein the material forming the monomolecular layer containing Si is a disilazane or trisilazane compound.
JP10964992A 1992-04-28 1992-04-28 Pattern forming method Pending JPH05304086A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10964992A JPH05304086A (en) 1992-04-28 1992-04-28 Pattern forming method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10964992A JPH05304086A (en) 1992-04-28 1992-04-28 Pattern forming method

Publications (1)

Publication Number Publication Date
JPH05304086A true JPH05304086A (en) 1993-11-16

Family

ID=14515645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10964992A Pending JPH05304086A (en) 1992-04-28 1992-04-28 Pattern forming method

Country Status (1)

Country Link
JP (1) JPH05304086A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100265588B1 (en) * 1993-11-17 2000-09-15 김영환 Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100265588B1 (en) * 1993-11-17 2000-09-15 김영환 Manufacture of semiconductor device

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