JPH11204414A - Pattern formation method - Google Patents

Pattern formation method

Info

Publication number
JPH11204414A
JPH11204414A JP752398A JP752398A JPH11204414A JP H11204414 A JPH11204414 A JP H11204414A JP 752398 A JP752398 A JP 752398A JP 752398 A JP752398 A JP 752398A JP H11204414 A JPH11204414 A JP H11204414A
Authority
JP
Japan
Prior art keywords
resist
substrate
film
resist film
lift
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP752398A
Other languages
Japanese (ja)
Inventor
Kazuto Noguchi
一人 野口
Isamu Odaka
勇 小高
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP752398A priority Critical patent/JPH11204414A/en
Publication of JPH11204414A publication Critical patent/JPH11204414A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a pattern formation method wherein stencil form is surely formed and lift-off process and peeling of substrates are easily performed, related to a method for forming geometric metal film on a substrate by lift-off method. SOLUTION: A lower layer resist film 13 is formed on a substrate 1, ultraviolet ray 4 is projected to raise development speed or the tower layer resist film 13, and then an upper layer resist film 14 is formed and the ultraviolet ray 4 is projected through a photo-mask 3, after that, the resist films 13 and 14 are developed in a developing liquid to form a stencil form 6.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電子デバイスや光
デバイスを作製する上で必要となるパターン形成法に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pattern forming method required for manufacturing an electronic device or an optical device.

【0002】[0002]

【従来の技術】基板上に図形状の金属膜を形成する方法
としてステンシル形状を持つレジストを用いたリフトオ
フ法がある。ここに、「リフトオフ法」とは、基板上の
図形状レジスト膜をマスクとして金属を基板上に蒸着し
た後、そのレジスト膜を溶媒に溶かして、レジスト膜と
その上に堆積している金属とを基板から除去して、基板
上に図形状の金属膜を残す方法を意味する。さらに、
「ステンシル形状」とは、上記図形状レジスト膜の開口
部の形状であって、後に説明する図1〜4における6で
示されるように、開口部の周縁が、ひさし状にせり出し
ていることを特徴とする形状のことである。このステン
シル形状が開口部のレジスト壁面に金属が蒸着されない
部分を作り、その部分からの溶媒によるレジスト膜の除
去、すなわちリフトオフ工程を可能にする。このリフト
オフ法は、ドライエッチング法やウエットエッチング法
がプロセス上適用し難い場合において、比較的簡単なプ
ロセスとして採用できる。
2. Description of the Related Art A lift-off method using a resist having a stencil shape is known as a method of forming a metal film having a figure shape on a substrate. Here, the `` lift-off method '' means that a metal is deposited on a substrate using a diagrammatic resist film on the substrate as a mask, and then the resist film is dissolved in a solvent to form a resist film and a metal deposited thereon. Is removed from the substrate to leave a metal film having a figure shape on the substrate. further,
The “stencil shape” refers to the shape of the opening of the above-described resist film, and as shown by 6 in FIGS. 1 to 4 described later, that the periphery of the opening protrudes like an eaves. It is a characteristic shape. This stencil shape forms a portion where metal is not deposited on the resist wall surface of the opening, and enables removal of the resist film by a solvent from that portion, that is, a lift-off process. This lift-off method can be adopted as a relatively simple process when the dry etching method or the wet etching method is difficult to apply in the process.

【0003】上記のリフトオフ法には、単層レジストを
用いる方法と2層レジストを用いる方法がある。
The lift-off method includes a method using a single-layer resist and a method using a two-layer resist.

【0004】半導体レーザ等の光デバイスの製作工程に
おいては半導体基板上に厚い金属膜を形成する必要があ
る。このような場合に、リフトオフ法は有効な方法であ
るが、金属膜が厚くなる程リフトオフ処理をしたときに
必要な部分以外の金属膜が完全には取り除かれず、それ
が基板上に残ってしまう。この点において、2層レジス
ト法は必要な部分以外の金属膜を完全に取り除くのに有
効な方法であるが、従来の2層レジスト法は、下層レジ
スト膜の熱処理温度が高く、金属膜蒸着後の除去方法に
問題があった。
In the process of manufacturing an optical device such as a semiconductor laser, it is necessary to form a thick metal film on a semiconductor substrate. In such a case, the lift-off method is an effective method. However, as the metal film becomes thicker, the metal film other than a necessary portion is not completely removed when the lift-off process is performed, and it remains on the substrate. . In this respect, the two-layer resist method is an effective method for completely removing the metal film other than the necessary part, but the conventional two-layer resist method requires a high heat treatment temperature for the lower resist film, and the There was a problem with the removal method.

【0005】図3は単層レジストを用いた基本的なステ
ンシル形状の形成法の一例を示す。図3において、
(a)半導体基板1上にフォトレジスト膜2を形成し、
フォトマスク3を介し紫外線4を照射してパターン露光
を行う。(b)有機溶媒(ブロムベンゼン、モノクロロ
ベンゼン等)に浸漬しフォトレジスト膜2の表面に難溶
化層5を形成する。(c)現像処理を行ってステンシル
形状6を形成する。この方法はプロセスが簡単である反
面、半導体基板に大きな段差がある場合や密着露光方式
においてフォトレジストとフォトマスクとの密着性が悪
いと良好なステンシル形状が得られないという問題があ
る。
FIG. 3 shows an example of a method of forming a basic stencil shape using a single-layer resist. In FIG.
(A) forming a photoresist film 2 on a semiconductor substrate 1;
The pattern exposure is performed by irradiating ultraviolet rays 4 through the photomask 3. (B) dipping in an organic solvent (such as bromobenzene and monochlorobenzene) to form a hardly soluble layer 5 on the surface of the photoresist film 2; (C) A stencil shape 6 is formed by performing a developing process. Although this method is simple in process, it has a problem that a good stencil shape cannot be obtained if there is a large step in the semiconductor substrate or if the adhesion between the photoresist and the photomask is poor in the contact exposure method.

【0006】図4は、この問題を解決した2層レジスト
法を用いた基本的なステンシル形成法の一例を示す。図
4において、(a)半導体基板1上に下層レジスト膜7
としてPMGI(poly(dimethylglutarimide))を塗布
し、その上に上層レジスト膜8(フォトレジスト膜)を
塗布し、200℃以上の熱処理をする。(b)フォトマス
ク3を介して紫外線4によりパターン露光を行う。
(c)上層レジスト膜8の現像処理後、上層レジスト膜
8をフォトマスクとして遠紫外線9による露光を行う。
(d)上層レジスト膜8が現像されない溶液を用いて下
層レジスト膜7を現像すればステンシル形状6が形成で
きる。(e)金属膜を全面に蒸着し、2つのレジスト膜
を除去すれば半導体基板1の必要部分のみに金属膜パタ
ーン10が形成できる。
FIG. 4 shows an example of a basic stencil forming method using a two-layer resist method which solves this problem. In FIG. 4, (a) a lower resist film 7 is formed on a semiconductor substrate 1.
PMGI (poly (dimethylglutarimide)), an upper resist film 8 (photoresist film) is applied thereon, and a heat treatment at 200 ° C. or more is performed. (B) Pattern exposure is performed by ultraviolet rays 4 through a photomask 3.
(C) After the upper resist film 8 is developed, exposure with far ultraviolet rays 9 is performed using the upper resist film 8 as a photomask.
(D) The stencil shape 6 can be formed by developing the lower resist film 7 using a solution in which the upper resist film 8 is not developed. (E) By depositing a metal film on the entire surface and removing the two resist films, a metal film pattern 10 can be formed only on a necessary portion of the semiconductor substrate 1.

【0007】このように、2層レジスト法ではプロセス
は複雑となるが、下層レジスト膜7を十分厚く形成して
おけば段差のある基板においても、また下層レジスト膜
7と上層レジスト膜8のパターン形成を別工程処理で行
うため、良好なステンシル形状6を制御性良く形成する
ことができる。
As described above, the process is complicated by the two-layer resist method. However, if the lower resist film 7 is formed sufficiently thick, the pattern of the lower resist film 7 and the upper resist film 8 can be formed even on a substrate having a step. Since the formation is performed in a separate process, a good stencil shape 6 can be formed with good controllability.

【0008】したがって、この2層レジスト法を用いた
応用として、基板段差が大きく、また100ミクロン程度
の薄い基板を使用した半導体レーザ等の光デバイスに適
用できる。図5は半導体レーザのプロセスに2層レジス
ト法を用いた一例を示す。半導体レーザでは、薄く研磨
した基板を使用するため、そのまま扱うことができな
い。そのため、図5において、(a)厚い基板11上に
接着層(PMGI膜)12を塗布し、その上に薄く加工
(100ミクロン)した半導体レーザ基板1を張り合わせ
る。(b)下層レジスト膜7を形成するためにPMGI
を塗布し、250℃の熱処理を行う。(c)上層レジスト
膜8を形成してパターン露光と現像処理さらに下層レジ
スト膜7の露光と現像処理を行う。(d)金属膜を蒸着
した後、有機溶媒にて上層レジスト膜8及び下層レジス
ト膜7を順次除去すれば半導体レーザ基板1の面上に所
望の金属膜10のパターンが形成される。さらに、接着
層12を除去して厚い基板11と半導体レーザ基板1と
を切り離す。
Therefore, as an application using the two-layer resist method, the present invention can be applied to an optical device such as a semiconductor laser using a thin substrate having a large substrate step and about 100 μm. FIG. 5 shows an example in which a two-layer resist method is used in a semiconductor laser process. Since a semiconductor laser uses a thinly polished substrate, it cannot be handled as it is. Therefore, in FIG. 5, (a) an adhesive layer (PMGI film) 12 is applied on a thick substrate 11 and a thinly processed (100 μm) semiconductor laser substrate 1 is bonded thereon. (B) PMGI for forming lower resist film 7
And heat-treated at 250 ° C. (C) The upper resist film 8 is formed, and pattern exposure and development processing, and further, exposure and development processing of the lower resist film 7 are performed. (D) After depositing the metal film, the upper resist film 8 and the lower resist film 7 are sequentially removed with an organic solvent, whereby a desired pattern of the metal film 10 is formed on the surface of the semiconductor laser substrate 1. Furthermore, the thick substrate 11 and the semiconductor laser substrate 1 are separated by removing the adhesive layer 12.

【0009】[0009]

【発明が解決しようとする課題】以上が2層レジスト法
を半導体レーザのプロセスに適用した場合の方法である
が、下層レジスト膜であるPMGI膜は2層レジスト法
には適しているが、200℃以上の熱処理が必要となる。
したがって、リフトオフ処理においてPMGI膜をアセ
トン等の有機溶媒で簡単には溶解できないこと、また基
板同士を張り合わせるための接着層にもPMGI膜を使
用した場合、張り合わせ部分の接着層は十ミクロン程度
と薄く、しかも200℃以上の熱処理によって有機溶媒に
溶解しにくくなっていること、及び、半導体レーザ基板
が薄いことから、基板間の剥離は容易でない。このよう
な問題点を解消することは半導体レーザ製作プロセスに
おける重要な課題となっていた。
The above is a method in which the two-layer resist method is applied to a semiconductor laser process. The PMGI film as the lower resist film is suitable for the two-layer resist method. Heat treatment at a temperature of at least ℃ is required.
Therefore, the PMGI film cannot be easily dissolved with an organic solvent such as acetone in the lift-off process. In addition, when the PMGI film is also used as the adhesive layer for bonding the substrates, the adhesive layer at the bonded portion is about 10 microns. Since the semiconductor laser substrate is thin and hardly dissolved in an organic solvent by heat treatment at 200 ° C. or more, and the semiconductor laser substrate is thin, peeling between the substrates is not easy. Resolving such problems has been an important issue in the semiconductor laser fabrication process.

【0010】本発明は上記の課題を解決するためになさ
れたものであり、ステンシル形状が確実に形成でき、さ
らにリフトオフ処理や基板間の剥離が簡単にできるパタ
ーン形成法を提供することを目的とする。
SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a pattern forming method capable of reliably forming a stencil shape, and further capable of easily performing lift-off processing and peeling between substrates. I do.

【0011】[0011]

【課題を解決するための手段】上記の課題を解決するた
めに、本発明においては、下層レジスト膜、上層レジス
ト膜及び基板同士の張り合わせ部分がアセトン等の有機
溶媒で容易に除去できるように、それらの膜及び張り合
わせ部分の熱処理を、それらの膜及び張り合わせ部分が
熱硬化をおこさない温度(たとえば130℃以下)で行う
こととする。また、下層レジスト膜全面に紫外線を十分
に照射して現像速度を速め、さらに下層レジスト膜の現
像に使用する現像液に対して現像速度の遅い上層レジス
ト膜を採用することとする。
In order to solve the above-mentioned problems, in the present invention, a lower resist film, an upper resist film, and a bonded portion of a substrate are easily removed with an organic solvent such as acetone. The heat treatment of the film and the bonded portion is performed at a temperature at which the film and the bonded portion do not thermally harden (for example, 130 ° C. or less). Further, the developing speed is increased by sufficiently irradiating the entire surface of the lower resist film with ultraviolet rays, and an upper resist film having a lower developing speed than a developing solution used for developing the lower resist film is employed.

【0012】[0012]

【発明の実施の形態】図1は本発明に係わるパターン形
成法の第1の実施の形態例を示す。図1において、
(a)半導体基板1上にポジ形の下層フォトレジスト膜
13(シプレイ社製MP1400/37等)を塗布し、
熱処理(120℃〜130℃)を施した後、紫外線4を全面に
照射する。(b)ポジ形の上層フォトレジスト膜14
(シプレイ社製SJR5740等)を形成し熱処理(90
℃)後、フォトマスク3を介して紫外線4によるパター
ン露光を行う。(c)現像処理(シプレイ社製MPデベ
ロパーにて現像)によりパターン露光された位置の上層
フォトレジスト膜14と下層フォトレジスト膜13を除
去し、現像速度の差によってステンシル形状6を形成す
る。ここで、上層と下層で異なるフォトレジストを用い
たが、同一材料のフォトレジストを用いても良い。ただ
し、同一のレジストを用いた場合には、上層と下層との
界面においてレジストの混合が起こるので、可溶な溶剤
が異なるレジストの組み合わせを用いるのがより好まし
い。また、現像液が異なるレジストの組み合わせを用い
れば、ステンシルのせり出し(開口幅を狭くしている部
分)の長さを独立に制御することが容易となるため、よ
り好ましい。
FIG. 1 shows a first embodiment of a pattern forming method according to the present invention. In FIG.
(A) A positive lower photoresist film 13 (MP1400 / 37 manufactured by Shipley Co., Ltd.) is applied on the semiconductor substrate 1,
After heat treatment (120 ° C. to 130 ° C.), the entire surface is irradiated with ultraviolet rays 4. (B) Positive upper photoresist film 14
(SJR5740 manufactured by Shipley Co., Ltd.) and heat-treated (90
After that, pattern exposure is performed with ultraviolet light 4 through the photomask 3. (C) The upper photoresist film 14 and the lower photoresist film 13 at the positions where the pattern was exposed by the development process (developed by MP Developer manufactured by Shipley) are removed, and a stencil shape 6 is formed by a difference in development speed. Here, different photoresists are used for the upper layer and the lower layer, but photoresists of the same material may be used. However, when the same resist is used, mixing of the resist occurs at the interface between the upper layer and the lower layer. Therefore, it is more preferable to use a combination of resists having different soluble solvents. Further, it is more preferable to use a combination of resists having different developing solutions, because it becomes easy to independently control the length of the stencil protrusion (portion where the opening width is reduced).

【0013】本発明では、採用したレジストの熱処理温
度を、そのレジストがアセトン等の有機溶媒で簡単に溶
解する性質を維持するような温度(たとえば130℃)以下
とすることにより、リフトオフ法の実行を容易にしてい
る。また、上層フォトレジスト膜を形成する前に下層フ
ォトレジスト膜全面に紫外線を照射していること、下層
フォトレジスト膜の現像液に対して、現像速度の遅いフ
ォトレジストを上層膜に使用していることから、同一の
現像液で良好なステンシル形状が簡単なプロセスで可能
となる。さらに、上層フォトレジスト膜や下層フォトレ
ジスト膜を厚く形成しておけば、光デバイスに見られる
高い基板段差部分や、パターン精度はそれ程必要としな
い電極パッド部分等の厚い金属膜の形成に対して非常に
有効な方法となる。
In the present invention, the lift-off method is performed by setting the heat treatment temperature of the adopted resist to a temperature (for example, 130 ° C.) or less at which the resist maintains the property of being easily dissolved in an organic solvent such as acetone. Is easy. Further, the entire surface of the lower photoresist film is irradiated with ultraviolet rays before the formation of the upper photoresist film, and a photoresist having a low developing speed with respect to the developing solution of the lower photoresist film is used for the upper film. Therefore, a good stencil shape can be formed by a simple process using the same developer. Furthermore, if the upper photoresist film and the lower photoresist film are formed thicker, it can be used to form thick metal films such as high substrate steps that are found in optical devices and electrode pads that do not require much pattern accuracy. This is a very effective method.

【0014】図2は本発明に係わるパターン形成法の第
2の実施の形態例を示す。図2において、(a)厚い基
板11上に接着層12(シプレイ社製SJR5740を
使用)を厚く形成し、その上に薄い半導体レーザ基板1
を張り合わせる。(b)第1の実施例と同様に処理を行
い、ステンシル形状6を形成する。(c)金属膜10を
蒸着後、上層フォトレジスト膜14、下層フォトレジス
ト膜13および接着層12をアセトン等の有機溶媒で処
理すれば、接着層12が溶解して基板11から薄い半導
体基板1が離れるとともに上層フォトレジスト膜14、
下層フォトレジスト膜13が除去され金属膜10が形成
された薄い半導体基板1が実現する。
FIG. 2 shows a second embodiment of the pattern forming method according to the present invention. In FIG. 2, (a) a thick adhesive layer 12 (using SJR5740 manufactured by Shipley) is formed on a thick substrate 11 and a thin semiconductor laser substrate 1 is formed thereon.
Attach. (B) The same processing as in the first embodiment is performed to form a stencil shape 6. (C) After depositing the metal film 10, if the upper photoresist film 14, the lower photoresist film 13 and the adhesive layer 12 are treated with an organic solvent such as acetone, the adhesive layer 12 dissolves and the substrate 11 becomes thinner. As the upper photoresist film 14,
The thin semiconductor substrate 1 in which the lower photoresist film 13 is removed and the metal film 10 is formed is realized.

【0015】[0015]

【発明の効果】本発明の実施によって、リフトオフ法に
適するステンシル形状を確実に形成することが可能とな
り、このステンシル形状を用いて、金属膜が厚い場合、
基板に段差がある場合、あるいは基板が薄く、それが別
の厚い基板に接着層によって張り合わされている場合に
おいても、リフトオフ法による図形状の金属膜の形成を
容易に実行することができる。
According to the present invention, it is possible to surely form a stencil shape suitable for the lift-off method.
Even when the substrate has a step, or when the substrate is thin and is bonded to another thick substrate with an adhesive layer, the formation of the diagrammatic metal film by the lift-off method can be easily performed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係わる第1の実施例の形態を示す概念
図である。
FIG. 1 is a conceptual diagram showing an embodiment of a first embodiment according to the present invention.

【図2】本発明に係わる第2の実施例の形態を示す概念
図である。
FIG. 2 is a conceptual diagram showing a second embodiment according to the present invention.

【図3】従来の単層レジスト法を示す概念図である。FIG. 3 is a conceptual diagram showing a conventional single-layer resist method.

【図4】従来の2層レジスト法を示す概念図である。FIG. 4 is a conceptual diagram showing a conventional two-layer resist method.

【図5】従来の2層レジスト法を半導体レーザの製作に
適用した例を示す概念図である。
FIG. 5 is a conceptual diagram showing an example in which a conventional two-layer resist method is applied to the manufacture of a semiconductor laser.

【符号の説明】[Explanation of symbols]

1…半導体基板 2…フォトレジスト膜 3…フォトマスク 4…紫外線 5…難溶化層 6…ステンシル形状 7…下層フォトレジスト膜 8…上層フォトレジスト膜 9…遠紫外線 10…金属膜 11…基板 12…接着層 13…下層フォトレジスト膜 14…上層フォトレジスト膜。 DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate 2 ... Photoresist film 3 ... Photomask 4 ... Ultraviolet 5 ... Refractory layer 6 ... Stencil shape 7 ... Lower photoresist film 8 ... Upper photoresist film 9 ... Far ultraviolet light 10 ... Metal film 11 ... Substrate 12 ... Adhesive layer 13 Lower photoresist film 14 Upper photoresist film.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】基板上に2層レジストを用いてステンシル
形状を形成するパターン形成法において、前記基板上に
第1のレジストを塗布し前記第1のレジストが熱硬化し
ない温度で熱処理する工程と、前記第1のレジストの現
像速度を速めるために前記第1のレジスト全面に前記第
1のレジストが感度を有する波長の紫外線を照射する工
程と、前記第1のレジスト上に第2のレジストを塗布し
前記第1及び第2のレジストが熱硬化しない温度で熱処
理する工程と、前記基板に所望のパターンの露光を行う
工程と、前記基板を現像する工程とを有することを特徴
とするパターン形成法。
In a pattern forming method for forming a stencil shape using a two-layer resist on a substrate, a step of applying a first resist on the substrate and performing a heat treatment at a temperature at which the first resist does not thermoset. Irradiating the entire surface of the first resist with ultraviolet light having a wavelength at which the first resist has a sensitivity in order to increase the developing speed of the first resist; and applying a second resist on the first resist. Forming a pattern by applying a heat treatment at a temperature at which the first and second resists are not thermally cured, exposing the substrate to a desired pattern, and developing the substrate. Law.
【請求項2】前記第1のレジストの溶剤と前記第2のレ
ジストの溶剤とが異なることを特徴とする請求項1記載
のパターン形成法。
2. The pattern forming method according to claim 1, wherein a solvent of said first resist is different from a solvent of said second resist.
【請求項3】前記第1のレジストの現像液と前記第2の
レジストの現像液とが異なることを特徴とする請求項1
記載のパターン形成法。
3. The developing solution for the first resist and the developing solution for the second resist are different from each other.
The pattern forming method as described above.
JP752398A 1998-01-19 1998-01-19 Pattern formation method Pending JPH11204414A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP752398A JPH11204414A (en) 1998-01-19 1998-01-19 Pattern formation method

Publications (1)

Publication Number Publication Date
JPH11204414A true JPH11204414A (en) 1999-07-30

Family

ID=11668144

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JPH11204414A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6756319B2 (en) 2000-07-06 2004-06-29 Samsung Electronics Co., Ltd. Silica microstructure and fabrication method thereof
EP1733281A2 (en) * 2004-04-06 2006-12-20 MacDermid, Incorporated Method of forming a metal pattern on a substrate
WO2010117021A1 (en) * 2009-04-10 2010-10-14 三菱化学株式会社 Field effect transistor, method for manufacturing same, and electronic device using same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6756319B2 (en) 2000-07-06 2004-06-29 Samsung Electronics Co., Ltd. Silica microstructure and fabrication method thereof
EP1733281A2 (en) * 2004-04-06 2006-12-20 MacDermid, Incorporated Method of forming a metal pattern on a substrate
EP1733281A4 (en) * 2004-04-06 2010-06-09 Macdermid Inc Method of forming a metal pattern on a substrate
WO2010117021A1 (en) * 2009-04-10 2010-10-14 三菱化学株式会社 Field effect transistor, method for manufacturing same, and electronic device using same
JPWO2010117021A1 (en) * 2009-04-10 2012-10-18 三菱化学株式会社 Field effect transistor, manufacturing method thereof, and electronic device using the same
US8969871B2 (en) 2009-04-10 2015-03-03 Mitsubishi Chemical Corporation Field-effect transistor, processes for producing the same, and electronic device using the same
JP5833439B2 (en) * 2009-04-10 2015-12-16 三菱化学株式会社 Field effect transistor, manufacturing method thereof, and electronic device using the same

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