JPH06131519A - Ic card - Google Patents

Abstract

PURPOSE:To provide an IC card capable of efficiently reading/writing signal data from/in a memory loaded in the IC card. CONSTITUTION:In addition to a read/write-only memory group 3 for reading/ writing signal data in accordance with an input signal, a specification memory 5 in which a memories and areas in the group are previously stored is previously prepared in the IC card 20 and inputted signal data are controlled so as to be read out/written from/in a specified memory and area through a CPU 4 in accordance with the input of a read/write signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC card, and more specifically, it is provided with a means for reading or writing information data (hereinafter abbreviated as "reading / writing means"), and an information reading / writing memory and area are provided in an IC card The present invention relates to an IC card that can be freely changed by a read / write signal input / output to / from.

A conventional IC card of this type is constructed as shown in FIG. That is, an I / O port 2 for inputting / outputting a read / write signal between an external host (not shown) and the IC card body 1 and a read / output for inputting / outputting to the I / O port 2 mounted on the IC card 1. / Read / write-only memory group 3 for reading / writing data information according to a write signal
And read / write signals inputted / outputted to / from the I / O port 2 are decoded, and each memory (3-1), (3-2), ... Central processing unit (Central Proce
ssing Unit: hereinafter abbreviated as “CPU”) 4.

[0003]

However, when the above-mentioned conventional IC card is used, when reading / writing an arbitrary memory and an arbitrary area in the IC card, the address on the memory is changed, Or, I had to read / write including unnecessary parts. Therefore, when such an IC card is used, the function outside the IC card also needs to be burdened, so that it takes a long time to read / write, which is unsatisfactory. Therefore, the present invention solves such a bad point of the conventional IC card and provides an IC card capable of efficiently performing reading / writing in an arbitrary memory and an arbitrary area in the read / write dedicated memory group of the IC card. It is the one we are trying to provide.

[0004]

As shown in FIG. 1, an IC card according to the present invention for achieving the above-mentioned object is designed to input / output a read / write signal between an external host and the IC card 1.
/ O port 2, a read / write dedicated memory group 3 for reading / writing data according to a read / write signal input / output to / from the I / O port 2, and read / write in the read / write dedicated memory group 3. A designated memory 5 in which memory to be stored and area data are stored in advance,

The read / write signal input / output to / from the I / O port 2 is decoded and compared with the specified memory and area data in the specified memory 5 to read the memory and area in the read / write-only memory group 3. A CPU 4 for controlling the read / write operation and a signal switching means 6 for transmitting the read / write operation to the corresponding memory and area in the read / write dedicated memory group 3 by the read / write operation control of the CPU 4 are provided. is there.

[0006]

As described above, according to the IC card of the present invention,
In accordance with a read / write signal input / output to / from an I / O port in the IC card, a memory to be read / written from among the memories in the read / write dedicated memory group mounted in the IC card by the designated memory and Since the area is selected, the flow of data to be read / written by the CPU and the signal switching means is controlled, and the data is read / written only to the corresponding memory and area, the data reading to the memory and area in the IC card is performed. / Writing control can be performed efficiently.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. Embodiment 1 FIG. 1 is a circuit block diagram showing a schematic configuration of an IC card 20 according to an embodiment of the present invention. In the figure, 1 is an IC
The card body 2 is an I / O port for inputting / outputting read / write signals between an external host (not shown) and the IC card, and 3 is a plurality of memories (3-
1), (3-2), (3-3), ..., (3-n) dedicated read / write memory group, 4 is the contents of read / write signals input to and output from the I / O port 2 To read or write the read / write signal data to or from the corresponding memory or area in the read / write-only memory group 3 by comparing the contents with the specified memory and area data of the specified memory 5 (described later). CPU to control,

Further, reference numeral 6 is a signal switching means for transmitting under the control of the CPU 4 to write or read data by a read / write signal to a corresponding memory and area in the read / write dedicated memory group. As shown in FIG. 2, the designated memory 5 is, for example, a RAM (Random Access Memory) composed of areas divided into 4 rows and 6 columns, and is read / write only in advance by a host computer (external host described above) or the like. It gives data information of memories and areas in the memory group, and the information is given by the host computer. The designation of the memory and area in the read / write-only memory group 3 by the designated memory is performed by assigning the numbers 1, 2, and 3 entered in the divided address addresses as shown in FIG.
1), (3-2) and (3-3) are shown. It is shown that the reading / writing of data in the memories 1, 2 and 3 is performed on the address addresses shaded in the memories 1, 2 and 3 as shown in FIG. That is, the first row, the second row, the third row, the first column, the sixth row, and the second column in the framework of the memories 1, 2, and 3 of FIG.
The address addresses located in the third, fourth and fifth columns are shown.

The first row for the memory 2 of FIG.
In the regions located at the second and fifth columns of the second row, and at each address of the first to sixth columns of the fourth row,
For the memory 3 of FIG. 3, it is shown that data is written in the regions located at the address addresses of the first and second rows, the third and fourth columns.

Embodiment 2 Next, an embodiment of data writing to an arbitrary memory and an arbitrary area in the read / write dedicated memory group 3 in the IC card of this embodiment will be described. As the IC card used in this example, the IC card 20 shown in FIG. 1 was used. However, the designated memory used is, as shown in FIG. 4, a RAM 7 having a framework divided into 4 rows and 5 columns, and is used by the host computer (first row-second row) x (first column-second column). And the address address area of (3rd row-4th row) x (3rd column-5th column) of the memory (3-
1); (1st row-second row) x (third column-fifth column) address area is memory (3-2); (third row-fourth)
The address address of (row) × (first column−second column) is the memory (3
-3) specifies that data should be written.

The data to be written to the designated memory and area by the write signal command has the content shown in 8 of FIG. 5, and the data "○" is written to each address address area in the framework. The memories (3-1), (3-2) and (3-3) in the read / write only memory group of this embodiment are shown in FIGS. 6 (a), (b) and (c), respectively. As described above, ⋄ marks, ⊚ marks, and ◆ marks are written in the address address areas of the framework divided into 4 rows and 5 columns.

In the IC card 20 of this embodiment, when the designated memory 7 described above is used to write the write data as shown at 8 in FIG. 5, when the write command signal is input to the I / O port 2, the CPU 4 , Signal control to write data 8 to the memories (3-1), (3-2), (3-3) in the memory group dedicated to writing in comparison with the designated memory and area of the designated memory 7. The means 6 is switched. As a result, the memories (3-1), (3-2), (3
-3), data writing is performed as shown in (a), (b), and (c) of FIG. 7, respectively.

Third Embodiment Next, a description will be given of an embodiment of reading data in the memory and area of the read / write only memory group by the designated memory in the IC card 20 of the present embodiment. FIG. 8 is a diagram showing an address address area pair of a memory and an area designated by the designated memory 9 stored in the RAM of the IC card 20 of this embodiment and a memory and an area to be instructed. The designated memory 9 has address address areas (first row-second row) x (first column-third column) and (fourth row-fifth row) divided into 5 rows and 6 columns by the host computer. (First column-third
The column is the memory "1" to be read; (first row-second)
Write “2” in the address address area of (row) × (fourth column−sixth column) and the address address area of (fourth row−fifth row) × (fourth column−sixth column); The address address area in the first to sixth columns of the third row is the memory and area designated by "3". However, the numbers "1", "2" and "3" in each address address area of the designated memory 9 in FIG. 8 are the memories (3-1), (3-2) in the read-only memory group,
(3-3) is shown.

Further, the memories (3-1), (3-2), (3-3) in the read / write only memory group of the present embodiment respectively have (a), (b), and (3) of FIG. As shown in (c) ☆
The mark, ◎ mark, and ◆ mark are written in the corresponding address address area. Then, the read command input to the I / O port 2 is to instruct that the data should be read from each memory and area of the numbers written in the address address area in the designated memory 9 shown in FIG. With this signal, the CPU 4 signal switching means 6 is switched and controlled to read / read.
The memories (3-1), (3-2) in the write-only memory group,
A read signal is sent to (3-3), and the read signal as indicated by 11 in FIG. 10 is sent from the I / O port 2 to an external host (not shown).

The designated memory 5 used in the above embodiment,
Although 7 and 9 have been shown for designating the memory and area of the numbers in the address address areas shown in FIGS. 2, 4 and 8, it is not limited to such a configuration and the addresses to be read / written in advance. The memory configured according to the address and the type of the writing symbol may be stored in the memory of the CPU, and is not limited to the configuration of the above-described embodiment.

[0016]

As is apparent from the above description, according to the IC card of the present invention, it is possible to efficiently read / write data with respect to an arbitrary memory and an arbitrary area of the read / write dedicated memory group mounted in the IC card. Can be done well.

[Brief description of drawings]

FIG. 1 is a circuit configuration block diagram of an IC card according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a relationship between an address address and a writing state in a designated memory of the IC card of FIG.

3 (a), (b), and (c) are explanatory views showing the relationship between the memory addresses and the address addresses of the areas in which different write data should be read / written.

FIG. 4 is an explanatory diagram showing an address address of a memory designated by a designated memory and an area in a second embodiment of the present invention.

FIG. 5 is an explanatory diagram showing a relationship between an IC card memory according to a second embodiment of the present invention and an address address of data to be written in the area.

6 (a), (b) and (c) show a relationship between a data symbol written in each memory in a read / write only memory group of the second embodiment of the present invention and an address address area. It is an explanatory view shown.

7 (a), (b) and (c) are shown in FIG.
It is explanatory drawing which shows the relationship between the address address area of each said memory, and the data symbol after writing the data shown in FIG. 8 into each memory shown to (b), (c).

FIG. 8 is an explanatory diagram showing an address address area of a memory designated by a designated memory used in an IC card according to a third embodiment of the present invention.

9 (a), (b) and (c) are all data symbols and addresses written in each memory of the read / write only memory group memory in the IC card of the third embodiment of the present invention. It is explanatory drawing which shows the relationship of an address area.

10 is an explanatory diagram showing a relationship between an address address area of a signal read from each of the three types of memories shown in FIG. 9 and a read symbol.

FIG. 11 is a circuit block diagram of a conventional IC card.

[Explanation of symbols]

 1 IC Card Main Body 2 I / O Port 3 Read / Write Dedicated Memory Group 4 CPU 5, 7, 9 Designated Memory 6 Signal Switching Means 8 Write Data 11 Read Data 20 IC Card of Example

Claims (1)

[Claims] 1. An I / O port for inputting / outputting a read / write signal between an external host and an IC card, and a read / write dedicated memory for reading / writing according to a read / write signal input / output to / from the I / O port. Group, a designated memory in which read / write memories and area data in the read / write dedicated memory group are stored in advance, and a read / write signal that is input / output to / from the I / O port The central processing unit for controlling the read / write operation with respect to the memory and the area in the read / write dedicated memory group in comparison with the designated state in FIG. An IC card, comprising: a signal switching means for transmitting a read / write operation to a corresponding memory and a corresponding area in a write-only memory group.