JPH06101501B2 - Semiconductor substrate for measuring high frequency characteristics of semiconductor devices - Google Patents

Semiconductor substrate for measuring high frequency characteristics of semiconductor devices

Info

Publication number
JPH06101501B2
JPH06101501B2 JP29333189A JP29333189A JPH06101501B2 JP H06101501 B2 JPH06101501 B2 JP H06101501B2 JP 29333189 A JP29333189 A JP 29333189A JP 29333189 A JP29333189 A JP 29333189A JP H06101501 B2 JPH06101501 B2 JP H06101501B2
Authority
JP
Japan
Prior art keywords
high frequency
semiconductor substrate
frequency characteristics
ground electrode
measuring high
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP29333189A
Other languages
Japanese (ja)
Other versions
JPH03153052A (en
Inventor
隆幸 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP29333189A priority Critical patent/JPH06101501B2/en
Publication of JPH03153052A publication Critical patent/JPH03153052A/en
Publication of JPH06101501B2 publication Critical patent/JPH06101501B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は、例えば数+MHz以上の高周波帯で使用され
る半導体装置の高周波特性を測定するための高周波特性
測定用半導体基板に関するものであり、特に必要なチッ
プサイズを縮小した高周波特性測定用半導体基板に関す
るものである。
TECHNICAL FIELD The present invention relates to a semiconductor substrate for measuring high frequency characteristics for measuring high frequency characteristics of a semiconductor device used in a high frequency band of, for example, several + MHz or more, In particular, the present invention relates to a semiconductor substrate for high frequency characteristic measurement in which a required chip size is reduced.

[従来の技術] 第4図(a)は従来の高周波特性測定用半導体基板を被
測定半導体装置の一部と示した平面図、第4図(b)は
第4図(a)のロ−ロ線に沿う断面図である。同図で、
(1)は高周波特性測定用半導体基板、(7)はこれに
隣接して設けられた被測定半導体装置のチップである。
高周波特性測定用半導体基板(1)の主表面上には信号
伝送線路(3)に接続された2個の入出力信号パッド
(4)、および4個の接地電極パッド(6)がそれぞれ
設けられており、また裏面には裏面接地導電層となる裏
面接地金属層(2)が形成されている。接地電極パッド
(6)と裏面接地金属層(2)とは半導体基板(1)を
貫通して形成されたバイアホール(5)を介して電気的
に接続されている。
[Prior Art] FIG. 4 (a) is a plan view showing a conventional semiconductor substrate for high frequency characteristic measurement as a part of a semiconductor device to be measured, and FIG. 4 (b) is a flowchart of FIG. 4 (a). It is sectional drawing which follows the B line. In the figure,
(1) is a semiconductor substrate for measuring high frequency characteristics, and (7) is a chip of a semiconductor device to be measured provided adjacent to the semiconductor substrate.
Two input / output signal pads (4) connected to the signal transmission line (3) and four ground electrode pads (6) are provided on the main surface of the semiconductor substrate (1) for measuring high frequency characteristics. In addition, a backside ground metal layer (2) serving as a backside grounding conductive layer is formed on the backside. The ground electrode pad (6) and the backside ground metal layer (2) are electrically connected to each other through a via hole (5) formed through the semiconductor substrate (1).

次に第4図の高周波特性測定用半導体基板(1)の使用
態様を第5図を参照して説明する。第5図(a)は高周
波帯半導体ウエハ・プローバのプロービングニードル先
端部を示す斜視図で、該プロービングニードル先端部は
セラミック製の本体(8)の裏面に設けられた信号線路
(9)と接地線路(10)とを有するコプレーナライン構
造となっている。このプロービングニードルを第5図
(b)に示すように高周波特性測定用半導体基板(1)
の入出力信号パッド(4)、接地電極パッド(6)に接
触させることによりチップ(7)上の被測定半導体装置
の高周波特性を測定する。高周波特性の測定後は第5図
(c)に示すように被測定半導体装置のチップ(7)と
高周波特性測定用半導体基板(1)を切断し、上記被測
定半導体装置を使用する。
Next, a usage mode of the semiconductor substrate (1) for high frequency characteristic measurement of FIG. 4 will be described with reference to FIG. FIG. 5 (a) is a perspective view showing the probing needle tip of the high-frequency semiconductor wafer prober, and the probing needle tip is grounded to the signal line (9) provided on the back surface of the ceramic body (8). It has a coplanar line structure with a line (10). As shown in FIG. 5 (b), this probing needle is used as a semiconductor substrate (1) for measuring high frequency characteristics.
The high frequency characteristics of the semiconductor device under test on the chip (7) are measured by contacting the input / output signal pad (4) and the ground electrode pad (6). After the measurement of the high frequency characteristic, the chip (7) of the semiconductor device to be measured and the semiconductor substrate (1) for high frequency characteristic measurement are cut as shown in FIG. 5 (c), and the semiconductor device to be measured is used.

[発明が解決しようとする課題] 高周波帯で動作するICに使用されるGaAsウエハ、あるい
はGaAlAsウエハ等の価格はSiウエハの価格の10倍以上と
非常に高価であるため、半導体装置のコストダウンのた
めにはチップサイズ、特に測定後に廃棄される高周波特
性測定用半導体基板(1)のサイズを可及的に縮小する
ことが必要である。しかしながら、上述のような従来の
高周波特性測定用半導体基板(1)は、接地電極パッド
(6)の必要な個数とそれに関連するバイアホール
(5)の数が決まっているため、チップサイズを縮小す
るには限度があった。
[Problems to be Solved by the Invention] Since the price of GaAs wafers or GaAlAs wafers used in ICs operating in the high frequency band is 10 times or more the price of Si wafers, the cost of semiconductor devices is reduced. For this purpose, it is necessary to reduce the chip size, especially the size of the semiconductor substrate (1) for measuring high frequency characteristics, which is discarded after the measurement. However, in the conventional semiconductor substrate (1) for measuring high frequency characteristics as described above, the required number of ground electrode pads (6) and the number of via holes (5) related thereto are determined, so that the chip size is reduced. There was a limit to what

この発明は、高周波特性測定用半導体基板の構造を改良
して、そのチップサイズを縮小することを目的としたも
のである。
An object of the present invention is to improve the structure of a semiconductor substrate for measuring high frequency characteristics and reduce its chip size.

[課題を解決するための手段] この発明の高周波特性測定用半導体基板は、複数の接地
電極パッドが1個のバイアホールを共有するように各接
地電極パッド、バイアホールを配置して構成されてい
る。
[Means for Solving the Problem] The semiconductor substrate for high frequency characteristic measurement of the present invention is configured by arranging each ground electrode pad and via hole so that a plurality of ground electrode pads share one via hole. There is.

[作用] この発明の高周波特性測定用半導体基板においては、複
数の接地電極パッドが1個のバイアホールを共有するか
ら、バイアホールの数を少なくすることができ、その分
高周波特性測定用半導体基板の面積を縮小し、チップサ
イズを縮小することができる。
[Operation] In the semiconductor substrate for high frequency characteristic measurement of the present invention, since the plurality of ground electrode pads share one via hole, the number of via holes can be reduced, and the semiconductor substrate for high frequency characteristic measurement can be reduced accordingly. The area can be reduced and the chip size can be reduced.

[実施例] 第1図(a)はこの発明の高周波特性測定用半導体基板
の第1の実施例を被測定半導体装置の一部と共に示した
平面図、第1図(b)は第1図(a)のイ−イ線に沿う
断面図である。同図で、第4図に示す従来の高周波特性
測定用半導体基板と同等部分には同じ参照番号を付す。
すなわち、(1)はこの発明の高周波特性測定用半導体
基板で、その主表面上には信号伝送線路(3)に接続さ
れた2個の入出力信号パッド(4)と4個の接地電極パ
ッド(61)乃至(64)が設けられており、裏面には裏面
接地導電層となる裏面接地金属層(2)が形成されてい
る。(51)、(52)は半導体基板(1)を貫通して形成
されたバイアホールで、各バイアホールには2個の接地
電極パッドが関連している。つまり、バイアホール(5
1)を2個の接地電極パッド(61)、(62)が共有して
おり、バイアホール(52)を他の2個の接地電極パッド
(63)、(64)が共有している。(7)は高周波特性測
定用半導体基板(1)に隣接して設けられた被測定半導
体装置としての高周波帯ICチップである。この実施例で
は、従来と同じ4個の接地電極パッドに対して2個のバ
イアホールですみ、2個のバイアホールに必要なスペー
ス分だけ高周波特性測定用半導体基板のチップサイズを
縮小することができる。
[Embodiment] FIG. 1 (a) is a plan view showing a first embodiment of a semiconductor substrate for measuring high frequency characteristics of the present invention together with a part of a semiconductor device to be measured, and FIG. It is sectional drawing which follows the ii line of (a). In this figure, the same parts as those of the conventional semiconductor substrate for high frequency characteristic measurement shown in FIG. 4 are designated by the same reference numerals.
That is, (1) is a semiconductor substrate for measuring high frequency characteristics of the present invention, on its main surface, two input / output signal pads (4) connected to a signal transmission line (3) and four ground electrode pads. (61) to (64) are provided, and a backside ground metal layer (2) serving as a backside ground conductive layer is formed on the back side. (51) and (52) are via holes formed through the semiconductor substrate (1), and two ground electrode pads are associated with each via hole. That is, the via hole (5
1) is shared by two ground electrode pads (61) and (62), and the via hole (52) is shared by the other two ground electrode pads (63) and (64). (7) is a high frequency band IC chip as a semiconductor device to be measured, which is provided adjacent to the semiconductor substrate (1) for measuring high frequency characteristics. In this embodiment, only two via holes are required for the same four ground electrode pads as the conventional one, and the chip size of the semiconductor substrate for high frequency characteristic measurement can be reduced by the space required for the two via holes. it can.

第2図はこの発明の高周波特性測定用半導体基板の第2
の実施例を示し、高周波特性測定用半導体基板(1)に
1個のバイアホール(50)を形成し、このバイアホール
(50)に4個の接地電極パッド(61)乃至(64)を半導
体基板の表面に設けられた導電性の膜(11)、(11)を
介して接続したものである。この実施例では4個の接地
電極パッドに対してバイアホールは1個で済むから、高
周波特性測定用半導体基板のチップサイズを一層縮小す
ることができる。
FIG. 2 shows a second example of the semiconductor substrate for measuring high frequency characteristics of the present invention.
In the example of FIG. 1, one via hole (50) is formed in the semiconductor substrate (1) for high frequency characteristics measurement, and four ground electrode pads (61) to (64) are formed in the via hole (50) as a semiconductor. Connections are made via conductive films (11) and (11) provided on the surface of the substrate. In this embodiment, since only one via hole is required for four ground electrode pads, the chip size of the semiconductor substrate for measuring high frequency characteristics can be further reduced.

第3図はこの発明の高周波特性測定用半導体基板の第3
の実施例で、高周波特性測定用半導体基板(1)に2個
のバイアホール(51)、(52)を設けたものであるが、
4個の接地電極パッド(61)乃至(64)および入出力信
号パッド(4)を共に被測定半導体装置としての高周波
帯ICチップ(7)上に設けたものである。この第3の実
施例では、従来の高周波特性測定用半導体基板に比して
バイアホール2個分と、4個の接地電極パッドおよび2
個の入出力信号パッドに相当する分だけ高周波特性測定
用半導体基板のチップサイズを縮小することができる。
FIG. 3 is a third view of a semiconductor substrate for measuring high frequency characteristics of the present invention.
In the above embodiment, the semiconductor substrate (1) for high frequency characteristic measurement is provided with two via holes (51) and (52).
The four ground electrode pads (61) to (64) and the input / output signal pad (4) are all provided on a high frequency band IC chip (7) as a semiconductor device to be measured. In the third embodiment, two via holes, four ground electrode pads, and two ground electrode pads and 2 are provided as compared with the conventional semiconductor substrate for measuring high frequency characteristics.
The chip size of the semiconductor substrate for high frequency characteristic measurement can be reduced by an amount corresponding to each input / output signal pad.

[発明の効果] 以上のように、この発明によれば、高周波特性測定後は
廃棄される高周波特性測定用半導体基板のチップサイズ
を大幅に縮小することができるから、全体として半導体
装置の製造価格を引下げることができるという効果があ
る。
[Advantages of the Invention] As described above, according to the present invention, the chip size of the semiconductor substrate for measuring high-frequency characteristics, which is discarded after the high-frequency characteristics are measured, can be significantly reduced. There is an effect that can be lowered.

【図面の簡単な説明】[Brief description of drawings]

第1図(a)はこの発明の高周波特性測定用半導体基板
の第1の実施例を被測定半導体装置の一部と共に示した
平面図、第1図(b)は第1図(a)のイ−イ線に沿う
断面図、第2図はこの発明の高周波特性測定用半導体基
板の第2の実施例を被測定半導体装置の一部と共に示し
た平面図、第3図はこの発明の高周波特性測定用半導体
基板の第3の実施例を被測定半導体装置の一部と共に示
した平面図、第4図(a)は従来の高周波特性測定用半
導体基板を被測定半導体装置の一部と共に示した平面
図、第4図(b)は第4図(a)のロ−ロ線に沿う断面
図、第5図は第4図に示す従来の高周波特性測定用半導
体基板の使用状態を示す図で、同図(a)は高周波帯半
導体ウエハ・プローバのプロービングニードル先端部を
示す斜視図、同図(b)はプロービングニードル先端部
を高周波特性測定用半導体基板に適用した状態を示す斜
視図、同図(c)は測定後高周波特性測定用半導体基板
と被測定半導体装置とを切離した状態を示す平面図であ
る。 (1)……高周波特性測定用半導体基板、(2)……裏
面接地導電層、(50)、(51)(52)……バイアホー
ル、(61)、(62)、(63)、(64)……接地電極パッ
ド。
1A is a plan view showing a first embodiment of a semiconductor substrate for measuring high frequency characteristics of the present invention together with a part of a semiconductor device to be measured, and FIG. 1B is a plan view of FIG. 1A. FIG. 2 is a plan view showing a second embodiment of a semiconductor substrate for measuring high frequency characteristics of the present invention together with a part of a semiconductor device to be measured, and FIG. 3 is a high frequency view of the present invention. A plan view showing a third embodiment of a semiconductor substrate for characteristic measurement together with part of a semiconductor device to be measured, and FIG. 4 (a) shows a conventional semiconductor substrate for high frequency characteristic measurement together with part of the semiconductor device to be measured. 4A is a plan view, FIG. 4B is a cross-sectional view taken along the line Loro of FIG. 4A, and FIG. 5 is a view showing a usage state of the conventional semiconductor substrate for measuring high frequency characteristics shown in FIG. FIG. 1A is a perspective view showing the tip of the probing needle of the high-frequency semiconductor wafer prober. ) Is a perspective view showing a state in which the tip portion of the probing needle is applied to the semiconductor substrate for high frequency characteristic measurement, and FIG. 7C is a plan view showing a state in which the semiconductor substrate for high frequency characteristic measurement after measurement and the semiconductor device to be measured are separated. Is. (1) …… Semiconductor substrate for high frequency characteristic measurement, (2) …… Backside ground conductive layer, (50), (51) (52) …… Via hole, (61), (62), (63), ( 64) ... Ground electrode pad.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】半導体基板の主表面上に設けられた複数の
接地電極パッドと裏面に形成された裏面接地導電層とを
電気的に接続するバイアホールを具備し、特徴として1
個のバイアホールにより複数の接地電極パッドを裏面接
地導電層に接続するように上記接地電極パッドおよびバ
イアホールを配置した半導体装置の高周波特性測定用半
導体基板。
1. A via hole for electrically connecting a plurality of ground electrode pads provided on a main surface of a semiconductor substrate and a back surface ground conductive layer formed on a back surface, characterized by
A semiconductor substrate for measuring a high frequency characteristic of a semiconductor device, wherein the ground electrode pad and the via hole are arranged so that a plurality of ground electrode pads are connected to the back side ground conductive layer by a single via hole.
JP29333189A 1989-11-10 1989-11-10 Semiconductor substrate for measuring high frequency characteristics of semiconductor devices Expired - Lifetime JPH06101501B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29333189A JPH06101501B2 (en) 1989-11-10 1989-11-10 Semiconductor substrate for measuring high frequency characteristics of semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29333189A JPH06101501B2 (en) 1989-11-10 1989-11-10 Semiconductor substrate for measuring high frequency characteristics of semiconductor devices

Publications (2)

Publication Number Publication Date
JPH03153052A JPH03153052A (en) 1991-07-01
JPH06101501B2 true JPH06101501B2 (en) 1994-12-12

Family

ID=17793438

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29333189A Expired - Lifetime JPH06101501B2 (en) 1989-11-10 1989-11-10 Semiconductor substrate for measuring high frequency characteristics of semiconductor devices

Country Status (1)

Country Link
JP (1) JPH06101501B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI636260B (en) * 2017-01-06 2018-09-21 新特系統股份有限公司 Probe card module

Also Published As

Publication number Publication date
JPH03153052A (en) 1991-07-01

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