JPH0590574A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device, which is capable of obtaining stably desired characteristics and is provided with MOSFETs, by a method wherein source and drain regions are formed in a self-alignment manner using the gate electrodes of the MOSFETs as masks and a constant amount is removed from the surfaces of the gate electrodes. CONSTITUTION:A P-channel MOSFET 6 is formed of source and drain regions 4, which consist of a P-type impurity diffused layer in an N-type well region 2 in an N-type semiconductor substrate 1, and a gate electrode 5, which consists of an N-type polycrystalline silicon film. An N-channel MOSFET 9 is formed of source and drain regions 7, which consist of an N-type impurity diffused layer in a P-type well region 3, and a gate electrode 8, which consists of an N-type polycrystalline silicon film. The gate electrodes of the MOSFETs of both channels are formed into a structure, wherein after the source and drain regions of the MOSFET of each channel are formed, a constant amount is removed from the surface of the polycrystalline silicon film. As a result, a semiconductor device capable of stably obtaining desired characteristics can be realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a semiconductor device, and more particularly to a structure of a gate electrode of MOSFET.

[0002]

2. Description of the Related Art In a conventional MOSFET, impurities are introduced into a polycrystalline silicon film formed on the entire surface of a semiconductor substrate and patterned into a gate electrode of the MOSFET, and then used as a mask when forming a source / drain region of the MOSFET. The obtained polycrystalline silicon film was used as it was as a gate electrode.

[0003]

However, there is the following problem in using the polycrystalline silicon film, which has been used as a mask as it is when forming the source / drain regions of the MOSFET, as it is as a gate electrode as in the prior art.

For example, when a polycrystalline silicon film into which an N-type impurity is introduced is used as a mask for forming a source / drain region of a P-channel MOSFET, a P-type impurity is implanted into the N-type polycrystalline silicon film. Therefore, the N-type impurity concentration in the polycrystalline silicon film is reduced, and the P-type impurity concentration is N
Type impurity concentration is exceeded, P channel MOSFET
The gate electrode becomes P-type. Then, when the N-type polycrystalline silicon film is the gate electrode, the enhancement-type P-channel MOSFET is changed to the depletion type because the gate electrode is changed to the P-type.

Further, when the N-type polycrystalline silicon film is used as a mask for forming the source / drain regions of the N-channel MOSFET, N-type impurities are further injected into the N-type polycrystalline silicon film, so that the gate electrode is formed. When the N-type impurity concentration in the inside becomes extremely high and silicide is formed on the gate electrode, the silicidation is hindered and the resistance value of the silicide becomes high.

As one of the methods of preventing these phenomena, there is a method of reducing the amount of impurities when forming the source / drain regions and reducing the amount of impurities entering the gate electrode when forming the source / drain regions. So the source
Since the resistance value of the drain region becomes high, MOSFE
The characteristic of T deteriorates.

There is a method of increasing the N-type impurity concentration in the polycrystalline silicon in advance in order to prevent the polarity reversal of the gate electrode of the P-channel MOSFET, but it is impossible to exceed the solid solution limit of impurities. With the recent miniaturization of semiconductor devices, the thickness of the gate electrode tends to be reduced, so that the amount of impurities that can be dissolved in the gate electrode tends to decrease. For this reason, it has become impossible to introduce a sufficient amount of impurities to prevent polarity inversion of the gate electrode.

Further, the introduction of excessive impurities into the polycrystalline silicon film causes the impurities to enter the gate film under the gate electrode or the silicon under the gate film, which adversely affects the characteristics of the MOSFET.

Further, N in polycrystalline silicon is previously prepared.
To increase the type impurity concentration is to increase the N channel MO
The impurity concentration in the gate electrode after the formation of the source / drain regions of the SFET is further increased, and the formation of silicide on the gate electrode is further hindered.

As described above, the conventional gate electrode structure has many problems. Therefore, the present invention is intended to solve these problems, and it is an object of the present invention to provide a structure of a gate electrode used as a mask when forming a source / drain region in a semiconductor device including a MOSFET on the surface of a semiconductor substrate. An object of the present invention is to provide a semiconductor device equipped with a MOSFET capable of stably obtaining desired characteristics by eliminating deterioration and instability of various characteristics due to the above.

[0011]

The semiconductor device of the present invention comprises:
In a semiconductor device having a MOSFET on the surface of a semiconductor substrate, a source / drain region is formed in a self-aligned manner by using a gate electrode of the MOSFET as a mask, and a fixed amount from the surface of the gate electrode after the source / drain region is formed. It is characterized by comprising a MOSFET having a gate electrode composed of the remaining portion after removal of.

[0012]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a structural sectional view of a semiconductor device according to the present invention, showing an example of a structure in which an N-channel MOSFET and a P-channel MOSFET are formed on the same substrate.

An N type well region 2 is formed in an N type semiconductor substrate 1.
And a P-type well region 3 are formed. A P-channel MOSFET 6 is formed in the N-type well region 2 by a source / drain region 4 made of a P-type impurity diffusion layer and a gate electrode 5 made of an N-type polycrystalline silicon film. Source composed of N-type impurity diffusion layer
An N-channel MOSFET 9 is formed by the drain region 7 and the gate electrode 8 made of an N-type polycrystalline silicon film. The gate electrodes of the MOSFETs of both channels have a structure in which a certain amount is removed from the surface of the polycrystalline silicon after forming the source / drain regions of each channel.

Each MOSFET is isolated from surrounding elements by an element isolation film 10. A gate oxide film 11 is provided below the gate electrodes 5 and 8. FIG. 2 shows an embodiment of a method for manufacturing a semiconductor device of the present invention.
A description will be given based on (a) to FIG. 2 (d).

First, an N-type well region 2 and a P-type well region 3 are formed in the N-type semiconductor substrate 1, and then an element isolation film 10 and a gate film 11 are formed on the surface of the N-type semiconductor substrate 1. This state is shown in FIG.

Next, about 6000 is formed on the entire surface of the semiconductor substrate 1.
A polycrystalline silicon film of Å is formed and 10 ¹⁸ is formed by the thermal diffusion method.
About 10 ²⁰ pieces / cm ³ of phosphorus is introduced to form an N-type polycrystalline silicon film. Pattern by photo-etching, MO
After forming the gate electrodes 5 and 8 of the SFET, the source / drain regions 4 of the P-channel MOSFET and the N-channel MOSFET 4 are formed using the gate electrode as a mask.
Form 7. The source / drain region 4 of the P-channel MOSFET contains boron fluoride ions at 1 at 80 KeV.
It is formed by implanting x10 ^{15 to} 5x10 ¹⁵ / cm ² , and at this time, about 10 ²⁰ boron ions are implanted into the gate electrode of the P-channel MOSFET at about 1000 Å from the surface. Also, N channel MOSFE
The source / drain region 7 of T contains phosphorus ions at 60K.
formed by implanting 1x10 ¹⁵ ~5x10 ¹⁵ pieces / cm ² in eV, this time, is in the gate electrode of the N-channel MOSFET, and in the surface of about 2000 Å, about 10 ²⁰ phosphorus ions are implanted. This state is shown in FIG.

Next, a silicon oxide film 12 of about 1 μm is formed on the entire surface of the semiconductor substrate by chemical vapor deposition, and further,
To flatten the surface, a coating film, for example, a silica coating film, is applied on the silicon oxide film 12 by about 1 μm. next,
Sputter etching method using argon gas or C
The silicon oxide film 12 and the silica coating film are etched at a constant rate until the surfaces of the gate electrodes 5 and 8 are exposed by a reactive ion etching method using a gas such as 2F6, CHF3, CF4 or the like. This state is shown in FIG.

Next, about 2000 Å is removed by etching from the exposed surfaces of the gate electrodes 5 and 8. This allows
When the source / drain regions 4 and 7 are formed, the impurities implanted into the surfaces of the gate electrodes 5 and 8 are removed. This state is shown in FIG.

After that, through the usual process, MOSF
ET is formed.

Although the specific description has been given based on the embodiment,
The present invention is not limited to the above-mentioned embodiment, and for example, the introduction of impurities into the polycrystalline silicon film formed on the entire surface of the semiconductor substrate can be performed by ion implantation.
The present invention can be applied even when the introduced impurities are P-type impurities. Further, the structure of the MOSFET is not limited to the single drain structure, but is applicable to all MOSFETs such as the LDD structure in which the source / drain regions are formed using the gate electrode as a mask.

[0022]

As described above, according to the present invention, in the semiconductor device having the MOSFET on the surface of the semiconductor substrate, the gate electrode of the MOSFET is removed from the surface by a certain amount after the source / drain regions are formed. By having such a structure, it is possible to eliminate the deterioration and instability of various characteristics due to the structure of the gate electrode and to obtain a desired effect in a stable manner.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a structure of a semiconductor device of the present invention.

FIG. 2 is a process sectional view showing an embodiment of a method for manufacturing a semiconductor device of the present invention.

[Explanation of symbols]

 1 semiconductor substrate 2 N-type well region 3 P-type well region 4 source / drain region of P-channel MOSFET 5 gate electrode of P-channel MOSFET 6 P-channel MOSFET 7 source / drain region of N-channel MOSFET 8 gate electrode of N-channel MOSFET 9 N-channel MOSFET 10 Element isolation film 11 Gate oxide film 12 Silicon oxide film

Claims (1)

[Claims] 1. A semiconductor device comprising a MOSFET on the surface of a semiconductor substrate, the source / drain regions formed in a self-aligned manner using the gate electrode of the MOSFET as a mask, and the gate electrode after the source / drain regions are formed. A semiconductor device comprising: a MOSFET having a gate electrode formed of a remaining portion obtained by removing a certain amount from the surface of the semiconductor device.