JPH0581864B2 - - Google Patents
Info
- Publication number
- JPH0581864B2 JPH0581864B2 JP63129724A JP12972488A JPH0581864B2 JP H0581864 B2 JPH0581864 B2 JP H0581864B2 JP 63129724 A JP63129724 A JP 63129724A JP 12972488 A JP12972488 A JP 12972488A JP H0581864 B2 JPH0581864 B2 JP H0581864B2
- Authority
- JP
- Japan
- Prior art keywords
- pin
- measurement
- pins
- impedance
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000005259 measurement Methods 0.000 claims description 35
- 238000012360 testing method Methods 0.000 claims description 31
- 238000007689 inspection Methods 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 8
- 230000002950 deficient Effects 0.000 claims description 3
- 230000004044 response Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 7
- 239000003990 capacitor Substances 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000001514 detection method Methods 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000012217 deletion Methods 0.000 description 3
- 230000037430 deletion Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 1
- 238000013480 data collection Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
- 238000002847 impedance measurement Methods 0.000 description 1
- 238000010977 unit operation Methods 0.000 description 1
Landscapes
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Tests Of Electronic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63129724A JPH01299473A (ja) | 1988-05-27 | 1988-05-27 | 回路基板検査方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63129724A JPH01299473A (ja) | 1988-05-27 | 1988-05-27 | 回路基板検査方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01299473A JPH01299473A (ja) | 1989-12-04 |
| JPH0581864B2 true JPH0581864B2 (enrdf_load_stackoverflow) | 1993-11-16 |
Family
ID=15016630
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63129724A Granted JPH01299473A (ja) | 1988-05-27 | 1988-05-27 | 回路基板検査方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01299473A (enrdf_load_stackoverflow) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114417778B (zh) * | 2022-01-24 | 2024-09-27 | 韩熔 | 借助结点电特征求取电路网表的方法 |
-
1988
- 1988-05-27 JP JP63129724A patent/JPH01299473A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01299473A (ja) | 1989-12-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE60002518T2 (de) | Verfahren und Vorrichtung zum adaptiven Lernen von Testfehlern zur Verminderung der Gesamtzahl von Testmessungen erforderlich in Echtzeit | |
| US5432460A (en) | Apparatus and method for opens and shorts testing of a circuit board | |
| JPH0581864B2 (enrdf_load_stackoverflow) | ||
| JP4160656B2 (ja) | プリント回路基板のテスト方法 | |
| JP3784479B2 (ja) | 回路基板検査方法 | |
| JP3049446B2 (ja) | 回路基板検査装置における測定用ピンの接触不良検出方法 | |
| JP3329481B2 (ja) | 回路基板検査装置におけるショートグループ構成方法 | |
| JP2005164373A (ja) | アナログ回路の故障検出シミュレーションシステム | |
| KR100476740B1 (ko) | 인쇄회로기판상의 rlc 병렬 회로 검사 방법 | |
| JP3147855B2 (ja) | 実装基板の不良検査方法 | |
| JP3241777B2 (ja) | インサーキットテスタ用オープンテスト装置 | |
| JP3276755B2 (ja) | 実装部品のリードの半田付け不良検出方法 | |
| JPH0511022A (ja) | 回路基板検査装置 | |
| JPH06160487A (ja) | Ｃｍｏｓ型集積回路のテストパターンおよび試験方法，テストパターンの作成方法 | |
| US6850860B2 (en) | Semiconductor device testing apparatus and test method therefor | |
| JP3047115B2 (ja) | 回路基板検査装置における実装基板のインピーダンス関連データ作成方法 | |
| JPH09172300A (ja) | プリント板ユニットの外観検査方法及び装置 | |
| JP4282589B2 (ja) | 回路基板検査装置および回路基板検査方法 | |
| JPH0450535B2 (enrdf_load_stackoverflow) | ||
| JPH04315068A (ja) | プリント回路板の検査装置 | |
| JP6821458B2 (ja) | 検査用データ作成装置および検査用データ作成方法 | |
| JPH10186003A (ja) | 部品検査装置 | |
| JP2546723B2 (ja) | 回路基板検査装置における低インピーダンス検出方法 | |
| JPH0287082A (ja) | プローブピン接触不良判断機能を有するインサーキットテスタ | |
| KR20160006119A (ko) | 검사용 데이터 작성 장치, 검사용 데이터 작성 방법, 기록 매체에 기록된 프로그램 및 그 프로그램을 기록한 기록 매체 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |