JPH0579196B2 - - Google Patents
Info
- Publication number
- JPH0579196B2 JPH0579196B2 JP2792386A JP2792386A JPH0579196B2 JP H0579196 B2 JPH0579196 B2 JP H0579196B2 JP 2792386 A JP2792386 A JP 2792386A JP 2792386 A JP2792386 A JP 2792386A JP H0579196 B2 JPH0579196 B2 JP H0579196B2
- Authority
- JP
- Japan
- Prior art keywords
- plating
- etching
- metal
- copper foil
- etching resist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000007747 plating Methods 0.000 claims description 39
- 238000005530 etching Methods 0.000 claims description 38
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 25
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 24
- 238000000034 method Methods 0.000 claims description 18
- 239000011889 copper foil Substances 0.000 claims description 15
- 239000010970 precious metal Substances 0.000 claims description 15
- 239000010953 base metal Substances 0.000 claims description 12
- 229910052759 nickel Inorganic materials 0.000 claims description 12
- 229910052802 copper Inorganic materials 0.000 claims description 10
- 239000010949 copper Substances 0.000 claims description 10
- 239000010410 layer Substances 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 229910052751 metal Inorganic materials 0.000 claims description 8
- 239000002184 metal Substances 0.000 claims description 8
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 6
- 229910052737 gold Inorganic materials 0.000 claims description 6
- 239000010931 gold Substances 0.000 claims description 6
- 229910000510 noble metal Inorganic materials 0.000 claims description 5
- 238000009713 electroplating Methods 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 4
- 239000004332 silver Substances 0.000 claims description 4
- 238000010030 laminating Methods 0.000 claims description 2
- 239000011241 protective layer Substances 0.000 claims description 2
- 239000004020 conductor Substances 0.000 description 9
- 239000007788 liquid Substances 0.000 description 9
- 239000002585 base Substances 0.000 description 6
- NLKNQRATVPKPDG-UHFFFAOYSA-M potassium iodide Chemical compound [K+].[I-] NLKNQRATVPKPDG-UHFFFAOYSA-M 0.000 description 6
- 239000000843 powder Substances 0.000 description 6
- 239000000758 substrate Substances 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- FVAUCKIRQBBSSJ-UHFFFAOYSA-M sodium iodide Chemical compound [Na+].[I-] FVAUCKIRQBBSSJ-UHFFFAOYSA-M 0.000 description 3
- ZCYVEMRRCGMTRW-UHFFFAOYSA-N 7553-56-2 Chemical compound [I] ZCYVEMRRCGMTRW-UHFFFAOYSA-N 0.000 description 2
- LTPBRCUWZOMYOC-UHFFFAOYSA-N Beryllium oxide Chemical compound O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 2
- CPLXHLVBOLITMK-UHFFFAOYSA-N Magnesium oxide Chemical compound [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 229910052740 iodine Inorganic materials 0.000 description 2
- 239000011630 iodine Substances 0.000 description 2
- HSZCZNFXUDYRKD-UHFFFAOYSA-M lithium iodide Chemical compound [Li+].[I-] HSZCZNFXUDYRKD-UHFFFAOYSA-M 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910001516 alkali metal iodide Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- QZPSXPBJTPJTSZ-UHFFFAOYSA-N aqua regia Chemical compound Cl.O[N+]([O-])=O QZPSXPBJTPJTSZ-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 1
- FBAFATDZDUQKNH-UHFFFAOYSA-M iron chloride Chemical compound [Cl-].[Fe] FBAFATDZDUQKNH-UHFFFAOYSA-M 0.000 description 1
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 1
- 239000000395 magnesium oxide Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 230000003678 scratch resistant effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 235000009518 sodium iodide Nutrition 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は混成集積回路用基板の製造法、詳しく
は貴金属メツキによる回路を形成する回路基板の
製造法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a substrate for a hybrid integrated circuit, and more particularly to a method for manufacturing a circuit board on which a circuit is formed by plating precious metals.
一般に混成集積回路用基板は半導体を搭載し、
金ワイヤーボンデングする必要があり、また導体
の防錆、ハンダ付性等を目的とした貴金属メツキ
がされることがある。近年、高密度実装の要求か
ら、金属ベース基板の使用が急速に増大してき
た。金属ベース基板はその構成上、従来から行わ
れていた機械的なメツキリード導体の除去方法で
は、絶縁層にクラツクを生じたり、絶縁層を破壊
して、導体とベース金属間の絶縁に不良現象の問
題を生ずるため、エツチング方法によつて除去さ
れている。
Generally, hybrid integrated circuit boards are equipped with semiconductors,
Gold wire bonding is required, and precious metal plating is sometimes used to prevent rust and improve solderability of the conductor. In recent years, the use of metal-based substrates has rapidly increased due to the demand for high-density packaging. Due to the structure of a metal base board, the conventional method of mechanically removing plated lead conductors may cause cracks in the insulating layer, destroy the insulating layer, and cause defects in the insulation between the conductor and the base metal. Since it causes problems, it has been removed by etching methods.
一方、エツチングにより除去する方法としては
例えば、メツキリード導体上に耐メツキテープを
張る方法がある(特開昭59−31097号公報特開昭
58−225697号公報)。この方法はメツキ後にテー
プを除いてメツキリード導体部を銅エツチングで
除去しようとするものである。
On the other hand, as a method for removing by etching, for example, there is a method of applying a plating-resistant tape on the plating lead conductor (Japanese Patent Application Laid-Open No. 59-31097,
58-225697). In this method, after plating, the tape is removed and the plated lead conductor portion is removed by copper etching.
このような方法では回路導体間にリードライン
が有り、回路導体間は狭いものでは耐レツキテー
プをリードラインに貼り付けることが不可能であ
る。また写真法による耐メツキレジストを設ける
方法も考えられるが、微細な回路導体間のリード
ラインでは極めて微細な幅のマスキングになるた
め、メツキ時に剥れ又はメツキ液のしみ込み等に
より貴金属がメツキされてしまい、銅エツチング
では該貴金属メツキリードラインを切断除去する
ことが出来なくなる問題があつた。 In such a method, there are lead lines between the circuit conductors, and if the distance between the circuit conductors is narrow, it is impossible to attach the scratch-resistant tape to the lead lines. Another option is to apply a plating-resistant resist using a photographic method, but since the lead lines between fine circuit conductors are masked with extremely fine widths, precious metals may peel off during plating or the plating solution may seep in. Therefore, there was a problem that the precious metal plated lead line could not be cut and removed by copper etching.
本発明はかかる銅エツチングした際にリードラ
イン除去不足による絶縁不良を完全に防止し、微
細な回路形成を円滑に行うために、メツキリード
ライン部分も貴金属メツキ、次いで回路基板に感
光性液状エツチングレジストを設けて写真法にて
メツキリードライン部分を露出せしめ、貴金属を
エツチング後、ニツケル及び銅をエツチングし、
メツキリードライン部分に除去する回路基板の製
造法を提供するものである。 In the present invention, in order to completely prevent insulation defects due to insufficient removal of lead lines when performing such copper etching, and to smoothly form fine circuits, the plating lead line portions are also plated with precious metals, and then a photosensitive liquid etching resist is applied to the circuit board. After exposing the plated lead line part using the photographic method, etching the precious metal, etching the nickel and copper,
The present invention provides a method for manufacturing a circuit board in which plating is removed at the lead line portion.
すなわち本発明は、ベース金属板上に絶縁層を
介して銅箔を積層して成る金属ベース基板の貴金
属メツキした回路基板の製造法において、ベース
金属面に除去可能な保護層を形成し、又他方の銅
箔表面にエツチングレジストを設ける第1工程、
銅箔をエツチングし、次いで前記エツチングレ
ジストを除去する第2工程、
前記銅箔表面にニツケルメツキ次いで貴金属メ
ツキする電解メツキの第3工程、
写真法でメツキ用リード及びメツキ用電極を除
く部分にエツチングレジストを設ける第4工程、
前記メツキ用リード及びメツキ用電解部分の貴
金属をエツチングし、さらにニツケル及び銅をエ
ツチングする第5工程、及び
前記エツチングレジストを除去する第6工程で
構成することを特徴する貴金属メツキ回路基板の
製造法である。
That is, the present invention provides a method for manufacturing a precious metal-plated circuit board of a metal base substrate formed by laminating copper foil on a base metal plate with an insulating layer interposed therebetween, in which a removable protective layer is formed on the base metal surface, and A first step of providing an etching resist on the surface of the other copper foil, a second step of etching the copper foil and then removing the etching resist, a third step of electrolytic plating in which the surface of the copper foil is plated with nickel and then plated with a precious metal, a photographic method. a fourth step of providing an etching resist on a portion other than the plating lead and the plating electrode; a fifth step of etching the precious metal of the plating lead and the plating electrolytic portion, and further etching nickel and copper; and a fifth step of etching the etching resist. This method of manufacturing a precious metal plated circuit board is characterized by comprising a sixth step of removing.
以下本発明を図面により説明する。 The present invention will be explained below with reference to the drawings.
第1図は本発明の混成集積回路基板で、ベース
金属1に絶縁層2を介して銅箔3を積層し、さら
に銅箔3にニツケル4及び貴金属5を順次積層し
た完成断面図である。 FIG. 1 is a completed cross-sectional view of a hybrid integrated circuit board according to the present invention, in which a copper foil 3 is laminated on a base metal 1 via an insulating layer 2, and further, nickel 4 and a noble metal 5 are laminated in sequence on the copper foil 3.
本発明の回路基板の製造工程は、まず第1工程
をしてベース金属1の一方の面全体に絶縁層2を
介して銅箔3が積層されている基板を用いて、前
記銅箔3に回路として必要な部分、メツキ用電極
及びメツキ用リード部分に感光性液状エツチング
レジスト6を被覆し、ベース金属1の他方の金属
面に保護フイルム7を貼り合せる(第2図A,
B)。次に露出された銅箔3をエツチングして回
路を形成し、また同時に電解メツキに必要なメツ
キ用電極8及びメツキ用リード9を形成させ、そ
して感光性液状エツチンググレジスト6を除去す
る(第3図A,B)。第3工程として示している
第4図A,Bは、回路部分とメツキ用電極及びメ
ツキ用リードに電解メツキでニツケル4と貴金属
5とを順次メツキして積層したものであり、第5
図A,Bは最上層として貴金属5がなすメツキ用
電極とメツキ用リードを除去するため、回路部と
なる部分に感光性液状エツチングレジスト6を被
覆した状態を示す(第4工程)。 In the manufacturing process of the circuit board of the present invention, first, a first step is performed, using a board in which a copper foil 3 is laminated on the entire surface of one side of a base metal 1 with an insulating layer 2 interposed therebetween. The parts necessary for the circuit, the plating electrodes and the plating leads are coated with a photosensitive liquid etching resist 6, and a protective film 7 is pasted on the other metal surface of the base metal 1 (see Fig. 2A,
B). Next, the exposed copper foil 3 is etched to form a circuit, and at the same time, a plating electrode 8 and a plating lead 9 necessary for electrolytic plating are formed, and the photosensitive liquid etching resist 6 is removed (first step). Figure 3 A, B). 4A and 4B shown as the third step, nickel 4 and precious metal 5 are sequentially plated and laminated on the circuit part, the plating electrode, and the plating lead by electrolytic plating.
Figures A and B show a state in which a photosensitive liquid etching resist 6 is coated on the portion that will become the circuit section in order to remove the plating electrode and the plating lead formed by the noble metal 5 as the uppermost layer (fourth step).
第5工程はまず露出された貴金属5のみをエツ
チングするエツチング剤で除去し(第6図A,
B)さらにニツケル4及び銅箔3とを同時にエツ
チングするエツチング剤で除去する(第7図A,
B)。本発明はさらに、最終的に必要な部分とし
て感光性液状エツチングレジスト6で被覆された
該エツチングレジスト6を除去し(第8図A,
B)、ベース金属の保護フイルム7を取り除いて、
必要に応じてベース金属1の外周を切断する(第
9図A,B)することにより、第1図に示す回路
基板を製造することができる。 In the fifth step, first, only the exposed precious metal 5 is removed using an etching agent (see Fig. 6A,
B) Furthermore, nickel 4 and copper foil 3 are removed using an etching agent that etches them at the same time (Fig. 7A,
B). The present invention further includes removing the etching resist 6 coated with the photosensitive liquid etching resist 6 as a final necessary part (FIG. 8A,
B), remove the protective film 7 of the base metal,
By cutting the outer periphery of the base metal 1 as necessary (FIGS. 9A and 9B), the circuit board shown in FIG. 1 can be manufactured.
本発明のベース金属1として用いられる材質
は、熱伝導性の良いアルミニウム、銅、アルミニ
ウム合金、銅合金及びアルマイト等の金属板であ
り、絶縁層2としては、例えば良熱伝導性の無機
粉体、例えばアルミナ粉、ボロンナイトライド
粉、ベリリア粉、マグネシア粉および石英粉等を
配合したエポキシ樹脂、ポリイミド樹脂およびフ
エノール樹脂等の熱硬化性樹脂は熱伝導性が良好
であり、このベース金属1を絶縁化する樹脂とし
て好ましい。 The material used as the base metal 1 of the present invention is a metal plate such as aluminum, copper, aluminum alloy, copper alloy, or alumite, which has good thermal conductivity, and the material used as the insulating layer 2 is, for example, an inorganic powder with good thermal conductivity. For example, thermosetting resins such as epoxy resins, polyimide resins, and phenolic resins containing alumina powder, boron nitride powder, beryllia powder, magnesia powder, quartz powder, etc. have good thermal conductivity. It is preferable as a resin for insulation.
本発明によればエツチングレジストは解像性の
みがメツキリード(メツキ用電極及びメツキ用リ
ード)部分の切断幅を支配することになるため、
例えば感光性液状エツチングレジスト7等を用い
ることにより、超微細なメツキリードも切断でき
ることになる。また貴金属メツキとしては、金ワ
イヤーボンデング性のよい純金または純銀メツキ
が好ましく、従来から使用されているものでよ
い。次に最上層にメツキされた金または銀をエツ
チングするためには王水が考えらえるが取扱上問
題があるので本発明では、沃素とアルカリ金属沃
化物、例えば沃化ソーダ、沃化リチウム、沃化カ
リウム等が好ましく高速度で金、銀をエツチング
する。次いで下層のニツケル及び銅は塩化溶液で
良好にエツチングされる。 According to the present invention, only the resolution of the etching resist controls the cutting width of the plating lead (electrode for plating and lead for plating).
For example, by using a photosensitive liquid etching resist 7 or the like, even ultra-fine plating leads can be cut. Further, as the noble metal plating, pure gold or pure silver plating with good gold wire bonding properties is preferable, and any conventionally used plating may be used. Next, aqua regia can be used to etch the gold or silver plated on the top layer, but since there are handling problems, in the present invention, iodine and alkali metal iodides such as sodium iodide, lithium iodide, Potassium iodide or the like is preferable and etches gold and silver at high speed. The underlying nickel and copper are then etched well with a chloride solution.
以下に本発明の実施例を示すが、本発明はこれ
に限定されるものではない。
Examples of the present invention are shown below, but the present invention is not limited thereto.
実施例
アルミニウムベース銅張り絶縁基板(電気化学
工業(株)製、商品名デンカHITTプレート)のベー
スアルミニウム面に保護フイルムをラミネートし
銅箔面に感光性液状エツチングレジストをコーテ
ングした。次いで乾燥後、写真法にて画像を形成
せしめ、銅エツチングで回路を形成、次いでエツ
チングレジストを除去し、アルミベース端面に保
護テープを張り、電解ニツケル厚さ5μmと電解
純金厚さ0.5μmとをメツキした。次に感光性液状
エツチングレジストをコーテングし、乾燥後、写
真法でメツキリード(メツキ用電極及びメツキ用
リード)部を露出させ、ヨード50gとヨー化カリ
ウム250g及び700gの組成液で処理し、純金をエ
ツチングした。次いで水洗後塩化鉄(40゜ボーメ)
液でニツケル及び銅をエツチングした。次いで感
光性液状エツチングレジストを除去して、導体間
150μmにメツキリードを有するパターンからメ
ツキリードを除去した微細回路を形成した。Example A protective film was laminated on the base aluminum surface of an aluminum base copper-clad insulating substrate (manufactured by Denki Kagaku Kogyo Co., Ltd., trade name: Denka HITT Plate), and a photosensitive liquid etching resist was coated on the copper foil surface. After drying, an image was formed using a photographic method, a circuit was formed by copper etching, the etching resist was removed, a protective tape was applied to the end face of the aluminum base, and electrolytic nickel with a thickness of 5 μm and electrolytic pure gold with a thickness of 0.5 μm was applied. I was disappointed. Next, a photosensitive liquid etching resist is coated, and after drying, the plating leads (electrodes for plating and leads for plating) are exposed using a photographic method, and treated with a composition solution of 50 g of iodine and 250 g and 700 g of potassium iodide to remove pure gold. Etched. Then, after washing with water, iron chloride (40° Baume)
Nickel and copper were etched with the solution. The photosensitive liquid etching resist is then removed and the areas between the conductors are
A fine circuit was formed by removing the plating lead from a pattern having a plating lead at 150 μm.
本発明により金ワイヤーボンデング性のすぐれ
た微細回路金属ベース基板が製造でき、メツキリ
ード残留によるパターンシユート不良も発生しな
く、高密度実装用としての微細回路基板製造に極
めて有用である。
According to the present invention, a fine circuit metal base substrate with excellent gold wire bonding properties can be manufactured, and pattern shoot defects due to residual lead do not occur, and the present invention is extremely useful for manufacturing fine circuit boards for high-density packaging.
第1図は本発明による貴金属メツキ微細回路金
属ベース基板の断面図である。第2図A〜第9図
Aは本発明工程を示す断面図であり、第2図B〜
第9図Bは平面図である。
1……ベース金属板、2……絶縁層、3……銅
箔、4……ニツケル、5……貴金属、6……エツ
チングレジスト、7…保護フイルム、8……メツ
キ用電極、9……メツキ用リード。
FIG. 1 is a cross-sectional view of a noble metal plated microcircuit metal base substrate according to the present invention. 2A to 9A are cross-sectional views showing the steps of the present invention, and FIGS. 2B to 9A are cross-sectional views showing the steps of the present invention.
FIG. 9B is a plan view. DESCRIPTION OF SYMBOLS 1... Base metal plate, 2... Insulating layer, 3... Copper foil, 4... Nickel, 5... Precious metal, 6... Etching resist, 7... Protective film, 8... Electrode for plating, 9... Lead for Metsuki.
Claims (1)
して成る金属ベース基板の貴金属メツキした回路
基板の製造法において、ベース金属面に除去可能
な保護層を形成し、又他方の銅箔表面にエツチン
グレジストを設ける第1工程、 銅箔をエツチングし、次いで前記エツチングレ
ジストを除去する第2工程、 前記銅箔表面にニツケルメツキ次いで貴金属メ
ツキする電解メツキの第3工程、 写真法でメツキ用リード及びメツキ用電極を除
く部分にエツチングレジストを設ける第4工程、 前記メツキ用リード及びメツキ用電極部分の貴
金属をエツチングし、さらにニツケル及び銅をエ
ツチングする第5工程、及び 前記エツチングレジストを除去する第6工程で
構成することを特徴とする貴金属メツキ回路基板
の製造法。 2 貴金属が金または銀であることを特徴とする
特許請求の範囲第1項記載の回路基板の製造法。[Claims] 1. A method for manufacturing a noble metal-plated circuit board of a metal base board formed by laminating copper foil on a base metal plate with an insulating layer interposed therebetween, in which a removable protective layer is formed on the base metal surface. , a first step of providing an etching resist on the surface of the other copper foil, a second step of etching the copper foil and then removing the etching resist, a third step of electrolytic plating in which the surface of the copper foil is plated with nickel and then with a precious metal. a fourth step of applying an etching resist to the parts other than the plating lead and the plating electrode using a photographic method; a fifth step of etching the precious metal of the plating lead and the plating electrode part, and further etching the nickel and copper; A method for manufacturing a noble metal plated circuit board, comprising a sixth step of removing etching resist. 2. The method for manufacturing a circuit board according to claim 1, wherein the precious metal is gold or silver.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2792386A JPS62186588A (en) | 1986-02-13 | 1986-02-13 | Manufacture of noble metal plated circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2792386A JPS62186588A (en) | 1986-02-13 | 1986-02-13 | Manufacture of noble metal plated circuit board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62186588A JPS62186588A (en) | 1987-08-14 |
JPH0579196B2 true JPH0579196B2 (en) | 1993-11-01 |
Family
ID=12234404
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2792386A Granted JPS62186588A (en) | 1986-02-13 | 1986-02-13 | Manufacture of noble metal plated circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62186588A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01260886A (en) * | 1988-04-11 | 1989-10-18 | Minolta Camera Co Ltd | Manufacture of printed board |
-
1986
- 1986-02-13 JP JP2792386A patent/JPS62186588A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS62186588A (en) | 1987-08-14 |
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