JPS62186588A - Manufacture of noble metal plated circuit board - Google Patents
Manufacture of noble metal plated circuit boardInfo
- Publication number
- JPS62186588A JPS62186588A JP2792386A JP2792386A JPS62186588A JP S62186588 A JPS62186588 A JP S62186588A JP 2792386 A JP2792386 A JP 2792386A JP 2792386 A JP2792386 A JP 2792386A JP S62186588 A JPS62186588 A JP S62186588A
- Authority
- JP
- Japan
- Prior art keywords
- plating
- metal
- circuit board
- etching
- noble metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910000510 noble metal Inorganic materials 0.000 title claims description 14
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 238000007747 plating Methods 0.000 claims description 32
- 238000005530 etching Methods 0.000 claims description 31
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 25
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 17
- 239000011889 copper foil Substances 0.000 claims description 15
- 239000010953 base metal Substances 0.000 claims description 12
- 229910052759 nickel Inorganic materials 0.000 claims description 11
- 229910052802 copper Inorganic materials 0.000 claims description 10
- 239000010949 copper Substances 0.000 claims description 10
- 239000010410 layer Substances 0.000 claims description 10
- 229910052751 metal Inorganic materials 0.000 claims description 8
- 239000002184 metal Substances 0.000 claims description 8
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 7
- 229910052737 gold Inorganic materials 0.000 claims description 6
- 239000010931 gold Substances 0.000 claims description 6
- 239000010970 precious metal Substances 0.000 claims description 6
- 238000009713 electroplating Methods 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- 238000010030 laminating Methods 0.000 claims description 2
- 239000011241 protective layer Substances 0.000 claims description 2
- 239000007788 liquid Substances 0.000 description 9
- 239000004020 conductor Substances 0.000 description 8
- 239000002585 base Substances 0.000 description 6
- 239000000843 powder Substances 0.000 description 6
- 239000000758 substrate Substances 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- ZCYVEMRRCGMTRW-UHFFFAOYSA-N 7553-56-2 Chemical compound [I] ZCYVEMRRCGMTRW-UHFFFAOYSA-N 0.000 description 3
- 229910052740 iodine Inorganic materials 0.000 description 3
- 239000011630 iodine Substances 0.000 description 3
- NLKNQRATVPKPDG-UHFFFAOYSA-M potassium iodide Chemical compound [K+].[I-] NLKNQRATVPKPDG-UHFFFAOYSA-M 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- LTPBRCUWZOMYOC-UHFFFAOYSA-N Beryllium oxide Chemical compound O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- FAPWRFPIFSIZLT-UHFFFAOYSA-M Sodium chloride Chemical compound [Na+].[Cl-] FAPWRFPIFSIZLT-UHFFFAOYSA-M 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- FBAFATDZDUQKNH-UHFFFAOYSA-M iron chloride Chemical compound [Cl-].[Fe] FBAFATDZDUQKNH-UHFFFAOYSA-M 0.000 description 2
- HSZCZNFXUDYRKD-UHFFFAOYSA-M lithium iodide Chemical compound [Li+].[I-] HSZCZNFXUDYRKD-UHFFFAOYSA-M 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 229910001868 water Inorganic materials 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- ZLMJMSJWJFRBEC-UHFFFAOYSA-N Potassium Chemical compound [K] ZLMJMSJWJFRBEC-UHFFFAOYSA-N 0.000 description 1
- 229910001516 alkali metal iodide Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- QZPSXPBJTPJTSZ-UHFFFAOYSA-N aqua regia Chemical compound Cl.O[N+]([O-])=O QZPSXPBJTPJTSZ-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 1
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 229910052700 potassium Inorganic materials 0.000 description 1
- 239000011591 potassium Substances 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000011780 sodium chloride Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は混成集積回路用基板の製造法、詳しくは貴金属
メッキによる回路を形成する回路基板の製造法に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a substrate for a hybrid integrated circuit, and more particularly to a method of manufacturing a circuit board on which a circuit is formed by plating a noble metal.
一般に混成集積回路用基板は半導体を搭載し、金ワイヤ
−ボンデングする必要があり、また導体の防錆、ハンダ
付性等を目的とした貴金属メッキがされることがある。In general, a hybrid integrated circuit board has a semiconductor mounted thereon and must be bonded with gold wire, and may be plated with a noble metal for the purpose of rust prevention, solderability, etc. of the conductor.
近年、高密度実装の要求から、金属ベース基板の使用が
急速に増大してきた。In recent years, the use of metal-based substrates has rapidly increased due to the demand for high-density packaging.
金属ベース基板はその構成上、従来から行われていた機
械的なメッキリード導体の除去方法では、絶縁層にクラ
ックを生じたり、絶縁層を破壊して、導体とベース金属
間の絶縁に不良現象の問題を生ずるため、エツチング方
法によって除去されている。Due to the structure of a metal base board, the conventional method of mechanically removing plated lead conductors may cause cracks in the insulating layer, destroy the insulating layer, and cause defects in the insulation between the conductor and the base metal. Since this causes problems, it is removed by an etching method.
〔発明が解決1〜ようとする問題点〕
−万、エツチングにより除去する方法としては例えば、
メッキリード導体上に耐メツキテープを張る方法がある
(特開昭59−31097号公報特開昭58−2256
97号公報〕。号公報法はメッキ後にテープを除いてメ
ッキリード導体部を銅エツチングで除去しようとするも
のである。[Problems that the invention attempts to solve 1 to 1]
There is a method of applying plating-resistant tape on the plated lead conductor (Japanese Patent Application Laid-Open No. 59-31097, Japanese Patent Application Laid-Open No. 58-2256).
Publication No. 97]. The method disclosed in the publication attempts to remove the tape after plating and remove the plated lead conductor portion by copper etching.
このような方法では回路導体間にリードラインが有り、
回路導体間が狭いものでは耐メツキテープをリードライ
ンに貼り付けることが不可能である。In this method, there is a lead line between the circuit conductors,
If the distance between circuit conductors is narrow, it is impossible to apply plating-resistant tape to the lead line.
また写真法により耐メツキレシストを設ける方法も考え
られるが、微細な回路導体間のリードラインでは極めて
微細な幅のマスキングになるため、メッキ時に剥れ又は
メッキ液のしみ込み等により貴金属がメッキされてしま
い、銅エツチングでは該貴金属メツキリ−ドラインを切
断除去することが出来なくなる問題があった。Another option is to use a photographic method to provide anti-metallic resist, but since the lead lines between minute circuit conductors are masked with extremely fine widths, precious metals may peel off during plating or the plating solution may seep in. However, there is a problem in that copper etching cannot cut and remove the precious metal plating lead line.
本発明はかかる銅エツチングした際にリードライン除去
不足による絶縁不良を完全に防止し、微細な回路形成を
円滑に行うために、メッキリードライン部分も貴金属メ
ッキ、次いで回路基板に感光性液状エツチングレジスト
を設置)て写真法にてメッキリードライン部分を露出せ
1〜め、貴金属をエツチング後、ニッケル及び銅をエツ
チング■−、メツキリ−ドライン部分を除去する回路基
板の製造法を提供するものである。In order to completely prevent insulation failure due to insufficient lead line removal when copper etching is performed, and to smoothly form fine circuits, the plated lead line portions are also plated with noble metal, and then the circuit board is coated with a photosensitive liquid etching resist. The present invention provides a method for manufacturing a circuit board in which the plated lead line portion is exposed using a photographic method (1), the precious metal is etched, the nickel and copper are etched, and the plated lead line portion is removed .
〔問題点を解決するための手段]
すなわち本発明は、ベース金属板上に絶縁層を介して銅
箔を積層して成る金属ベース基板の貴金属メッキした回
路基板の製造法において、ベース金属面に除去可能lc
保護層を形成し、又他力の銅箔表面にエツチングレジス
トを設ける第1工程、銅箔をエツチングし、次いで前記
エラチンブレジス)1除去する第2工程、
前記銅箔表面にニッケルメッキ次いで貴金属メッキする
電解メッキの第3工程、
写真法でメッキ用リード及びメッキ用電極を除く部分に
エツチングレゾストを段目る第4工程、前記メッキ用リ
ード及びメッキ用電極部分の責金属全エツチングし、さ
らにニッケル及び銅をLツチングする第5工程、及び
前記エツチングレジストを除去する第3工程で構成する
こと′f:特徴する貴金属メッキ回路基板の製造法であ
る。[Means for Solving the Problems] That is, the present invention provides a method for manufacturing a circuit board plated with a noble metal on a metal base board formed by laminating copper foil on a base metal plate via an insulating layer. removable lc
The first step is to form a protective layer and provide an etching resist on the surface of the copper foil.The second step is to etch the copper foil and then remove the etching resist.The surface of the copper foil is plated with nickel and then with a precious metal. The third step is electrolytic plating, and the fourth step is to apply etching resin to the areas other than the plating lead and plating electrode using a photographic method. and a fifth step of etching the copper, and a third step of removing the etching resist'f: This is a characteristic method for manufacturing a noble metal plated circuit board.
以下不発l311を図面により説明する。 。The misfire 1311 will be explained below with reference to the drawings. .
第1図は本発明の混成集積回路基板で、ベース金属1に
絶縁層2を介して銅箔3′f:積層し、さらに銅箔3に
ニッケル4及び貴金属5を順次積層した完成断面図であ
る。FIG. 1 is a completed cross-sectional view of the hybrid integrated circuit board of the present invention, in which a copper foil 3'f: is laminated on a base metal 1 via an insulating layer 2, and further, nickel 4 and noble metal 5 are laminated in sequence on the copper foil 3. be.
本発明の回路基板の製造工程は、まず第1工程葡してベ
ース金属1の一万の面全体に絶縁層2を介して銅箔3が
積層されている基板を用いて、前記銅箔3に回蕗として
必要な部分、メッキ用電極及びメッキ用リード部分に感
光性液状エツチングレゾストロを被覆し、ベース金属1
の他方の金属面に保護フィルム7を貼り合せる(第2図
A、B)。The manufacturing process of the circuit board of the present invention is carried out in the first step by using a substrate in which a copper foil 3 is laminated on the entire surface of a base metal 1 with an insulating layer 2 interposed therebetween. Then, coat the parts necessary for the refill, the plating electrode and the plating lead part with a photosensitive liquid etching resotro, and then apply the base metal 1.
A protective film 7 is attached to the other metal surface of the (FIG. 2A, B).
次に露出された銅箔3をエツチングして回路を形成し、
また同時に電解メッキに必要なメッキ用電極8及びメッ
キ用リード9を形成させ、そして感光性液状エツチング
レゾストロを除去する(第6図A、B)。第3工程とし
て示している第4図A。Next, the exposed copper foil 3 is etched to form a circuit,
At the same time, a plating electrode 8 and a plating lead 9 necessary for electrolytic plating are formed, and the photosensitive liquid etching resistor is removed (FIGS. 6A and 6B). FIG. 4A shows the third step.
Bは、回路部分とメッキ用電極及びメッキ用IJ−ドに
電解メッキでニッケル4と貴金属5とを順次メッキして
積層したものであり、第5図A、Bは最上層として貴金
属5がなすメッキ用電極とメッキ用リードを除去するた
め、回路部となる部分に感光性液状エツチングレゾスト
ロを被覆した状態を示す(第4工程)。B is a layered structure in which nickel 4 and noble metal 5 are sequentially plated and laminated by electrolytic plating on the circuit part, the plating electrode, and the plating IJ-de. In order to remove the plating electrode and the plating lead, the part that will become the circuit section is shown coated with a photosensitive liquid etching resostro (fourth step).
第5工程はまず露出された貴金属5のみをエツチングす
るエツチング剤で除去しく第6図A、 、 B)さらに
ニッケル4及び銅箔3とを同時にエツチングするエツチ
ング剤で除去する(第7図A、B)。In the fifth step, first, only the exposed noble metal 5 is removed using an etching agent (FIGS. 6A, 6B), and then the nickel 4 and the copper foil 3 are simultaneously removed using an etching agent (FIGS. 7A, 7B). B).
本発明はさらに、最終的に必要な部分として感光性液状
エツチングレジスト6で被覆された該エツチングレゾス
トロを除去しく第8図A、B)、ベース金属1の保護フ
ィルム7を取り除いて、必要に応じてベース金属1の外
周を切断する(第9図A、B)することにより、第1図
に示す回路基板を製造することができる。The present invention further provides that the etching resist coated with the photosensitive liquid etching resist 6 is removed as a final necessary part (FIGS. 8A and 8B), and the protective film 7 of the base metal 1 is removed as necessary. By cutting the outer periphery of the base metal 1 accordingly (FIGS. 9A and 9B), the circuit board shown in FIG. 1 can be manufactured.
本発明のベース金属1として用いられる材質は、熱伝導
性の良いアルミニウム、銅、アルミニウム合金、銅合金
及びアルマイト等の金属板であり、絶縁層2としては、
例えば良熱伝導性の無機粉体、例えばアルミナ粉、ボロ
ンナイトライド粉、ベリリア粉、マグネンア粉および石
英粉等を配合したエポキシ樹脂、ポリイミド樹脂および
フェノール樹脂等の熱硬化性樹脂は熱伝導性が良好であ
り、このベース金属1を絶縁化する樹脂として好ましい
。The material used as the base metal 1 of the present invention is a metal plate having good thermal conductivity such as aluminum, copper, aluminum alloy, copper alloy, and alumite.
For example, thermosetting resins such as epoxy resins, polyimide resins, and phenolic resins containing inorganic powders with good thermal conductivity, such as alumina powder, boron nitride powder, beryllia powder, magnenia powder, and quartz powder, have good thermal conductivity. It has good properties and is preferable as a resin for insulating the base metal 1.
本発明によればエツチングレジストは解像性のみがメッ
キリード(メッキ用電極及びメッキ用リード)部分の切
断幅を支配することになるため、例えば感光性液状エツ
チングレジスト7等を用いることにより、超微細なメッ
キリードも切断できることになる。また貴金属メッキと
しては、全9次に最上層にメッキされた金または銀をエ
ツチングするためには王水が考えられるが取扱上問題が
あるので本発明では、沃素とアルカリ金属沃化物、例え
ば沃化ソーダ、沃化リチウム、沃化カリウム等が好まし
く高速度で金、銀をエツチングする。According to the present invention, only the resolution of the etching resist controls the cutting width of the plating lead (plating electrode and plating lead) portion, so by using, for example, a photosensitive liquid etching resist 7, etc. This means that even minute plated leads can be cut. In addition, for noble metal plating, aqua regia can be used to etch the gold or silver plated on the top layer of all 9 layers, but since there are handling problems, the present invention uses iodine and alkali metal iodides, such as iodine. Sodium chloride, lithium iodide, potassium iodide, etc. are preferable, and they can etch gold and silver at high speed.
次いで下層のニッケル及び銅は塩化鉄溶液で良好。Next, the nickel and copper in the lower layer are treated well with iron chloride solution.
にエツチングされる。Etched by.
以下に本発明の実施例を示すが、本発明はこれに限定さ
れるものではない。Examples of the present invention are shown below, but the present invention is not limited thereto.
実施例
アルミニウムベース銅張り絶縁基板(電気化学工業(株
)製、商品名デンカHI’l”Tプレート)のベースア
ルミニウム面に保護フィルムをラミネートし銅箔面に感
光性液状エラチンブレジス)t−コーテングした。次い
で乾燥後、写真法にて画像を形成せしめ、銅エツチング
で回路を形成、次いでエツチングレジストを除去し、ア
ルミベース端面に保護テープを張り、電解ニッケル厚さ
5μmと電解純金厚さ0.5μmとをメッキした。次に
感光性液状エツチングレジストをコーテングし、乾燥後
、写真法でメッキリード(メッキ用電極及びメッキ用リ
ード)部を露出させ、ヨード5011とヨー化(8〕
カリウム250I及び水700gの組成液で処理し、純
金をエツチングした。次いで水洗後塩化鉄(40°ボー
メ)液でニッケル及び銅をエツチングした。次いで感光
性液状エツチングレジストを除去して、導体間150
pmにメッキリードを有するパターンからメッキリード
を除去した微細回路を形成した。Example A protective film was laminated on the base aluminum surface of an aluminum base copper-clad insulating substrate (manufactured by Denki Kagaku Kogyo Co., Ltd., trade name: Denka HI'l"T plate), and the copper foil surface was T-coated with a photosensitive liquid eratin breath. After drying, an image is formed using a photographic method, a circuit is formed by copper etching, the etching resist is removed, a protective tape is applied to the end face of the aluminum base, and the thickness of electrolytic nickel is 5 μm and the thickness of electrolytic pure gold is 0.5 μm. Next, a photosensitive liquid etching resist was coated, and after drying, the plating leads (plating electrodes and plating leads) were exposed using a photographic method, and iodine 5011, potassium 250I and water were plated. Pure gold was etched by treatment with 700 g of composition solution.Next, after washing with water, nickel and copper were etched with iron chloride (40° Baume) solution.Next, the photosensitive liquid etching resist was removed, and 150%
A fine circuit was formed by removing the plated leads from a pattern having plated leads on the pm.
〔発明の効果〕
本発明により金ワイヤ−ボン、デング性のすぐれた微細
回路金属ベース基板が製造でき、メッキリード残留によ
るパターンショート不良も発生しなく、高密度実装用と
しての微細回路基板製造に極めて有用である。[Effects of the Invention] According to the present invention, a fine circuit metal base board with excellent gold wire bonding and densification properties can be manufactured, and pattern short defects due to residual plating leads do not occur, making it suitable for manufacturing fine circuit boards for high-density mounting. Extremely useful.
第1図は本発明による貴金属メッキ微細回路金属ベース
基板の断面図である。
第2図〜第9図Aは本発明工程を示す断面図であり、第
2図〜第9図Bは平面図である。
1・・・ベース金属板、2・・・絶縁層、3・・・銅箔
、4・・・ニッケル、5・・・青金Jil、6・・・エ
ツチングレジスト、7・・・保護フィルム、8・・・メ
ッキ用電極、9・・・メッキ用リード。
特許出願人 電気化学工業株式会社
手続補正書(方式)
昭和61年5月1日
特許庁長官 宇 賀 道 部 殿
1、事件の表示
昭和61年特許願第27923号
2、発明の名称
貴金属メッキ回路基板の製造法
3、補正をする者
事件との関係 特許出願人
住所 ■100 東京都千代田区有楽町1丁目4番1号
昭和61年4月22日(発送日)
5、補正の対象FIG. 1 is a cross-sectional view of a noble metal plated microcircuit metal base substrate according to the present invention. FIGS. 2 to 9A are cross-sectional views showing the steps of the present invention, and FIGS. 2 to 9B are plan views. DESCRIPTION OF SYMBOLS 1... Base metal plate, 2... Insulating layer, 3... Copper foil, 4... Nickel, 5... Blue gold Jil, 6... Etching resist, 7... Protective film, 8... Electrode for plating, 9... Lead for plating. Patent Applicant Denki Kagaku Kogyo Co., Ltd. Procedural Amendment (Method) May 1, 1985 Director General of the Patent Office Michibe Uga 1, Case Description 1985 Patent Application No. 27923 2, Title of Invention Precious metal plating circuit Substrate manufacturing method 3. Relationship with the case of the person making the amendment Patent applicant address ■100 1-4-1 Yurakucho, Chiyoda-ku, Tokyo April 22, 1986 (shipment date) 5. Subject of amendment
Claims (1)
る金属ベース基板の貴金属メッキした回路基板の製造法
において、ベース金属面に除去可能な保護層を形成し、
又他方の銅箔表面にエッチングレジストを設ける第1工
程、 銅箔をエッチングし、次いで前記エッチングレジストを
除去する第2工程、 前記銅箔表面にニッケルメッキ次いで貴金属メッキする
電解メッキの第3工程、 写真法でメッキ用リード及びメッキ用電極を除く部分に
エッチングレジストを設ける第4工程、前記メッキ用リ
ード及びメッキ用電極部分の貴金属をエッチングし、さ
らにニッケル及び銅をエッチングする第5工程、及び 前記エッチングレジストを除去する第6工程で構成する
ことを特徴とする貴金属メッキ回路基板の製造法。 2、貴金属が金または銀であることを特徴とする特許請
求の範囲第1項記載の回路基板の製造法。[Scope of Claims] 1. A method for manufacturing a precious metal-plated circuit board of a metal base board formed by laminating copper foil on a base metal plate via an insulating layer, in which a removable protective layer is formed on the base metal surface. death,
a first step of providing an etching resist on the surface of the other copper foil; a second step of etching the copper foil and then removing the etching resist; a third step of electrolytic plating in which the surface of the copper foil is plated with nickel and then with a precious metal; a fourth step of applying an etching resist to a portion other than the plating lead and the plating electrode using a photographic method; a fifth step of etching the noble metal of the plating lead and the plating electrode; and further etching nickel and copper; A method for manufacturing a noble metal plated circuit board, comprising a sixth step of removing an etching resist. 2. The method for manufacturing a circuit board according to claim 1, wherein the noble metal is gold or silver.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2792386A JPS62186588A (en) | 1986-02-13 | 1986-02-13 | Manufacture of noble metal plated circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2792386A JPS62186588A (en) | 1986-02-13 | 1986-02-13 | Manufacture of noble metal plated circuit board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62186588A true JPS62186588A (en) | 1987-08-14 |
JPH0579196B2 JPH0579196B2 (en) | 1993-11-01 |
Family
ID=12234404
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2792386A Granted JPS62186588A (en) | 1986-02-13 | 1986-02-13 | Manufacture of noble metal plated circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62186588A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01260886A (en) * | 1988-04-11 | 1989-10-18 | Minolta Camera Co Ltd | Manufacture of printed board |
-
1986
- 1986-02-13 JP JP2792386A patent/JPS62186588A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01260886A (en) * | 1988-04-11 | 1989-10-18 | Minolta Camera Co Ltd | Manufacture of printed board |
Also Published As
Publication number | Publication date |
---|---|
JPH0579196B2 (en) | 1993-11-01 |
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