JPH057894B2 - - Google Patents

Info

Publication number
JPH057894B2
JPH057894B2 JP58044742A JP4474283A JPH057894B2 JP H057894 B2 JPH057894 B2 JP H057894B2 JP 58044742 A JP58044742 A JP 58044742A JP 4474283 A JP4474283 A JP 4474283A JP H057894 B2 JPH057894 B2 JP H057894B2
Authority
JP
Japan
Prior art keywords
circuit
mos
gain
potential
mosfet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58044742A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59171215A (ja
Inventor
Masunori Sugimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP58044742A priority Critical patent/JPS59171215A/ja
Publication of JPS59171215A publication Critical patent/JPS59171215A/ja
Publication of JPH057894B2 publication Critical patent/JPH057894B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/003—Changing the DC level

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)
JP58044742A 1983-03-17 1983-03-17 レベルシフト回路 Granted JPS59171215A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58044742A JPS59171215A (ja) 1983-03-17 1983-03-17 レベルシフト回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58044742A JPS59171215A (ja) 1983-03-17 1983-03-17 レベルシフト回路

Publications (2)

Publication Number Publication Date
JPS59171215A JPS59171215A (ja) 1984-09-27
JPH057894B2 true JPH057894B2 (enrdf_load_html_response) 1993-01-29

Family

ID=12699894

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58044742A Granted JPS59171215A (ja) 1983-03-17 1983-03-17 レベルシフト回路

Country Status (1)

Country Link
JP (1) JPS59171215A (enrdf_load_html_response)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7375568B2 (en) * 2003-06-16 2008-05-20 Nec Corporation Logic circuit with restrained leak current to differential circuit

Also Published As

Publication number Publication date
JPS59171215A (ja) 1984-09-27

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