JPH0571193B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thin film semiconductor device and a method for manufacturing the same, and more particularly to a thin film semiconductor device suitable for an active matrix display and a method for manufacturing the same.

[Conventional technology]

In recent years, thin film transistors (thin film transistors), which are thin film semiconductor devices for active matrices, have been developed.
Polycrystalline silicon, which is excellent in terms of high image quality, is used as the transistor (TFT) material. Conventionally, this polycrystalline silicon (abbreviated as Poly-Si) is produced by a low pressure CVD (abbreviated as LPCVD) method, and a quartz glass or ordinary glass plate is used as an insulating substrate. When using a regular glass plate, there is a major restriction on the maximum process temperature, which is approximately 640°C.
Poly-
Various methods have been tried to obtain Si films.
For example, the first step is to increase the deposition temperature to a temperature close to the highest possible process temperature (630°C), increase the deposition pressure to 0.3 Torr, reduce the deposition rate of the LPCVD film, and reduce the crystallinity of the deposited film to (Total volume of crystalline components)
(See Display'86 Tech.Digest 3.5). secondly
The LPCVD film is deposited at 600℃, and the crystallinity is improved by subsequent heat treatment at about 600℃ (Japan Society for the Promotion of Science No.
147 Committee 7th Research Materials (60.3.19) See p24).
Third, the LPCVD film was deposited at 610°C, the film was made amorphous by ion implantation, and then the film was deposited at 600°C.
heat treatment to improve crystallinity (see Proceedings of the 33rd Annual Meeting of the Society of Applied Physics (Spring 1986), p. 544). As a result, these Poly-Si films have {110} orientation. All of these have some effect on improving crystallinity, but the carrier mobility when creating TFTs is still not sufficient.

An object of the present invention is to provide a structure of a thin film semiconductor device for improving the characteristics of the thin film semiconductor device, particularly,
The object of the present invention is to provide a structure related to the orientation of a Poly-Si film used in the active layer of a TFT. Furthermore, another object of the present invention is to provide a method for manufacturing a thin film semiconductor device that can form the above thin film at a process temperature of about 640° C. or lower.

[Means for solving problems]

The above purpose is to improve
This is achieved by setting the main orientation of the -Si layer to {111} orientation. This Poly-Si layer is formed using a low-pressure CVD method at a temperature of 520°C or higher and lower than 570°C, containing a small amount of {111} crystalline components and mainly consisting of amorphous components.
Obtained by depositing a Poly-Si layer followed by heat treatment.

[Effect]

FIG. 1 schematically shows a Poly-Si layer formed on an insulating substrate 1. As shown in FIG. FIG. 1a represents {111} oriented Poly-Si, and FIG. 1b represents {110} or {100} oriented Poly-Si. It is known that the interfacial charge density between each crystal plane of a silicon single crystal and SiO ₂ increases in the order of <100>, <110>, and <111>. A similar relationship holds true at the poly-Si grain boundary interface, and the {111} orientation is
In the Poly-Si film (Fig. 1a), compared to the {100} or {100}-oriented Poly-Si film (Fig. 1b),
The trap density in the direction perpendicular to the membrane becomes large. On the other hand, in the direction parallel to the film, the {111}-oriented Poly-Si film a shown in Figure 1a exhibits a relatively lower trap density than the {110}- or {100}-oriented Poly-Si film b. become. When the trap density is low, the width of the depletion layer formed at the grain boundary becomes narrow, and the potential barrier there becomes low. The carrier mobility of Poly-Si is mainly determined by the height of potential disorder at grain boundaries. Since the TFT carrier flows parallel to the Poly-Si film, {111}-oriented Poly-Si
In this case, carrier mobility is relatively large compared to {110} or {100} oriented Poly-Si.

〔Example〕

An embodiment of the present invention will be described below.

FIG. 3 shows the cross-sectional structure of the entire TFT using the present invention. The substrate 1 is a glass plate with a strain temperature of about 640°C. The substrate 1 is kept at 550℃ and the pressure is 1 Torr using monosilane gas diluted to 20% with helium.
LPCVD film 2 is deposited under the following conditions. The deposition time is
Deposit a 1500 Å film in 85 min. Then in _N2 ,
Heat treatment is performed at 600℃ for 24 hours. The main orientation of the thus obtained Poly-Si film is {111} orientation, and the average grain size is about 200 Å. After passing this film through island photo and etching processes, a SiO ₂ film for the gate insulating film is deposited at a thickness of 1,000 yen using the usual CVD method.
Å Deposit. Next, a poly-Si film 9 for a gate electrode is deposited to a thickness of 3500 Å at 550° C. and 1 Torr.
After photo-etching the gate film 9, implantation of the source and drain regions 6 and 7 is performed. The conditions were to use phosphorus (P), a dose of 5×10 ¹⁵ cm ^-2 , and a voltage of 30 KeV.
voltage. Phospho silicate
A passivation film 11 made of glass (PSG) is deposited to a thickness of 5000 Å at 480°C. Furthermore, _N2
Heat treatment is performed for 20 hours at 600°C to activate the implant area. After the photo-etching process for contact, an Al electrode 10 with a thickness of 6000 Å is sputtered. The channel width and channel length of the TFT in this example are 30 μm and 10 μm, respectively.

Figure 2 shows the deposition temperature when depositing Poly-Si by the low pressure CVD (LPCVD) method and the X-ray diffraction intensity I ₁₁₁ from the {111} plane after the deposited film was heat-treated at 600℃.
shows. Similarly, the X-ray diffraction intensity from the {110} plane and {311} plane, which are relatively abundant in the deposited film, was also investigated. The X-ray diffraction intensity from a certain orientation plane is proportional to the amount of crystal components on that orientation plane. After heat treatment,
The ratio of the X-ray diffraction intensities exhibited by the {111} oriented plane, {110} oriented plane, and {311} oriented plane is approximately 4.5:4.5:1 at a deposition temperature of approximately 570°C by LPCVD, and the ratio of the X-ray diffraction intensities shown by the {111} oriented plane The crystal components with the {110} orientation plane were the largest. At this time, from Fig. 2, the X from the {111} orientation plane
Linear diffraction intensity is approximately 1.1 Kcps. As the deposition temperature decreases from 570℃, the
Linear diffraction intensity increased. Follow. At a deposition temperature of less than 570° C., the crystal components on the {111} oriented plane become larger than the crystal components on other oriented planes, and become the main orientation.
At a deposition temperature of approximately 540°C, the {111} oriented plane, the {110}
The ratio of the X-ray diffraction intensities exhibited by the oriented plane and the {311} oriented plane was approximately 7:2:1.

As mentioned above, if the X-ray diffraction intensity from the {111} oriented plane is about 1.1 Kcps or more and the {111} oriented plane is the main orientation, then from Figure 2, the {111} oriented plane is the main orientation after heat treatment. The lower limit deposition temperature for orientation is approximately 505°C. Therefore, among the points plotted based on the experimental results, the point at 520° C. is the lower limit of the deposition temperature at which the {111} orientation plane becomes the main orientation.

As described above, it can be seen that if Poly-Si is deposited at a temperature of 520° C. or more and less than 570° C., the main orientation becomes {111} orientation after heat treatment and the crystallinity is improved. This is because Poly-Si deposited at such a temperature
The film contains only a small amount of {111}-plane crystal components, and most of it is amorphous components. During the subsequent heat treatment, solid-phase growth occurs with the {111}-oriented crystalline component as the core, and the amorphous component is converted into a {111}-oriented crystalline component. Therefore, 520℃
When deposited at a temperature below 750° C. and then heat-treated at 600° C., {111} becomes more dominant than {110} and {311}, that is, becomes the main orientation (main orientation).

As can be seen from Figure 2, the field effect mobility is
At a deposition temperature of 550℃, where {111} is the main orientation, approximately
30 cm ² /VS, which is significantly larger than the conventional case where {110} is the main orientation at a deposition temperature of 600°C.

Poly with {111} as the main orientation described in this example
-Si films have high mobility, and by using them in the active region of TFTs, excellent electrical characteristics can be obtained.

[Results of the invention]

According to the invention, at relatively low process temperatures,
A thin film semiconductor device with high carrier mobility can be obtained.

[Brief explanation of drawings]

Figures 1a and b are schematic diagrams of polycrystalline silicon on an insulating substrate, Figure 2 is a polycrystalline silicon film after heat treatment,
FIG. 3, which is a diagram showing the dependence of crystallinity on deposition temperature, is a schematic diagram of the cross-sectional structure of the TFT of the present invention. DESCRIPTION OF SYMBOLS 1... Insulating substrate, 2... Crystal grain, 3... Crystal grain boundary, 4... Depletion layer region, 5... Polycrystalline silicon layer, 6... Source region, 7... Drain region, 8
...Gate insulating film, 9...Gate electrode, 10...
Al electrode, 11... Passivation film.

Claims (1)

[Claims] 1. In a thin film semiconductor device having at least an insulating substrate and a semiconductor layer formed on the substrate, the semiconductor layer is a polycrystalline silicon film mainly oriented in the {111} plane. A thin film semiconductor device characterized by: 2. The thin film semiconductor device according to claim 1, wherein the semiconductor layer is an active layer of a transistor. 3. The thin film semiconductor device according to claims 1 and 2, wherein the semiconductor layer is a drain and source region of a transistor. 4. A method for manufacturing a thin film semiconductor device, characterized by including the following steps. (1) A process of forming a polycrystalline silicon film containing a small amount of {111} plane crystalline components and mainly consisting of amorphous components on an insulating substrate at a temperature of 520°C or higher and lower than 570°C by low-pressure CVD. (2) A step of annealing the insulating substrate on which the polycrystalline silicon film is formed to obtain a polycrystalline silicon film mainly oriented in the {111} plane.