JPS63307776A - Thin-film semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain a thin-film semiconductor device having a larger mobility of carriers at a comparatively low process temperature by making the main orientation of a Poly-Si layer constituting a TFT as a semiconductor device formed on an insulating substrate the {111} orientation. CONSTITUTION:A thin-film semiconductor device has at least an insulating substrate 1 and semiconductor layers formed onto the substrate, and polycrystalline silicon films 2 having orientation mainly comprising {111} faces are used as the semiconductor layers. The polycrystalline silicon films are shaped onto the insulating substrate through a decompression CVD method at a temperature of 570 deg.C or less, and the insulating substrate to which the polycrystalline silicon films are formed is annealed at a temperature of 640 deg.C or less. The Poly-Si film mainly comprising {111} has large mobility, and excellent electrical characteristics are acquired by employing the Poly-Si film as an active region in a TFT.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thin film semiconductor device and a method for manufacturing the same, and more particularly to a thin film semiconductor device suitable for an active matrix display and a method for manufacturing the same.

[Prior Art] In recent years, thin film transistors, which are thin film semiconductor devices for active matrix
Polycrystalline silicon, which is excellent in terms of high image quality, is used as the tor (TPT) material. Conventionally,
This polycrystalline silicon (Polycrystalline 5ilicon, abbreviated as Poly-S i ) is produced by low pressure CVD (abbreviated as L
A quartz glass or ordinary glass plate is used as the insulating substrate produced by the PGVD method. When using a normal glass plate, there is a major restriction on the maximum process temperature of approximately 64.0°C. Various methods have been attempted to obtain a Po1y-Si film with good crystallinity through such a low-temperature process. For example, the first step is to increase the deposition temperature to a temperature close to the highest possible process temperature (630 °C), increase the deposition pressure to 0.3 Torr, reduce the deposition rate of the LPGVD film, and reduce the crystallinity of the deposited film (per unit volume). (Japan D
isplay″86 Tech, Digest 3.
(see 5). Second, the LP) CVD film is deposited at 600°C, and the crystallinity is improved by subsequent heat treatment at about 600°C (Japan Society for the Promotion of Science 147th Committee 7th Research Materials (60, 3
, 19) p. 24). The third is LPGVD film 610
℃, the film is made amorphous by ion implantation, and the crystallinity is improved by subsequent heat treatment at 600℃ (third step).
Proceedings of the 3rd Annual Meeting of the Society of Applied Physics (Spring 1986) p.544)
and so on. As a result, these Po1y −S i
lfa becomes a film with (110) orientation. Although these are all effective to some extent in improving crystallinity, the carrier mobility when TPT is produced is still not sufficient.

An object of the present invention is to provide a structure of a thin film semiconductor device for improving the characteristics of the thin film semiconductor device, particularly a structure related to the orientation of a Po1y-Si film used in an active layer of a TPT. Furthermore, another object of the present invention is to provide a method for manufacturing a thin film semiconductor device that can form the above thin film at a process temperature of about 640° C. or lower.

[Means for solving problems]

The above object is achieved by setting the main orientation of Po1y-3ii constituting the TPT, which is a semiconductor device formed on an insulating substrate such as a glass substrate, to be (111) orientation.

This Po1y-Si layer was formed by a low pressure CVD method with a thickness of 570
It is obtained by depositing at a temperature below 'C, followed by heat treatment at a temperature below 640°C.

[Effect]

FIG. 1 schematically shows a Poly-Si layer formed on an insulating substrate 1. As shown in FIG. Figure 1(a) is (1
11) represents Poly-8i orientation, and Figure 1(b) represents Poly-S with (110) or (100) orientation.
Each crystal plane of silicon single crystal representing i and S i Oz
The interfacial charge density with is <100>.

It is known that the number increases in the order of <110> and <111>. A similar relationship holds true for the grain boundary interface of Po1y -S i , and the (111)-oriented Po1y -S i
In the film (Fig. 1(a)), (100) or (100)
Compared to the oriented Po1y-S i 1II (FIG. 1(b)), the trap density in the direction perpendicular to the film is large.

On the other hand, in the direction parallel to the membrane, (111
)-oriented Poly-Si film (a) exhibits a relatively lower trap density than the (110) or (100)-oriented Poly-Si film (b).

When the trap density is low, the width of the depletion layer formed at the grain boundary becomes narrow, and the potential barrier there becomes low.

The carrier mobility of Po1y-S i is mainly determined by the height of potential disturbance at grain boundaries. Since carriers in TPT flow in a direction parallel to the Po1y-Si film,
In Poly-Si with (111) orientation, carrier mobility is relatively large compared to Poly-Si with (110) or (100) orientation.

〔Example〕

An embodiment of the present invention will be described below.

FIG. 3 shows the cross-sectional structure of the entire TPT using the present invention.

The substrate 1 is a glass plate with a strain temperature of about 640°C. The substrate 1 was maintained at 550°C, and monosilane gas diluted to 20% with helium was used as a raw material, and LPG was heated at a pressure of I Torr.
A VD film 2 is deposited. Deposition time is 1500 in 85 minutes
Deposit human membranes.

Next, heat treatment is performed in Nz at 600° C. for 24 hours. The main orientation of the Po1y-S i film thus obtained is the (111) orientation, and the average grain size is about 200 grains. After this film is subjected to island photolithography and etching steps, a 5iOz film for a gate insulating film is deposited by atmospheric pressure CVD. Next, Po1y for the gate electrode
- Si film 9 at 550°C and 3500°C under ITorr conditions.
Deposit people. After photo-etching the gate film 9, implantation of the source and drain regions 6.7 is performed. The conditions were to use phosphorus (P) at a dose of 5 x 10" am-2,
The voltage is 30 KeV. Phospho
A passivation film 11 made of 5 illicate giass (PSG) was deposited by 5000 people at 480°C. Further, heat treatment is performed in Nz at 600° C. for 20 hours to activate the implant region. Photo for contacts.

After the etching step, the AQ electrode 10 is sputtered by 6,000 sputters. The channel width and channel length of the TPT in this example are 30 μm and 10 μm, respectively.

Figure 2 shows Po1y-S i subjected to low pressure CVD (LPCV).
D) Deposition temperature when depositing by method and deposited film at 600℃
X-ray diffraction intensity I from the (111) plane after heat treatment at °C
111 is shown. If the Po1y-Si film is deposited at a temperature below 570°C, the main orientation will be (111) after heat treatment.
It can be seen that the crystallinity becomes better due to the orientation. This is 57
The Po1y-Si film deposited at 0° C. or lower contains only a slight (111)-plane crystal component and is mostly an amorphous component. During the subsequent heat treatment, (11
1) Solid-phase growth occurs with the oriented crystalline component as a nucleus, and the amorphous component is converted to a (111)-oriented crystalline component. In addition, when deposited at 570°C or lower and then heat-treated at 600°C, the orientation components are (110) and (311).
Therefore, (111) becomes predominant, that is, becomes the main orientation (main orientation).

As can be seen from Figure 2, the field effect mobility is (111
) is the main orientation at a deposition temperature of 550°C, approximately 30aJ
/VS, which is significantly larger than the conventional case where the deposition temperature is 600° C. in which (110) is the main orientation.

The ratio of X-ray diffraction intensities exhibited by the (111) oriented plane, the (11] oriented plane, and the (311) oriented plane is approximately 4.5:4.5:1 at a deposition temperature of approximately 570°C by LPGVD, As the deposition temperature decreases from this point, the X-ray diffraction intensity shown by the (111) oriented plane increases, and the deposition temperature reaches approximately 540°C.
In this case, the ratio is about 7:2:1, and the (111) orientation plane is the main orientation.

As described in this example, Po1y with (IIL> as the main orientation)
-Si film has high mobility, and by using it in the active region of TPT, excellent electrical characteristics can be obtained.

[Effects of the Invention] According to the present invention, a thin film semiconductor device with high carrier mobility can be obtained at a relatively low process temperature.

[Brief explanation of the drawing]

Figures 1 (a) and (b) are schematic diagrams of polycrystalline silicon on an insulating substrate, Figure 2 is a diagram showing the polycrystalline silicon film after heat treatment and the dependence of crystallinity on deposition temperature, and Figure 3 is a diagram of the book. A schematic diagram of a cross-sectional structure of TPT of the invention is shown.

Claims (1)

[Claims] 1. In a thin film semiconductor device having at least an insulating substrate and a semiconductor layer formed on the substrate, the semiconductor layer is made of polycrystalline silicon mainly oriented in the {111} plane. A thin film semiconductor device characterized in that it is a film. 2. The thin film semiconductor device according to claim 1, wherein the semiconductor layer is an active layer of a transistor. 3. A thin film semiconductor device according to claims 1 and 2, wherein the semiconductor layer is a drain and source region of a transistor. 4. A method for manufacturing a thin film semiconductor device, characterized by including the following steps. (1) On an insulating substrate, at a temperature of 570°C or less,
A process of forming a polycrystalline silicon film using the VD method. (2) A step of annealing the insulating substrate on which the polycrystalline silicon film is formed at a temperature of 640° C. or lower.