JPH0491425A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form a polycrystalline silicon film whose particle size is large and whose surface flatness is good by a method wherein ion seeds of an amount which is sufficient enough to reach the bottom part of an amorphous silicon film formed on an insulating film by a low-temperature chemical vapor growth method are implanted and, after that, the polycrystalline silicon film which is crystallized completely by a heat treatment is formed. CONSTITUTION:When a polycrystalline silicon thin film is formed, the following are included: a process to form an amorphous silicon film 3, by a low- temperature chemical vapor growth method, on an insulating film 2 with which a semiconductor substrate 1 is covered or an amorphous silicon film 3 containing crystal particles 4 partially; in succession, a process to implant ion seeds 5 of an amount which is sufficient enough to reach the bottom part of the amorphous silicon film 3; and after that, a process to form a polycrystalline silicon film 7 which is crystallized completely by a heat treatment. For example, germanium is used as ion seeds 5 in said ion implantation process. A growth temperature in said low-temperature chemical vapor growth method is set at 500 to 550 deg.C when silane is used as a raw-material gas and at 400 to 550 deg.C when disilane is used.

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a method of manufacturing a polycrystalline silicon thin film for thin film transistors.

The purpose is to form a polycrystalline silicon film with larger grain size and good two-surface flatness.

In a method for forming a polycrystalline silicon thin film.

■A step of forming an amorphous silicon film or an amorphous silicon film containing some crystal grains on an insulating film coated on a semiconductor substrate by low-temperature chemical vapor deposition; implanting an ionic species in an amount sufficient to reach the
and heat-treating the amorphous silicon film to form a completely crystallized polycrystalline silicon film.

■In the ion implantation step, germanium is used as the ion species.■In the low temperature chemical vapor deposition method, when silane is used as the raw material gas, disilane is used at a growth temperature of 500 to 550°C. 400-550 when used
The structure is such that an amorphous silicon film is formed at ℃.

[Industrial application field]

The present invention relates to a method for manufacturing a polycrystalline silicon thin film for thin film transistors.

Polycrystalline silicon thin film resistors have characteristics such as lower parasitic capacitance than single crystal silicon substrates, and are also highly resistant to substrate bias effects and alpha rays.Based on these characteristics, In order to realize high-precision polycrystalline silicon film resistance elements as semiconductor devices have become more highly integrated and miniaturized in recent years.

Attempts have been made to reduce the resistance and thickness of polycrystalline silicon films using several techniques.

[Conventional technology]

FIGS. 2 and 3 are explanatory diagrams of conventional examples.

In the figure, 10 is a silicon (St) substrate, 11 is a silicon dioxide (Sing) film, 12 is an amorphous Si film, 13 is a polycrystalline silicon (poly-Si) film, and 14 is a crystal grain boundary.

15 is a Si substrate, 16 is a 5i02 film, 17 is a poly-Si film, 18 is a grain boundary, 19 is a Si ion, 20 is a partially amorphous poly-Si film, 21 is a Si ion, 22 is amorphous Si, 23 is a In the poly-Si film, 24 is a crystal grain boundary.

What are the problems with poly-Si thin film transistors (TPT)?

The main issue is how to suppress the leakage current of TPT due to field emission of carriers via traps at grain boundaries of poly-Si. It is said that it is effective to reduce

Therefore, in order to form a poly-Si film with larger grain size, a method has been developed in which a thin film of amorphous Si is grown and then heat-treated.

A typical method will be explained below with reference to FIGS. 2 and 3.

The first method is to obtain an amorphous Si film by low pressure chemical vapor deposition (CVD).As shown in FIG. This method deposits an amorphous Si film 12 using the CVD method and crystallizes it through heat treatment to obtain a poly-Si film 13, as shown in FIG. grow up.

The second method is to obtain an amorphous Si film by a two-stage Si ion implantation method, as shown in Figure 3(a).
On the 5i (h film 11) coated on the i-substrate 10, low pressure CVD
After forming conventional poly5ilII18 by the method.

As shown in FIG. 3(b), first, Si ions are implanted into the surface to form a partially amorphous poly-Si film 20.

Next, as shown in FIG. 3(C), Si ions are further deeply implanted to reach the bottom of the partially amorphous poly-Si film 2o to completely make the poly-Si film 2o amorphous. Subsequently, as shown in FIG. 3(d), it is crystallized again by heat treatment.

As a result, it is possible to use Bo'JS, which has a larger particle size than the first method.
An i-film 23 can be obtained.

[Problem to be solved by the invention]

However, the above two methods have advantages and disadvantages.

In the first method, the flatness of one surface is good.

On the other hand, since many crystal nuclei are generated at the interface with the underlying insulating film during growth, the final crystal grain size obtained is said to be smaller than in the second method.

On the other hand, in the second method, since the number of crystal nuclei generated from the lower insulating film interface is small, the final grain size obtained is larger; Because it is used.

Even after ion implantation, surface irregularities remain. This second
The reason why the particle size of the film obtained by this method becomes large is as follows.
It is thought that this is because the interface with the insulating film is destroyed by ion implantation, and the effect of promoting crystal nucleation is suppressed by contamination of the surface of the insulating film.

[Means to solve the problem]

FIG. 1 is a principle explanatory diagram of the present invention and a schematic cross-sectional view in order of steps of an embodiment.

In the figure, 1 is a semiconductor substrate (Si substrate), 2 is an insulating film (Si0g film), 3 is an amorphous Si film, 4 is a crystal grain, 5 is an ion species (Ge), 6 is a lower layer interface with the insulating film, 7 8 is a poly-Si film, 8 is a crystal grain boundary, and 9 is an ion species for doping (As, P).

To solve the above problems, we can create a poly-Si film with a larger diameter and good surface flatness by skillfully combining the above two methods and by selecting an appropriate material for the ion species. You can expect to get it.

That is, it is preferable to deposit amorphous Si by a low-temperature, low-pressure CVD method, perform ion implantation to the extent of destroying the vicinity of the interface, and then perform heat treatment to crystallize it.

In addition, the ion species include not only Si but also germanium (Ge), arsenic (8S) + phosphorus (P), and the like.

In particular, Ge has a larger mass number than Si.

The dose of ions required to make the poly-Si film amorphous is small, and the standard deviation of the ion projection range (ΔRp) is smaller than that of Si, so the implanted atoms are widely distributed within the film. Without a word.

It is also possible to inject near the interface.

Furthermore, even after the crystal growth is taken into account, both have the same crystal structure and only a 4% difference in lattice constant, so there is little concern that distortion will occur.

It is said that a mixed crystal of Si-Ge is formed.

As for As and P, ensure sufficient distribution within the film.

If ions are implanted under conditions that destroy the interface, and activation annealing and crystal growth annealing are performed simultaneously.

Furthermore, lower resistance can be expected.

The object of the present invention is to provide a method for forming a poly-Si film, in which an amorphous Si film 3° or partially containing crystal grains is formed on an insulating film 2 coated on a semiconductor substrate 1 by low-temperature chemical vapor deposition. a step of forming an amorphous Si film;
Next, there is a step of implanting ion species 5 in an amount sufficient to reach the bottom of the amorphous Si film 3, and then, the amorphous Si film 3 is heat-treated to form a completely crystallized poly-Si film 7. By including the step of.

Further, in the ion implantation step, by using Ge as an ion species.

Furthermore, in the low temperature chemical vapor deposition method, when S i Hs is used as the raw material gas, the temperature is 500 to 550°C.
and when using Si2H6.

This is achieved by forming amorphous Si at 400-550°C.

[Effect]

As mentioned above, amorphous S is produced by low-temperature low pressure CVD method.
By depositing i, implanting ions to the extent that the vicinity of the interface is destroyed, and then performing heat treatment to crystallize it, it is possible to obtain a poly-Si thin film with one flat surface and two large grain sizes. .

Therefore, leakage current due to field emission of carriers via traps at grain boundaries can be suppressed, and since a smooth surface is obtained, the influence of surface scattering is reduced, and carrier mobility is It became higher along with the effect of growing.

〔Example〕

FIG. 1 is a schematic cross-sectional view of an embodiment of the present invention in the order of steps.

As shown in FIG. 1(a), a 5i (12 film 2) was formed on a Si substrate 1 by thermal oxidation at 1,050°C.
400°C to 550°C after coating to a thickness of 0.000
Using the low-temperature chemical vapor deposition (CVD) method, the degree of vacuum is 0.1.
~0.2 Torr, 5i21 (, gas flow rate 30se) when disilane (on Si substrate 1) gas is used as the raw material gas
cm, and monosilane (Si
H4) When using gas, 5iHn gas flow rate 50se
The amorphous Si film 3 is formed to a thickness of 2,000 cm at a reaction temperature of 500 to 550°C.

Next, as shown in FIG. 1(b), Ge ions were implanted as ion species 5 at an acceleration voltage of 300 K.
The amorphous Si film 3 is doped under implantation conditions of eV and a dose of 5.times.10'4 to 1.times.10'5 so as to sufficiently reach the interface 6 with the underlying insulating film.

In this way, when an ion species such as Ge, which has a larger mass than + Si and has an approximate atomic radius, is implanted into amorphous Si, the atomic radius will become similar.

The atoms are not widely distributed within the film and easily reach the interface 6 with the underlying insulating film, and even after crystal growth, the lattice constant remains the same because the crystal structure remains the same.

Forms a 5iGe mixed crystal without distortion. Also.

Since it has a large mass, it is amorphous S that contains some crystal grains.
There is an advantage that the dose of ions required to completely make i amorphous is small.

Under these implantation conditions, even if there are crystal grains 4 near the lower layer interface 6 with the insulating film, as shown in FIG. 1(C),
It is possible to make these crystal grains 4 amorphous and also to break the lower layer interface 6 with the insulating film.

Thereafter, as shown in Figure 1(d), crystallization annealing is performed at 600°C for 2 hours or at 1,100°C for 30 hours.
By performing heat treatment for a second, a completely crystallized poly-Si film 7 can be obtained.

Depending on the case, if a lower resistance is required, arsenic (As) or phosphorus (P) is used as the doping ion species 9, as shown in FIG. 1(e).

In the case of P, the acceleration voltage is 60 KeV by the ion implantation method.

Also, under the implantation condition of dose ff1lxlo" ~ 10"/cm".

In the case of As, acceleration voltage 80KeV, dose 1xlO"
Doping with ~10"/cm" implantation conditions, 90
Activation is performed by heat treatment at 0 to 1,000°C for 130 minutes to lower the resistance.

In the above embodiment, Ge was used as the ion species 5, but As or P may be used as the ion species 5.

When As is used, doping is performed under the conditions of an acceleration voltage of 300 KeV and a dose of 1 x 1015/cm'', and when P is used, an acceleration voltage of 150 KeV and a dose of 1 x 1 are used.
Doping is performed under the implantation condition of 0 Is/cm2.

Subsequently, heat treatment at a high temperature of 900 to 1,000 degrees is performed to simultaneously crystallize the amorphous Si film and activate the implanted ions in the obtained poly-Si film. in this case.

It is possible to lower the resistance by annealing at -degrees, which has the advantage of shortening the process.

〔Effect of the invention〕

As explained above, (1) according to the present invention, (5) the surface is flat;
In addition, since a poly-Si film with a large grain size can be obtained, TPT
It greatly contributes to improving the electrical properties of the poly-Si film, especially the leakage properties and carrier mobility of the poly-Si film.

[Brief explanation of drawings]

FIG. 1 is a schematic cross-sectional view of an embodiment of the present invention in the order of steps. Figures 2 and 3 are explanatory diagrams of conventional examples. It is. In fig. ■ is a semiconductor substrate, 2 is an insulating film. 3 is an amorphous Si film. 4 is a crystal grain, 5 is an ionic species. 6 is the lower layer interface with the insulating film. 7 is a poly-Si film, 8 is a crystal grain boundary. 9 is the ionic species for doping

Claims (1)

[Claims] 1) In a method for forming a polycrystalline silicon thin film, an amorphous silicon film (3) or a step of forming an amorphous silicon film (3) containing some crystal grains; a step of implanting ion species (5) in an amount sufficient to reach the bottom of the amorphous silicon film (3); A method for manufacturing a semiconductor device, comprising the step of thereafter subjecting the amorphous silicon film (3) to heat treatment to form a completely crystallized polycrystalline silicon film (7). 2) The method of manufacturing a semiconductor device according to claim 1, wherein germanium is used as the ion species (5) in the ion implantation step. 3) In the low-temperature chemical vapor deposition method, when silane is used as the raw material gas, the growth temperature is 500 to 550°C, and when disilane is used, the growth temperature is 400 to 550°C.
2. The method of manufacturing a semiconductor device according to claim 1, wherein the amorphous silicon is formed at a temperature of .degree.