JPH0567072B2 - - Google Patents
Info
- Publication number
- JPH0567072B2 JPH0567072B2 JP60210634A JP21063485A JPH0567072B2 JP H0567072 B2 JPH0567072 B2 JP H0567072B2 JP 60210634 A JP60210634 A JP 60210634A JP 21063485 A JP21063485 A JP 21063485A JP H0567072 B2 JPH0567072 B2 JP H0567072B2
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- trimming
- value
- relative
- absolute value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000009966 trimming Methods 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 16
- 239000000919 ceramic Substances 0.000 description 2
- 230000006698 induction Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
Landscapes
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はハイブリツド技術に使用されるフアン
クシヨントリミングの方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of function trimming used in hybrid technology.
従来、この種のバランス回路は、第１の抵抗体
と第２の抵抗体の相対精度を合わせることにより
実現させて来たが、バランス特性を例えば60dB
以上を実現させようとすると、抵抗体の相対精度
±0.1％を実現することがキーポイントである。
Conventionally, this type of balance circuit has been realized by matching the relative accuracy of the first resistor and the second resistor, but the balance characteristic has been adjusted to 60 dB, for example.
In order to achieve the above, the key point is to achieve a relative accuracy of ±0.1% for the resistor.
しかしながら、従来のトリミング方法では抵抗
体の相対精度±0.1％を実現することは不可能で
はないが、歩留り上大きな問題があつた。
However, although it is not impossible to achieve a relative accuracy of ±0.1% for resistors using conventional trimming methods, there is a major problem in terms of yield.
本発明の目的は、高い歩留りをもつて、抵抗体
の相対精度±0.1％を実現するバランス回路にお
ける抵抗体の機能トリミング方法を提供すること
にある。 SUMMARY OF THE INVENTION An object of the present invention is to provide a method for trimming the function of a resistor in a balanced circuit, which achieves a relative accuracy of ±0.1% of the resistor with high yield.
前記目的を達成するため、本発明に係るバラン
ス回路における抵抗体の機能トリミング方法は、
絶対値トリミング処理と相対値トリミング処理と
を行い、抵抗体相互間の相対精度を回路のバラン
ス特性に適合させるバランス回路における抵抗体
の機能トリミング方法であつて、
抵抗体は、第１の抵抗体と、第２の抵抗体と、
第３の抵抗体との組合せからなり、第１の抵抗体
と第２の抵抗体とは、電気的に切り離され、
第３の抵抗体は、第２の抵抗体より大きな抵抗
値を有し、第１の抵抗体に並列に接続され、
絶対値トリミング処理は、第２の抵抗体をトリ
ミングして、該第２の抵抗体の絶対値を調整する
処理であり、
相対値トリミング処理は、抵抗値の大きな第３
の抵抗体をトリミングして、基準となる第２の抵
抗体の絶対値に対する並列接続の第１の低抗及び
第３の抵抗体の相対精度を調整する処理である。
In order to achieve the above object, a method for trimming the function of a resistor in a balance circuit according to the present invention includes:
A functional trimming method for a resistor in a balance circuit in which absolute value trimming processing and relative value trimming processing are performed to adapt the relative accuracy between the resistors to the balance characteristics of the circuit, wherein the resistor is a first resistor. and a second resistor,
The first resistor and the second resistor are electrically separated, and the third resistor has a larger resistance value than the second resistor. , are connected in parallel to the first resistor, the absolute value trimming process is a process of trimming the second resistor to adjust the absolute value of the second resistor, and the relative value trimming process is: 3rd one with higher resistance value
This is a process of adjusting the relative accuracy of the first resistor and third resistor connected in parallel with respect to the absolute value of the second resistor serving as a reference by trimming the resistor.
本発明は第１の抵抗体と並列に第３の抵抗体を
設け、第３の抵抗体の値として約（10〜50）×第
１の抵抗体の値を用い、バランス特性60dB以上
を実現させるために、まず第２の抵抗体の絶対値
をトリミングし、次に第３の抵抗体の抵抗値をト
リミングすることにより相対精度を合わせる。 The present invention provides a third resistor in parallel with the first resistor, uses approximately (10 to 50) x the value of the first resistor as the value of the third resistor, and achieves a balance characteristic of 60 dB or more. In order to achieve this, first the absolute value of the second resistor is trimmed, and then the resistance value of the third resistor is trimmed to match the relative accuracy.
次に本発明の一実施例について説明する。 Next, one embodiment of the present invention will be described.
特に時分割交換機の加入者回路における実施例
について述べる。所謂電子化された時分割交換機
の加入者回路は、従来のトランス型加入者回路と
比較して交流誘導（商用線誘導）に対して、非常
なる精度を必要とする。 In particular, an embodiment in a subscriber circuit of a time division exchange will be described. The subscriber circuits of so-called computerized time-division exchanges require much higher precision for AC induction (commercial line induction) than conventional transformer type subscriber circuits.
それはLongitudinal Balanceという特性で定
義づけられているが、タテモードのインピーダン
スが電子化加入者回路の場合、トランス型加入者
回路と比較して低くする必要があるために、たと
えば相対抵抗精度へのインパクトが大きい。 It is defined by the property Longitudinal Balance, but in the case of electronic subscriber circuits, the impedance of the vertical mode needs to be lower than that of transformer type subscriber circuits, so for example, it has an impact on relative resistance accuracy. big.
また世界中のLongitudinal Balance特性を見
るにCCITT系の仕様は46dB以上、ATT系は
60dB以上を必要とする。特にATT系の仕様をそ
のまま抵抗値に相対精度に置き換えると、相対精
度±0.1％以内に抑えなければならない。電子化
加入者回路をATTT系仕様に合致させるにはタ
テバランス特性を60dB以上保証する必要があり、
このため、タテバランス特性を観測しながら、抵
抗を切りきざみ（トリミング）するアプローチを
とる。この場合、抵抗相対値として±0.1％以内
に抑える必要があるため、製造上トリミングによ
る不良がかなり大きい。 Also, looking at the Longitudinal Balance characteristics around the world, the specifications for the CCITT system are 46 dB or more, and the specifications for the ATT system are over 46 dB.
Requires 60dB or more. In particular, if the specifications of the ATT system are directly replaced with the resistance value and the relative accuracy, the relative accuracy must be kept within ±0.1%. In order to make the electronic subscriber circuit meet the ATTT specifications, it is necessary to guarantee vertical balance characteristics of 60 dB or more.
For this reason, we take the approach of trimming the resistance while observing the vertical balance characteristics. In this case, since the relative resistance value needs to be kept within ±0.1%, defects due to trimming during manufacturing are quite large.
これを改善するために、本発明は第１図におい
て、端子１，２間の第２の抵抗体R2と、端子３，
４間の第１の抵抗体R1との相対精度を±0.1％以
内にとるために、第１の抵抗体R1と並列に第３
の抵抗体R3を設ける。例えば絶対精度100Ω±0.5
％に対して相対精度±0.1％を実現させるに、第
２の抵抗体R2の100Ωに対して第１の低抗体R1は
やや大きい102Ω位をあらかじめ設定しておく。
この時、第３の抵抗体R3は100Ωよりかなり大で
ある2kΩ位のものを使うものとして説明する。 In order to improve this, the present invention provides a second resistor R 2 between terminals 1 and 2, and a second resistor R 2 between terminals 1 and 2 in FIG.
In order to maintain a relative accuracy within ±0.1% with respect to the first resistor R 1 between 4 and 4, the third resistor R 1 is
A resistor R3 is provided. For example, absolute accuracy 100Ω±0.5
In order to achieve a relative accuracy of ±0.1% with respect to %, the first low resistance resistor R 1 is set in advance at a value of about 102Ω, which is slightly larger than the 100Ω of the second resistor R 2 .
At this time, the description will be made assuming that the third resistor R 3 is approximately 2 kΩ, which is considerably larger than 100 Ω.
まず第２の抵抗体R2を100Ω±0.5％にトリミン
グする。次に、比精度±0.1％以内に入るべく、
第３の抵抗体R3をトリミングする。相対精度±
0.1％内に入れば、トリミングを終了させる。若
し、トリミングをミスし、0.1％をオーバしたと
すると、第１の抵抗体R1の抵抗値を102Ωよりや
や高めに再設定して再トリミングし、更に第３の
抵抗体R3をトリミングし、その値を±0.1％以内
にする。もともと、第３の抵抗体R3の±0.1％に
寄与する感動率は100Ωの1/20になつているので、
トリミングに対しては非常にやりやすい。 First, the second resistor R 2 is trimmed to 100Ω±0.5%. Next, in order to keep the relative accuracy within ±0.1%,
Trim the third resistor R3 . Relative accuracy ±
If it falls within 0.1%, trimming ends. If you make a mistake in trimming and the value exceeds 0.1%, reset the resistance value of the first resistor R 1 to slightly higher than 102Ω and trim again, and then trim the third resistor R 3 . and keep the value within ±0.1%. Originally, the impression rate contributing to ±0.1% of the third resistor R3 is 1/20 of 100Ω, so
Very easy to trim.
次にこの応用例について説明する。第２図はセ
ラミツク基板５の上に抵抗体６，７，８を印刷し
た例を示している。ここで抵抗体６は第２の抵抗
体R2、抵抗体７は第３の抵抗体R3、抵抗体８は
第１の抵抗体R1をそれぞれ示す。 Next, an example of this application will be explained. FIG. 2 shows an example in which resistors 6, 7, and 8 are printed on a ceramic substrate 5. Here, the resistor 6 represents the second resistor R 2 , the resistor 7 represents the third resistor R 3 , and the resistor 8 represents the first resistor R 1 .
セラミツク基板５上の抵抗体をトリミングする
ことにより、抵抗精度±0.1％を実現するもので
ある。 By trimming the resistor on the ceramic substrate 5, resistance accuracy of ±0.1% is achieved.
以上説明した様に本発明は、相対精度が要求さ
れる第２の抵抗体と第１の抵抗体及び第３の抵抗
体とを電気的に切り離し、相対精度を得る基準と
なる第２の抵抗体の絶対値を得るトリミング処理
を他の処理から独立して行うため、第２の抵抗体
の絶対値の精度を高めて該第２の抵抗体を基準と
して高精度な抵抗値の相対精度を得ることができ
る。さらに、第１の抵抗体に大きな抵抗値をもつ
第３の抵抗体を並列に接続し、かつ第３の抵抗体
をトリミングすることにより、トリミング感度を
低下させてトリミングを容易に行うことができ
る。
As explained above, the present invention electrically separates the second resistor for which relative accuracy is required from the first resistor and the third resistor, and provides a second resistor that serves as a reference for obtaining relative accuracy. In order to perform the trimming process to obtain the absolute value of the resistor independently from other processes, the accuracy of the absolute value of the second resistor is increased and the relative accuracy of the highly accurate resistance value is obtained using the second resistor as a reference. Obtainable. Furthermore, by connecting a third resistor having a large resistance value in parallel with the first resistor and trimming the third resistor, trimming sensitivity can be lowered and trimming can be performed easily. .
第１図は本発明の一実施例を示す構成図、第２
図は本発明の応用例を示す図である。
R1……第１の抵抗体、R2……第２の抵抗体、
R3……第３の抵抗体。
FIG. 1 is a configuration diagram showing one embodiment of the present invention, and FIG.
The figure shows an example of application of the present invention. R1 ...first resistor, R2 ...second resistor,
R 3 ...Third resistor.
Claims (1)
理とを行い、抵抗体相互間の相対精度を回路のバ
ランス特性に適合させるバランス回路における抵
抗体の機能トリミング方法であつて、 抵抗体は、第１の抵抗体と、第２の抵抗体と、
第３の抵抗体との組合せからなり、第１の抵抗体
と第２の抵抗体とは、電気的に切り離され、 第３の抵抗体は、第２の抵抗体より大きな抵抗
値を有し、第１の抵抗体に並列に接続され、 絶対値トリミング処理は、第２の抵抗体をトリ
ミングして、該第２の抵抗体の絶対値を調整する
処理であり、 相対値トリミング処理は、抵抗値の大きさ第３
の抵抗体をトリミングして、基準となる第２の抵
抗体の絶対値に対する並列接続の第１の抵抗対及
び第３の抵抗体の相対精度を調整する処理である
ことを特徴とするバランス回路における抵抗体の
機能トリミング方法。[Scope of Claims] 1. A functional trimming method for resistors in a balance circuit in which absolute value trimming processing and relative value trimming processing are performed to adapt the relative accuracy between resistors to the balance characteristics of the circuit, comprising: is a first resistor, a second resistor,
The first resistor and the second resistor are electrically separated, and the third resistor has a larger resistance value than the second resistor. , are connected in parallel to the first resistor, the absolute value trimming process is a process of trimming the second resistor to adjust the absolute value of the second resistor, and the relative value trimming process is: Resistance value 3rd
A balance circuit characterized in that the process trims the resistor to adjust the relative accuracy of the first resistor pair and the third resistor connected in parallel with respect to the absolute value of the second resistor serving as a reference. How to trim the function of a resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60210634A JPS6269658A (en) | 1985-09-24 | 1985-09-24 | Function trimming method for resistor in balance circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60210634A JPS6269658A (en) | 1985-09-24 | 1985-09-24 | Function trimming method for resistor in balance circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6269658A JPS6269658A (en) | 1987-03-30 |
| JPH0567072B2 true JPH0567072B2 (en) | 1993-09-24 |
Family
ID=16592560
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60210634A Granted JPS6269658A (en) | 1985-09-24 | 1985-09-24 | Function trimming method for resistor in balance circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6269658A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5750458A (en) * | 1980-09-12 | 1982-03-24 | Hitachi Ltd | Functional trimming of film resistance |
-
1985
- 1985-09-24 JP JP60210634A patent/JPS6269658A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5750458A (en) * | 1980-09-12 | 1982-03-24 | Hitachi Ltd | Functional trimming of film resistance |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6269658A (en) | 1987-03-30 |
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