JPH0350703A - Manufacture of chip resistor - Google Patents

Manufacture of chip resistor

Info

Publication number
JPH0350703A
JPH0350703A JP1185513A JP18551389A JPH0350703A JP H0350703 A JPH0350703 A JP H0350703A JP 1185513 A JP1185513 A JP 1185513A JP 18551389 A JP18551389 A JP 18551389A JP H0350703 A JPH0350703 A JP H0350703A
Authority
JP
Japan
Prior art keywords
film
coated
resistors
coating
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1185513A
Other languages
Japanese (ja)
Inventor
Kiyoshi Ikeuchi
揮好 池内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1185513A priority Critical patent/JPH0350703A/en
Publication of JPH0350703A publication Critical patent/JPH0350703A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain highly accurate, reliable chip resistors which are free from deterioration of a resistance to moisture by performing the plating coat formation process of a coating conductor part prior to the stage of a resistance value regulating process. CONSTITUTION:Both surface and through hole end electrodes 3 are formed at peripheral parts and inwall faces 2 of holes in an alumina sheet substrate 1 equipped with a plurality of the holes. Further, coating resistors 4 are formed so as to connect intervals between the electrodes and insulating glass coating parts 5 are formed on the coating resistors 4. After that, plating coat is formed at the surface electrodes and through hole end electrodes and the resistance regulation of the coat resistors is performed by laser trimming. Then, epoxy resin coating 7 is provided so as to cover trimming grooves and the insulating glass coating parts and then, the alumina sheet substrate is cut into each piece of chip resistors 8.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、主に、自動装着機によりプリント基板等に装
着することを目的としたチップ抵抗器の製造方法に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates primarily to a method of manufacturing a chip resistor intended for mounting on a printed circuit board or the like using an automatic mounting machine.

従来の技術 従来、この種のチップ抵抗器の製造方法は、第2図の工
程順序に従い、第3図のように複数の穴を有するシート
状の絶縁基板1にスクリーン印刷により絶縁基板の孔周
辺の基板表面と孔の内壁面2に被膜導電体3を形成し、
被膜抵抗体4と第1の被膜絶縁体6を順に形成し、レー
ザトリミングにより抵抗値調整を行い、トリミング溝と
第1の被膜絶縁体6を覆うように第2の被膜絶縁体7を
形成し、基板分割用スリット6に沿って第4図に示すチ
ップ抵抗器8に個片分割した後に、被膜導電体部9とし
てメッキ被膜を形成してからチップ抵抗器の特性検査9
選別を行うものであった。
2. Description of the Related Art Conventionally, in the manufacturing method of this type of chip resistor, according to the process sequence shown in FIG. 2, as shown in FIG. A coated conductor 3 is formed on the substrate surface and the inner wall surface 2 of the hole,
A film resistor 4 and a first film insulator 6 are sequentially formed, the resistance value is adjusted by laser trimming, and a second film insulator 7 is formed to cover the trimming groove and the first film insulator 6. After dividing into individual chip resistors 8 shown in FIG. 4 along the substrate dividing slits 6, a plating film is formed as a film conductor portion 9, and then a characteristic test 9 of the chip resistors is performed.
It was a sorting process.

第3図において、2は、孔の内壁面であり、チップ抵抗
器側面の端面電極部になるところである。
In FIG. 3, reference numeral 2 denotes the inner wall surface of the hole, which becomes the end surface electrode portion on the side surface of the chip resistor.

3は、被膜導電体であり、主にチップ抵抗器の電極端子
の働きをするものである。4は、被膜抵抗体であり、被
膜導電体3上に一部重なるように形成するものである。
3 is a film conductor, which mainly functions as an electrode terminal of a chip resistor. Reference numeral 4 denotes a film resistor, which is formed so as to partially overlap the film conductor 3 .

5は、第1の被膜絶縁体であり、被膜抵抗体4を覆うよ
うに形成することで、抵抗体の耐湿性を向上させるため
のものである。
Reference numeral 5 denotes a first film insulator, which is formed to cover the film resistor 4 to improve the moisture resistance of the resistor.

6は、基板分割用スリットである。第4図において、7
は、第2の被膜絶縁体であり、抵抗値調整方法であるV
−ザトリミングによって第1の被膜絶縁体6上に露出し
た被膜抵抗体4をメッキ液から保護し抵抗器の耐湿性を
向上させる働きをするだめのものである。8は、チップ
抵抗器であり、シート状の絶縁基板1を基板分割用スリ
ット6で個片分割したものである。9は、被膜導電体部
であり、メッキ工程によりメッキ被膜が形成されチップ
抵抗器の電極端子部となるものである。
6 is a slit for dividing the substrate. In Figure 4, 7
is the second film insulator, and V is the resistance value adjustment method.
- It serves to protect the film resistor 4 exposed on the first film insulator 6 by the trimming from the plating solution and to improve the moisture resistance of the resistor. 8 is a chip resistor, which is obtained by dividing the sheet-shaped insulating substrate 1 into individual pieces using the slit 6 for dividing the substrate. Reference numeral 9 denotes a coated conductor portion, on which a plated film is formed in a plating process and becomes an electrode terminal portion of the chip resistor.

以上のような構成のチップ抵抗器の製造方法では、第2
の被膜絶縁体7に、エポキシ樹脂等を用い、被膜形成温
度が200’C以下のものを使用する。これは絶縁ガラ
スの形成温度である6oo℃よりはる25−に低い。こ
のように第2図に示す抵抗値調整工程以降に、抵抗値の
工程変化が大きくなるような熱処理工程をなくすことで
、抵抗値の精度向上と高歩留シを実現するものであった
In the method for manufacturing a chip resistor configured as described above, the second
The film insulator 7 is made of epoxy resin or the like, and the film forming temperature is 200'C or less. This is much lower than the 600° C. forming temperature of insulating glass by 25°C. In this way, by eliminating the heat treatment process that causes a large process change in the resistance value after the resistance value adjustment process shown in FIG. 2, it is possible to improve the precision of the resistance value and achieve a high yield.

発明が解決しようとする課題 しかしこのような従来の製造方法では、第2の被膜絶縁
体7として使用したエポキシ樹脂がメッキ工程でのメッ
キ液によって劣化し、第2の被膜絶縁体7に絶縁ガラス
を使用したチップ抵抗器と同等レベルの耐湿性を得るこ
とが困難であるという課題があった。
Problems to be Solved by the Invention However, in such conventional manufacturing methods, the epoxy resin used as the second film insulator 7 deteriorates due to the plating solution in the plating process, and the second film insulator 7 is coated with insulating glass. The problem was that it was difficult to achieve the same level of moisture resistance as chip resistors using .

本発明は、このような課題を解決するもので、第2の被
膜絶縁体にエポキシ樹脂や耐メッキ性Vこ劣る絶縁コー
ト剤等を使用しても、第2の被膜絶縁体に絶縁ガラスを
使用したチップ抵抗器と同等レベルの耐湿性を確保する
ことを目的とするものである。
The present invention solves these problems, and even if an epoxy resin or an insulation coating agent with poor plating resistance is used for the second film insulator, insulating glass can be used as the second film insulator. The purpose is to ensure the same level of moisture resistance as the chip resistor used.

課題を解決するための手段 この目的を達成するために、本発明は、複数の孔を有す
るシート状の絶縁基板の前記孔の周辺部及び内壁面に被
膜導電体を形成し、前記絶縁基板表面に前記被膜導電体
間を接続するように被膜抵抗体、さらにその上には第1
の被膜絶縁体を形成し、前記被膜導電体上にメッキ被膜
を形成した後に被膜抵抗体の抵抗値調整をレーザトリミ
ングによって行い、トリミング溝と第1の被膜絶縁体を
覆うように第2の被膜絶縁体を形成した後にシート基板
からチップ抵抗器の個片に分割したものである。
Means for Solving the Problems In order to achieve this object, the present invention forms a coated conductor on the periphery of the holes and on the inner wall surface of a sheet-like insulating substrate having a plurality of holes, and forms a conductive film on the surface of the insulating substrate. A film resistor is connected between the film conductors, and a first
After forming a coated insulator on the coated conductor and forming a plating film on the coated conductor, the resistance value of the coated resistor is adjusted by laser trimming, and a second coat is formed so as to cover the trimming groove and the first coated insulator. After forming an insulator, the sheet substrate is divided into individual chip resistors.

作用 この方法により、被膜導電体部のメッキ被膜形成工程を
抵抗値調整工程の前にもってくることで、第2の被膜絶
縁体はメッキ液の影響を受けることがなく、従って、耐
湿特性等の劣化が起こらないことになる。
Effect: With this method, the process of forming the plating film on the coated conductor portion is performed before the resistance value adjustment process, so that the second film insulator is not affected by the plating solution, and therefore the moisture resistance properties etc. No deterioration will occur.

実施例 本発明の一実施例について図面を用いて説明する。Example An embodiment of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例であるチップ抵抗器の製造方
法を示す製造工程図である。
FIG. 1 is a manufacturing process diagram showing a method for manufacturing a chip resistor according to an embodiment of the present invention.

複数の孔を有したアルミナシート基板の孔の周辺部及び
内壁面に、スルーホール印刷法により表面電極及びスル
ーホール端面電極を形成する。さらに前記電極間を接続
するように被膜抵抗体を形成し、この上に絶縁ガラスコ
ートを形成する。この後、前記表面電極及びスルーホー
ル端面電極にメッキ被膜を形成し、前記被膜抵抗体の抵
抗値調整をレーザトリミングによって行う。そしてトリ
ミング溝と絶縁ガラスコートを覆うようにエポキシ樹脂
コートを設け、アルミナシート基板を切断しチップ抵抗
器の個片に分割する。これにより、エポキシ樹脂コート
はメッキ被膜形成工程の後に形成されるのでメッキ被膜
形成工程のメッキ液の影響を受けずにすむ。このため第
2の被膜絶縁体に絶縁ガラスを使用した場合と同等の耐
湿性を発揮することができる。
Surface electrodes and through-hole end face electrodes are formed on the periphery of the holes and on the inner wall surface of an alumina sheet substrate having a plurality of holes by a through-hole printing method. Further, a film resistor is formed to connect the electrodes, and an insulating glass coat is formed on this film resistor. Thereafter, a plating film is formed on the surface electrode and the through-hole end face electrode, and the resistance value of the film resistor is adjusted by laser trimming. Then, an epoxy resin coat is provided to cover the trimming groove and the insulating glass coat, and the alumina sheet substrate is cut and divided into individual pieces of chip resistors. As a result, the epoxy resin coat is formed after the plating film forming step, so it is not affected by the plating solution in the plating film forming step. Therefore, it is possible to exhibit the same moisture resistance as when insulating glass is used as the second film insulator.

なお、本実施例において、第2の被膜絶縁体は、エポキ
シ樹脂コートとしたが、耐メッキ性に劣る樹脂系コート
剤やSiO結合の無機系コート剤及び耐メッキ性のない
低温焼結型絶縁ガラス等としてもよい。
In this example, the second film insulator was coated with an epoxy resin, but a resin coating agent with poor plating resistance, an inorganic coating agent with SiO bonds, and a low-temperature sintered insulation without plating resistance were used. It may also be made of glass or the like.

発明の効果 以上のように本発明によれば、抵抗値調整工程以降に、
抵抗値の工程変化が大きくなるような熱処理工程をなく
しメッキ液による耐湿性の劣化のない高精度高信頼性の
チップ抵抗器を実現することができる。
Effects of the Invention As described above, according to the present invention, after the resistance value adjustment step,
It is possible to eliminate a heat treatment process that causes a large process change in resistance value, and to realize a highly accurate and highly reliable chip resistor without deterioration of moisture resistance due to a plating solution.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例によるチップ抵抗器の製造方
法を示す製造工程図、第2図は従来のチップ抵抗器の製
造方法を示す製造工程図、第3図は第1の被膜絶縁体形
成後のシート状の絶縁基板の一部を示す概略図、第4図
はチップ抵抗器を示す概略図である。
FIG. 1 is a manufacturing process diagram showing a method for manufacturing a chip resistor according to an embodiment of the present invention, FIG. 2 is a manufacturing process diagram showing a conventional method for manufacturing a chip resistor, and FIG. 3 is a manufacturing process diagram showing a method for manufacturing a chip resistor according to an embodiment of the present invention. FIG. 4 is a schematic diagram showing a part of the sheet-like insulating substrate after the body is formed, and FIG. 4 is a schematic diagram showing a chip resistor.

Claims (1)

【特許請求の範囲】[Claims]  複数の孔を有するシート状の絶縁基板の前記孔の周辺
部及び内壁面に被膜導電体を形成し、前記絶縁基板表面
に前記被膜導電体間を接続するように被膜抵抗体、さら
にその上には第1の被膜絶縁体を形成し、前記被膜導電
体上にメッキ被膜を形成した後に被膜抵抗体の抵抗値調
整をレーザトリミングによって行い、トリミング溝と第
1の被膜絶縁体を覆うように第2の被膜絶縁体を形成し
た後にシート基板からチップ抵抗器の個片に分割したこ
とを特徴とするチップ抵抗器の製造方法。
A coated conductor is formed on the periphery and inner wall surface of the holes of a sheet-like insulating substrate having a plurality of holes, and a coated resistor is further formed on the surface of the insulating substrate so as to connect between the coated conductors. After forming a first coated insulator and forming a plating film on the coated conductor, the resistance value of the coated resistor is adjusted by laser trimming, and a first coated insulator is formed so as to cover the trimming groove and the first coated insulator. 1. A method of manufacturing a chip resistor, which comprises forming a film insulator in step 2 and then dividing the sheet substrate into individual pieces of the chip resistor.
JP1185513A 1989-07-18 1989-07-18 Manufacture of chip resistor Pending JPH0350703A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1185513A JPH0350703A (en) 1989-07-18 1989-07-18 Manufacture of chip resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1185513A JPH0350703A (en) 1989-07-18 1989-07-18 Manufacture of chip resistor

Publications (1)

Publication Number Publication Date
JPH0350703A true JPH0350703A (en) 1991-03-05

Family

ID=16172099

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1185513A Pending JPH0350703A (en) 1989-07-18 1989-07-18 Manufacture of chip resistor

Country Status (1)

Country Link
JP (1) JPH0350703A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0716427A3 (en) * 1994-12-07 1996-09-25 Dale Electronics Surface mount resistor and method for making same
WO1998029880A1 (en) * 1996-12-27 1998-07-09 Hokuriku Electric Industry Co., Ltd. Chip network resistor and method for manufacturing the same
US5937767A (en) * 1996-03-29 1999-08-17 Sumitomo Chemical Company Limited Plastic pallet
US8836736B2 (en) 2009-10-14 2014-09-16 Dolby Laboratories Licensing Corporation Variable flower display backlight system
US9035975B2 (en) 2009-10-14 2015-05-19 Dolby Laboratories Licensing Corporation Variable flower display backlight system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56148804A (en) * 1980-04-22 1981-11-18 Matsushita Electric Ind Co Ltd Method of manufacturing chip resistor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56148804A (en) * 1980-04-22 1981-11-18 Matsushita Electric Ind Co Ltd Method of manufacturing chip resistor

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0716427A3 (en) * 1994-12-07 1996-09-25 Dale Electronics Surface mount resistor and method for making same
US5937767A (en) * 1996-03-29 1999-08-17 Sumitomo Chemical Company Limited Plastic pallet
WO1998029880A1 (en) * 1996-12-27 1998-07-09 Hokuriku Electric Industry Co., Ltd. Chip network resistor and method for manufacturing the same
US6005474A (en) * 1996-12-27 1999-12-21 Hokuriku Electric Industry Co., Ltd. Chip network resistor and method for manufacturing same
KR100498876B1 (en) * 1996-12-27 2005-10-24 호쿠리쿠 덴키 고교 가부시키가이샤 Chip type network resistor and its manufacturing method
US8836736B2 (en) 2009-10-14 2014-09-16 Dolby Laboratories Licensing Corporation Variable flower display backlight system
US9035975B2 (en) 2009-10-14 2015-05-19 Dolby Laboratories Licensing Corporation Variable flower display backlight system

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