JP2502519B2 - Printed circuit board manufacturing method - Google Patents

Printed circuit board manufacturing method

Info

Publication number
JP2502519B2
JP2502519B2 JP61115298A JP11529886A JP2502519B2 JP 2502519 B2 JP2502519 B2 JP 2502519B2 JP 61115298 A JP61115298 A JP 61115298A JP 11529886 A JP11529886 A JP 11529886A JP 2502519 B2 JP2502519 B2 JP 2502519B2
Authority
JP
Japan
Prior art keywords
conductor pattern
circuit board
printed circuit
pattern
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61115298A
Other languages
Japanese (ja)
Other versions
JPS62271488A (en
Inventor
正紘 井窪
信之 板舛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP61115298A priority Critical patent/JP2502519B2/en
Publication of JPS62271488A publication Critical patent/JPS62271488A/en
Application granted granted Critical
Publication of JP2502519B2 publication Critical patent/JP2502519B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は,製造工程途中等は回路を開放しておき,そ
の後,回路を閉じることができる様にしたプリント基板
の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a printed circuit board in which a circuit can be opened during the manufacturing process and then closed.

従来の技術 近年,絶縁基板としてセラミック基板を利用したプリ
ント基板が利用されるようになっている。このようなプ
リント基板の場合,たとえば抵抗体は印刷により形成
し,又他の部品もリード端子のないチップ部品化して両
端の電極を半田付けによって導電パターンに接続するよ
うにして,高密度化を図っている。
2. Description of the Related Art In recent years, a printed circuit board using a ceramic substrate as an insulating substrate has come into use. In the case of such a printed circuit board, for example, resistors are formed by printing, other parts are also made into chip parts without lead terminals, and electrodes at both ends are connected to a conductive pattern by soldering to increase the density. I am trying.

第2図はこのようなプリント基板の一例を示すもの
で,6は回路を接続するチップジャンパーで,このチップ
ジャンパー6の取付前に導体パターン4と導体パターン
8に別々に信号を入力し,印刷抵抗2をトリミングして
所定の出力信号を得るようにする。この工程を行った
後,チップジャンパー6を導体パターン4,8間に半田付
けによって接続し回路を閉じている。なお,図中1は絶
縁基板,3は導体パターン,5はチップ部品,7はこの基板を
他のプリント基板に電気的に接続するための端子であ
る。
Fig. 2 shows an example of such a printed circuit board. Reference numeral 6 is a chip jumper for connecting circuits. Before mounting the chip jumper 6, signals are separately input to the conductor patterns 4 and 8 and printed. The resistor 2 is trimmed to obtain a predetermined output signal. After performing this step, the chip jumper 6 is connected between the conductor patterns 4 and 8 by soldering to close the circuit. In the figure, 1 is an insulating substrate, 3 is a conductor pattern, 5 is a chip component, and 7 is a terminal for electrically connecting this substrate to another printed circuit board.

発明が解決しようとする問題点 ところが,このようなプリント基板の生産工程におい
ては,チップ部品5の半田付後,印刷抵抗2の機能トリ
ミングの次に回路短絡用チップジャンパー6を後付けす
る必要があり,回路短絡のための専用の回路短絡用チッ
プジャンパー6が必要となるばかりか,チップ部品5と
回路短絡用チップジャンパー6とは同時に半田付を行い
得ず半田付作業が二度発生するなど,プリント基板の生
産工程における調整作業をの導体パターンの接続作業の
能率が極めて悪いという問題があった。
However, in the production process of such a printed circuit board, it is necessary to attach the circuit jumper chip jumper 6 after the function trimming of the printed resistor 2 after the soldering of the chip component 5. , Not only the dedicated circuit jumper chip jumper 6 for the circuit short circuit is required, but the chip component 5 and the circuit jumper chip jumper 6 cannot be soldered at the same time, and the soldering work occurs twice. There has been a problem that the efficiency of the conductor pattern connection work for the adjustment work in the printed board production process is extremely low.

本発明はこのような上記従来の問題点を解決するもの
であり,簡単な構成で,調整作業後の導体パターンの接
続作業の能率向上をはかることができ,コストの低い優
れたプリント基板の製造方法を提供することを目的とす
る。
The present invention solves the above-mentioned problems of the prior art, and with a simple structure, it is possible to improve the efficiency of the connecting work of the conductor pattern after the adjusting work, and to manufacture an excellent printed circuit board with low cost. The purpose is to provide a method.

問題点を解決するための手段 本発明は上記目的を達成するためのもので,基板の同
一平面上にそれぞれ独立して形成した第一の導体パター
ンと第二の導体パターン間に第一の抵抗素子を配設し,
同じく前記基板の同一平面上に独立して形成した第三の
導体パターンと前記第二の導体パターン間にチップ部品
を配設し,前記第一の導体パターンと前記第三の導体パ
ターンとから信号を入力し,前記第二の導体パターンか
ら所定の出力が得られるよう前記第一の抵抗素子に機能
トリミングを施し,その後,前記第一の導体パターンと
前記第三の導体パターンとを短絡させる外部接続端子を
同一平面上で取り付ける様にしたことを特徴とするもの
である。
Means for Solving the Problems The present invention is for achieving the above-mentioned object, and includes a first resistor between a first conductor pattern and a second conductor pattern, which are independently formed on the same plane of a substrate. Arrange the elements,
Similarly, a chip component is arranged between the third conductor pattern and the second conductor pattern, which are independently formed on the same plane of the substrate, and a signal is output from the first conductor pattern and the third conductor pattern. Is input, functional trimming is performed on the first resistance element so that a predetermined output is obtained from the second conductor pattern, and then the first conductor pattern and the third conductor pattern are short-circuited. It is characterized in that the connection terminals are mounted on the same plane.

作用 本発明は上記した構成により,調整を要する素子に接
続される導体パターンを含む複数の導体パターンを,調
整の後,外部回路に電気的に接続するための端子により
接続するようにしたため,プリント基板の生産工程にお
ける調整作業後の導体パターンの接続の際に必要となる
部品点数と工数とを削減することができる。
With the above-described structure, the present invention is configured to connect a plurality of conductor patterns including a conductor pattern connected to an element that requires adjustment, after adjustment, with terminals for electrically connecting to an external circuit. It is possible to reduce the number of parts and the number of steps required when connecting the conductor patterns after the adjustment work in the board production process.

実施例 以下,本発明の一実施例のプリント基板装置につい
て,図面を参照して説明する。
Embodiment A printed circuit board device according to an embodiment of the present invention will be described below with reference to the drawings.

第1図に示すように,絶縁基板1の導体パターン3,4
間に印刷抵抗2を印刷形成し,導体パターン3,8間にチ
ップ部品5を接続し,導体パターン(入力パタン)4,導
体パターン(入力パターン)8から信号を入力し,導体
(出力)パターン3から所定の出力信号が得られるよう
に印刷抵抗2に機能トリミングをして,その後,端子7
を取付けて半田付し導体パターン8と4を短絡させる。
かかる構成によれば、印刷抵抗2に機能トリミングをし
た後に導体パターン4と8とを接続する際に端子7を用
しているため,両導体パターン間を接続するための特別
の部品を必要としなくなり,従来用いられていた回路短
絡用チップジャンパーを削除することができる。さら
に,回路短絡用チップジャンパーが不要となるため半田
付作業が一度で済むこととなる。このように,プリント
基板の生産工程における調整作業後の導体パターンの接
続の際に必要となる部品点数と工数とを削減することが
でき,調整作業後の導体パターンの接続作業の能率を大
きく向上させることができる。さらに,本実施例に示し
たように,端子7は特別に回路短絡用に加工する必要は
なく,外部回路に電気的に接続するための端子として従
来より用いている端子を利用できるものである。
As shown in FIG. 1, the conductor patterns 3, 4 of the insulating substrate 1
A print resistor 2 is printed between them, a chip component 5 is connected between the conductor patterns 3 and 8, and a signal is input from the conductor pattern (input pattern) 4 and the conductor pattern (input pattern) 8 and a conductor (output) pattern. The printed resistor 2 is functionally trimmed so that a predetermined output signal can be obtained from the terminal 3 and then the terminal 7
Is attached and soldered to short-circuit the conductor patterns 8 and 4.
According to this structure, since the terminal 7 is used when connecting the conductor patterns 4 and 8 after the function trimming of the printed resistor 2, a special part for connecting both conductor patterns is required. The chip jumper for circuit shorting, which has been used in the past, can be eliminated. Moreover, the chip jumper for circuit short circuit is not required, so the soldering work can be done only once. In this way, it is possible to reduce the number of parts and man-hours required when connecting the conductor pattern after the adjustment work in the production process of the printed circuit board, and greatly improve the efficiency of the connection work of the conductor pattern after the adjustment work. Can be made. Further, as shown in the present embodiment, the terminal 7 does not need to be specially processed for short circuit, and the terminal conventionally used as a terminal for electrically connecting to an external circuit can be used. .

なお,本実施例における機能トリミングは調整の一例
である。
The function trimming in this embodiment is an example of adjustment.

発明の効果 以上の説明から明らかなように本発明のプリント基板
の製造方法は,調整を必要とする素子に接続する導体パ
ターンを含む複数の導体パターンを,調整の後,外部回
路に電気的に接続するための端子とからなる構成である
ので,調整作業後の導体パターンの接続作業の能率の向
上をはかることができ,コストの低い優れたプリント基
板の製造方法を提供することができるものである。
EFFECTS OF THE INVENTION As is apparent from the above description, in the method for manufacturing a printed circuit board of the present invention, a plurality of conductor patterns including a conductor pattern connected to an element requiring adjustment are electrically adjusted to an external circuit after adjustment. Since it is composed of terminals for connection, it is possible to improve the efficiency of the connection work of the conductor pattern after the adjustment work, and it is possible to provide an excellent printed circuit board manufacturing method with low cost. is there.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例におけるプリント基板装置の
平面図、第2図は従来例のプリント基板の平面図であ
る。 1……絶縁基板,2……印刷抵抗,3……導体パターン(出
力パターン),4……導体パターン(入力Aパターン),8
……導体パターン(入力Bパターン),5……チップ部
品,7……端子。
FIG. 1 is a plan view of a printed circuit board device according to an embodiment of the present invention, and FIG. 2 is a plan view of a conventional printed circuit board. 1 ... Insulating substrate, 2 ... Printing resistor, 3 ... Conductor pattern (output pattern), 4 ... Conductor pattern (input A pattern), 8
...... Conductor pattern (input B pattern), 5 …… Chip parts, 7 …… Terminal.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】基板の同一平面上にそれぞれ独立して形成
した第一の導体パターンと第二の導体パターン間に第一
の抵抗素子を配設し、同じく前記基板の同一平面上に独
立して形成した第三の導体パターンと前記第二の導体パ
ターン間にチップ部品を配設し,前記第一の導体パター
ンと前記第三の導体パターンとから信号を入力し、前記
第二の導体パターンから所定の出力が得られるよう前記
第一の抵抗素子に機能トリミングを施し,その後、前記
第一の導体パターンと前記第三の導体パターンとを短絡
させる外部接続端子を同一平面上で取り付ける様にした
ことを特徴とするプリント基板の製造方法。
1. A first resistance element is arranged between a first conductor pattern and a second conductor pattern, which are independently formed on the same plane of a substrate, and are also independently formed on the same plane of the substrate. A chip component is disposed between the third conductor pattern and the second conductor pattern formed as described above, a signal is input from the first conductor pattern and the third conductor pattern, and the second conductor pattern is formed. The first resistance element is functionally trimmed so that a predetermined output can be obtained from it, and then external connection terminals for short-circuiting the first conductor pattern and the third conductor pattern are mounted on the same plane. A method for manufacturing a printed circuit board, characterized in that.
JP61115298A 1986-05-20 1986-05-20 Printed circuit board manufacturing method Expired - Lifetime JP2502519B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61115298A JP2502519B2 (en) 1986-05-20 1986-05-20 Printed circuit board manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61115298A JP2502519B2 (en) 1986-05-20 1986-05-20 Printed circuit board manufacturing method

Publications (2)

Publication Number Publication Date
JPS62271488A JPS62271488A (en) 1987-11-25
JP2502519B2 true JP2502519B2 (en) 1996-05-29

Family

ID=14659173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61115298A Expired - Lifetime JP2502519B2 (en) 1986-05-20 1986-05-20 Printed circuit board manufacturing method

Country Status (1)

Country Link
JP (1) JP2502519B2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5640517B2 (en) * 1973-10-20 1981-09-21
JPS57104470U (en) * 1980-12-17 1982-06-28

Also Published As

Publication number Publication date
JPS62271488A (en) 1987-11-25

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