JPS62271488A - Printed board device - Google Patents

Printed board device

Info

Publication number
JPS62271488A
JPS62271488A JP61115298A JP11529886A JPS62271488A JP S62271488 A JPS62271488 A JP S62271488A JP 61115298 A JP61115298 A JP 61115298A JP 11529886 A JP11529886 A JP 11529886A JP S62271488 A JPS62271488 A JP S62271488A
Authority
JP
Japan
Prior art keywords
circuit board
printed circuit
board device
printed
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61115298A
Other languages
Japanese (ja)
Other versions
JP2502519B2 (en
Inventor
井窪 正紘
板舛 信之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP61115298A priority Critical patent/JP2502519B2/en
Publication of JPS62271488A publication Critical patent/JPS62271488A/en
Application granted granted Critical
Publication of JP2502519B2 publication Critical patent/JP2502519B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 3、発明の詳細な説明 産業上の利用分野 本発明は、製造工程途中等は回路を開放しておき、その
後、回路を閉じることができる様にしたプリント基板装
置に関するものである。
Detailed Description of the Invention 3. Detailed Description of the Invention Industrial Application Field The present invention relates to a printed circuit board device in which a circuit is left open during the manufacturing process and can be closed afterwards. It is something.

従来の技術 近年、絶縁基板としてセラミック基板全利用したフ゛リ
ント基板が利用されるようになっている。
BACKGROUND OF THE INVENTION In recent years, printed substrates made entirely of ceramic substrates have come into use as insulating substrates.

このようなプリント基板の場合、たとえば抵抗体は印刷
により形成し、又池の部品もリード端子のないチップ部
品化して両端の電極全半田付けによって導電パターンに
接続するようにして、高密度化を図っている。
In the case of such a printed circuit board, for example, the resistor is formed by printing, and the battery component is also made into a chip component without lead terminals, and the electrodes at both ends are all soldered to connect to the conductive pattern to achieve high density. I'm trying.

第2図はこのようなプリント基板の一例を示すもので、
6は回路全接続するチップジャンパーで、このチップジ
ャンパー6の取付前に導体パターン4と導体パターン8
に別々に信号を入力し、印刷抵抗2 t ト!J ミン
クして所定の出力信号を得るよう圧する。この工程を行
った後、チップジャンパー6を導体パターン4.8間に
半田付けによって接続し回路を閉じている。なお、図中
1は絶縁基板、3は導体パターン、5はチップ部品、7
はこの基板を他のプリント基板i/i:電気的に接続す
るための端子である。
Figure 2 shows an example of such a printed circuit board.
6 is a chip jumper that connects the entire circuit, and before installing this chip jumper 6, conductor pattern 4 and conductor pattern 8 are connected.
Input signals separately to the printed resistance 2 t! J Mink and press to obtain the desired output signal. After performing this step, the chip jumper 6 is connected between the conductive patterns 4 and 8 by soldering to close the circuit. In addition, in the figure, 1 is an insulating substrate, 3 is a conductor pattern, 5 is a chip component, and 7
is a terminal for electrically connecting this board to another printed circuit board I/I.

発明が解決しようとする問題点 ところが、このようなプリント基板の生産工程において
は、第2図のチップジャンパー6と、チップ部品5は同
時に半田付けが出来なく、チップ部品5の半田付後、印
刷抵抗2の機能トリミングの次に回路短絡チノグジャン
パー6全後付けする必要があり、テップ部品5と同時に
半田付けが出来なく、半田付作業が二度発生し作業性が
極めて悪い、又回路短絡用チップジャンパー6が必要で
コストアップになるという問題があった。
Problems to be Solved by the Invention However, in the production process of such a printed circuit board, the chip jumper 6 shown in FIG. 2 and the chip component 5 cannot be soldered at the same time. After functional trimming of resistor 2, it is necessary to install the entire circuit short circuit jumper 6 later, and soldering cannot be done at the same time as tip part 5, so the soldering work is required twice, which is extremely poor workability. There was a problem in that the chip jumper 6 was required, which increased the cost.

本発明はこのような従来の問題点全解決するものであり
、簡単な構成で回路短絡用チップ部品が削除でき、しか
も半田付作業が一度で行え作業能率の向上がはかれてコ
ストの安い優れたプリント基板装置全提供すること全目
的とするものである。
The present invention solves all of these conventional problems, and has a simple structure that eliminates chip components for circuit shorting.Moreover, the soldering work can be done in one go, improving work efficiency and making it a low-cost product. Its entire purpose is to provide a complete set of printed circuit board equipment.

問題点を解決するための手段 本発明のプリント基板装置は、互いに独立しており、最
終的には接続される第1.第2の導体パターン金、この
導体パターンをもつプリント基板を他のプリント基板に
接続するための端子で接続して回路を閉ざるようにした
ものである。
Means for Solving the Problems The printed circuit board device of the present invention has a first . The second conductor pattern is gold, and the printed circuit board having this conductive pattern is connected to another printed circuit board with a terminal to close the circuit.

作  用 本発明のプリント基板は、回路短絡用チップを削除し、
本来備わっている端子でもって導体パターン間金接続す
るようにしたため、コスト的、工数的に極めて有利とな
る。
Function The printed circuit board of the present invention eliminates the circuit shorting chip, and
Since the conductor patterns are electrically connected using the originally provided terminals, it is extremely advantageous in terms of cost and man-hours.

実施例 以下・本発明の一実施例のプリント基板装置について、
図面全参照して説明する。
Examples Below - Regarding a printed circuit board device according to an embodiment of the present invention,
The explanation will be given with reference to all the drawings.

第1図に示すように、絶縁基板1の導体パターン3,4
間に印刷抵抗2全印刷形成し、導体パターン3.8間に
チップ部品5を接続し、導体パターン(入カバターン)
4、導体パターン(入カバターン)8から信号全入力し
、導体(出力)パターン3から所定の出力信号が得られ
るように印刷抵抗2に機能トリミングをして、その後、
端子7を取付けて半田付し導体パターン8と4を短絡さ
せる。
As shown in FIG. 1, conductor patterns 3 and 4 on an insulating substrate 1
The printed resistor 2 is completely printed in between, the chip component 5 is connected between the conductor patterns 3 and 8, and the conductor pattern (input cover turn) is formed.
4. Input all signals from the conductor pattern (input cover turn) 8, perform functional trimming on the printed resistor 2 so that a predetermined output signal can be obtained from the conductor (output) pattern 3, and then
Terminal 7 is attached and soldered to short-circuit conductor patterns 8 and 4.

かかる構成によれば、回路短絡用テップ部品が削除でき
、作業能率に著しく改善することができる。また、この
実施例のように端子は、特別に回路短絡用としているの
でナク、本来の端子として備っているものであり、これ
が同時に回路短絡の働きをしているため、コスト的にも
安価になる。
According to this configuration, the tip part for shorting the circuit can be omitted, and the work efficiency can be significantly improved. In addition, as in this embodiment, the terminals are specially designed for short circuits, so they are provided as original terminals, and they also function as short circuits, so they are inexpensive in terms of cost. become.

発明の効果 以上のように本発明のプリント基板装@は、それぞれ独
立した複数の導体パターンに端子を取付半田付すること
によって複数の導体パターンを電気的に接続することが
できる。したがって特別な回路短絡用チップ部品が不要
になり、そのためこの短絡用チップ部品の取付は及び半
田付けが不要となシ作業性が著しく向上し、コストダウ
ンが図れる。ま之、端子は特別に回路短絡用としている
のでなく、本来端子として備っているものであり、これ
が同時に回路短絡の役目を果している念めさらにコスト
的に有利である。
Effects of the Invention As described above, the printed circuit board device of the present invention can electrically connect a plurality of conductor patterns by attaching and soldering terminals to each of the plurality of independent conductor patterns. Therefore, there is no need for a special chip component for shorting circuits, and therefore, the installation of this chip component for shorting circuits does not require soldering, which significantly improves the workability and reduces costs. However, the terminal is not specifically used for shorting the circuit, but is originally provided as a terminal, and since it also serves the role of shorting the circuit, it is also advantageous in terms of cost.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例におけるプリント基板装置の
平面図、第2図は従来例のプリント基板の平面図である
。 1 ・・・・絶縁基板、2・・・・印刷抵抗、3・・・
・・導体パターン(出カバターン)、4・・・・・・導
体パターン(入力Aパターン)、8・−・・導体パター
ン(入カBパターン)、5・・・チップ部品、7・−・
端子。
FIG. 1 is a plan view of a printed circuit board device according to an embodiment of the present invention, and FIG. 2 is a plan view of a conventional printed circuit board. 1...Insulating substrate, 2...Printed resistor, 3...
...Conductor pattern (output cover turn), 4...Conductor pattern (input A pattern), 8...Conductor pattern (input B pattern), 5...Chip component, 7...
terminal.

Claims (1)

【特許請求の範囲】[Claims] それぞれ独立した第1、第2のパターンを有するプリン
ト基板を備え、このプリント基板を他のプリント基板に
電気的に接続するための端子によって上記第1、第2の
パターンを電気的に接続するようにしたプリント基板装
置。
A printed circuit board having independent first and second patterns is provided, and the first and second patterns are electrically connected by a terminal for electrically connecting the printed circuit board to another printed circuit board. printed circuit board equipment.
JP61115298A 1986-05-20 1986-05-20 Printed circuit board manufacturing method Expired - Lifetime JP2502519B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61115298A JP2502519B2 (en) 1986-05-20 1986-05-20 Printed circuit board manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61115298A JP2502519B2 (en) 1986-05-20 1986-05-20 Printed circuit board manufacturing method

Publications (2)

Publication Number Publication Date
JPS62271488A true JPS62271488A (en) 1987-11-25
JP2502519B2 JP2502519B2 (en) 1996-05-29

Family

ID=14659173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61115298A Expired - Lifetime JP2502519B2 (en) 1986-05-20 1986-05-20 Printed circuit board manufacturing method

Country Status (1)

Country Link
JP (1) JP2502519B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5067962A (en) * 1973-10-20 1975-06-06
JPS57104470U (en) * 1980-12-17 1982-06-28

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5067962A (en) * 1973-10-20 1975-06-06
JPS57104470U (en) * 1980-12-17 1982-06-28

Also Published As

Publication number Publication date
JP2502519B2 (en) 1996-05-29

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