JPH0555477A - Semiconductor protective circuit - Google Patents

Abstract

PURPOSE:To enable effective circuit protection from low-level static electricity by reducing a threshold voltage value at which a thick film transistor constituting a semiconductor protective circuit turns on. CONSTITUTION:An input/output part of a semiconductor circuit is provided with a MIS type thick film transistor a gate oxide film of which is an element isolating film (LOCOS) 17: this transistor is overlaid with a polysilicon layer 36 as a conductive layer in contact being connected to a bonding pad 32 together with the gate electrode 24. This design makes electrostatic noise 34 impressed directly to this polysilicon layer 36 to shorten distance up to a channel region. Therefore, the lower center of the LOCOS 17 is channeled even at a relative low voltage. On the other hand, lower both ends of the LOCOS 17 is channeled by the effect of electric fields due to the gate electrode 24. This process makes all the regions under the gate oxide film channeled to short-circuit a drain 12 and a source 13 with the result that electrostatic noise escapes from the source to the ground.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor protection circuit for protecting the inside of a semiconductor integrated circuit from an excessive surge voltage.

[0002]

2. Description of the Related Art A so-called MOS (Metal Oxide Silicon) is one of semiconductor integrated circuits (hereinafter, simply referred to as an LSI).
There is a con) type transistor, but in this MOS transistor, polysilicon to be a gate is provided on a very thin gate oxide film (about 200 angstrom),
By applying H or L voltage to this polysilicon,
The transistor turns on and off.

When a large number of such transistors are formed on the entire surface of a substrate, the transistors are separated from each other in order to separate them from each other.
An element isolation film called COS (Local Oxidation Of Silicon) is provided. This film has about 5000-100
Since a very thick oxide film with a thickness of 00 angstrom is used, even if a voltage within the normal operating range (5 V) is applied, a channel is not formed under the LOCOS and transistor operation does not occur, resulting in complete element isolation. To be done.

However, when a person handles the LSI, static electricity from the outside reaches a few hundreds to a few thousand volts, which may cause a transistor operation even in a region where a normal power supply voltage does not operate. When such a high voltage is directly applied to the gate (polysilicon), the gate oxide film thereunder is very thin, about 200 angstroms, and is easily destroyed. Therefore, normally, a protection circuit against such external static electricity is always provided in a MOS or CMOS (Complementary MOS) type LSI.

Conventionally, such a protection circuit is L
MIS (Metal Insulato) using OCOS as a gate oxide film
r Semiconductor) type thick film transistors were used. Hereinafter, a conventional semiconductor protection circuit will be described with reference to FIG.

FIG. 3 shows a conventional semiconductor protection circuit. Of these, FIG. (A) shows a plan perspective view, and FIG. (B) shows an XY sectional view in FIG. As shown in this figure, the drain 12 and the source 1 are formed on the substrate 11.
3 is formed, and oxide films 14 and 15 having a thickness of about 200 Å are integrally formed on the LOCOS 16, 17, and 18 having a thickness of about 5000 to 10000 Å. The oxide film 14 is used as a gate oxide film of a transistor in the internal circuit. An aluminum gate electrode 24 and a source electrode 25 are provided on the LOCOS via an insulating film 23 of about 5000 angstrom. Insulating film 2
3, windows 27 and 28 are provided, and the gate electrode 24 and the drain 12 and the source electrode 25 and the source 13 are connected to each other. Furthermore, the gate electrode 24 and the source electrode 25
An insulating film 31 as a protective film is provided on the above.
The insulating film 31 has a window 32 as a bonding pad.
Is opened, and bonding with the outside is performed through this.

In such an electrostatic protection circuit using a MIS type thick film transistor having LOCOS as a gate oxide film, the threshold value (V _TH ) of the thick film transistor is much higher than the condition under which normal circuit operation is performed. Since it is extremely high, it has a structure that can be completely ignored as an equivalent circuit in the range of normal power supply voltage.

FIG. 3C shows an equivalent circuit of FIGS. 3A and 3B. As shown in this figure, the gate G and the drain D are short-circuited, and the source S is grounded. This circuit constitutes a MIS type thick film transistor having LOCOS 17 as a gate oxide film.

Now, when electrostatic noise 34 of several hundred to several thousand V comes in from the bonding pad 32 of such a protection circuit, this is applied to the gate electrode 24 and LOCOS.
A channel 33 is created in the lower region of 17. As a result, the drain 12 and the source 13 are short-circuited, and electrostatic noise escapes from the source side to the ground side.

Such protection circuits are arranged around the chip, especially near the bonding pads.

[0011]

As described above, in the conventional semiconductor protection circuit, since the voltage at which the thick film transistor operates is large, it operates in the voltage region of, for example, several hundred to several thousand V, but the gate electrode 24. The distance from the channel region to the channel region is about 15000 which is the sum of the thicknesses of the insulating film 23 and LOCOS 17.
Since it is extremely large at angstrom, a channel is not generated and an electrostatic noise below it does not operate.
That is, the drain and the source are not short-circuited with respect to static electricity of several hundreds V or less, and this voltage is applied to the gate oxide film (thickness 200 angstrom) in the element region. However, since this gate oxide film is normally destroyed at about 16 V, it is easily destroyed by the application of such a large voltage. Therefore, the protection circuit using such a thick film transistor is not sufficient, and it is necessary to take other measures in order to cope with a low level of static electricity.

As such means, there is a method of protecting the circuit by using, for example, a diode, and releasing electrostatic noise of a breakdown voltage (about 18 V) or more in the reverse direction to the ground. This diode is composed of a combination of N and P. The stability of operation is determined by the distance and the length of N and P facing each other. However, if the distance is short, the resistance becomes small and a large current concentrates on this part. There's a problem. In addition, if a large distance and a large area are used to disperse the current, the current eventually concentrates at one location due to the phenomenon of crowding, and the large current can be effectively dispersed. Can not. Therefore, it is difficult to design an effective diode for a large current.

Therefore, there is a problem that the above problems must be solved.

The present invention has been made in order to solve the above problems, and lowers the threshold voltage value at which the thick film transistor is turned on, thereby making it possible to effectively protect the circuit against static electricity of a low level. The purpose is to provide a circuit.

[0015]

A semiconductor protection circuit according to the present invention is provided in an input / output portion of a semiconductor circuit and protects an internal circuit from an excessive surge voltage applied to an input / output bonding pad from the outside. A MIS transistor having a relatively thick oxide film used for element isolation of the transistor in the internal circuit as a gate oxide film is provided, and a source and a back gate electrode of the MIS transistor are connected to a power supply or a ground. At the same time, a drain and a gate electrode are connected to the input / output bonding pad, and a conductive layer is provided on the gate oxide film with a predetermined margin from the drain and source sides, and the conductive layer is connected to the gate electrode. It was done.

[0016]

In the semiconductor protection circuit according to the present invention, the MIS having the element isolation film as the gate oxide film in the input / output portion of the semiconductor circuit.
By providing a thick film transistor of the type and a conductive layer connected to the bonding pad on the gate oxide film, the distance to the channel region can be shortened.
Therefore, a channel is formed in the lower central portion of the gate oxide film even at a relatively low voltage. On the other hand, a channel is formed at both ends below the gate oxide film by the electric field effect of the gate electrode. As a result, a channel is formed in all the regions below the gate oxide film, and the drain and the source are short-circuited.

[0017]

EXAMPLES The present invention will be described in detail below with reference to examples.

FIG. 1 shows a semiconductor protection circuit according to an embodiment of the present invention. Of these, FIG. (A) shows a plan perspective view, and FIG. (B) shows an XY sectional view in FIG. Here, the same parts as those in the conventional example (FIG. 3) are denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

As shown in FIG. 1B, in this embodiment,
A window is opened in the insulating film 23 above the LOCOS 16, a polysilicon layer 36 as a conductive layer is provided between the gate electrode 24 and the LOCOS 16, and the polysilicon layer 36 is formed so as to extend to almost the central portion b on the LOCOS 17. Since the polysilicon layer 36 may be formed at the same time when the elements inside the circuit are formed, no new process is required. Other parts are the same as in the conventional example.

In the semiconductor protection circuit having such a structure, electrostatic noise 34 is externally applied to the bonding pad 32.
Is applied, the electrostatic voltage caused thereby is directly applied from the gate electrode 24 to the polysilicon layer 36. Therefore, in this case, the distance to the channel region is determined only by the thickness of the LOCOS 17, and is about 10,000 angstroms. Therefore, a channel is generated on the lower side b of the LOCOS 17 even for a voltage of several hundreds V or lower, which is lower than the conventional one. As a result, the drain 12 and the source 13 are short-circuited, and electrostatic noise escapes from the source 13 to the ground side via the back gate electrode 25. In the channel region of this figure, both end portions a of the LOCOS 17 are shown.
In and c, since the threshold value of the ON operation is originally low, the polysilicon layer 36 does not need to be applied to this region.

FIG. 2 shows a semiconductor protection circuit according to the second embodiment of the present invention. In this example, the polysilicon layer 36 is provided only on the upper side of the central portion b of the LOCOS 17, the window 29 is opened in the insulating film 23 on the upper side, and the gate electrode 24 and the polysilicon layer 36 are connected.
The operation in this case is similar to that of the first embodiment (FIG. 1), and the electrostatic noise 34 entering from the bonding pad 32 is directly applied to the polysilicon layer 36 from the gate electrode 24.
Therefore, also in this case, a channel is generated on the lower side b of the LOCOS 17 even for a voltage of several hundreds V or lower, which is lower than the conventional one, the drain 12 and the source 13 are short-circuited, and the source 13 is grounded via the source electrode 25. Electrostatic noise will escape. As in the first embodiment, the polysilicon layer 36 need not be applied to both end portions a and c of the LOCOS 17.

In addition to such a protection circuit, it is also effective to use a protection circuit using a diode described in the conventional example together, and it is possible to ensure protection against electrostatic noise.

[0023]

As described above, according to the present invention,
In addition to the original gate electrode of the MIS type thick film transistor as the protection circuit, another conductive layer as the gate electrode is arranged so as to be in contact with the gate oxide film, and this is connected to the bonding pad. A channel is easily formed in all regions under the oxide film, and the drain and the source are short-circuited. Therefore, the internal circuit can be protected against a relatively low electrostatic noise.

[Brief description of drawings]

FIG. 1 is a structural diagram showing a semiconductor protection circuit according to an embodiment of the present invention.

FIG. 2 is a structural diagram showing a semiconductor protection circuit according to another embodiment of the present invention.

FIG. 3 is a structural diagram showing a conventional semiconductor protection circuit.

[Explanation of symbols]

 11 substrate 12 drain 13 source 14 and 15 oxide film 16 and 17 and 18 LOCOS (element isolation film) 23 and 31 insulating film 24 gate electrode 25 source electrode 32 bonding pad 33 channel 34 electrostatic noise 36 polysilicon layer

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical display location H01L 27/092 7342-4M H01L 27/08 102 F 7342-4M 321 H

Claims (1)

[Claims] 1. A semiconductor protection circuit which is provided in an input / output portion of a semiconductor circuit and protects an internal circuit from an excessive surge voltage applied to an input / output bonding pad from the outside. A MIS transistor having a relatively thick oxide film as a gate oxide film is used, and a source and a source electrode of the MIS transistor are connected to a power supply or a ground, and a drain and a gate electrode are connected to the input / output bonding pad. The semiconductor protection circuit is characterized in that a conductive layer is provided on the gate oxide film from the drain and source sides with a predetermined margin, and the conductive layer is connected to the gate electrode.