JPH0555261A - Manufacture of thin film transistor - Google Patents

Abstract

PURPOSE:To prevent a charge-up at the time of an ion implantation and an impurity diffusion from a glass substrate from being generated in a process for forming a thin film transistor. CONSTITUTION:A conductive thin film 2 and an insulating film 3 are formed on a glass substrate 1 and a thin film transistor is formed on the film 3. At the time of an ion implantation, a substrate potential is fixed at a fixed potential by connecting the conductor with a holder and a change in the substrate potential due to the ion implantation is restrained. Moreover, an impurity diffusion from the substrate 1 into a polycrystalline silicon film 4 is prevented by the film 2 and 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for forming a thin film transistor using polycrystalline silicon on an insulating substrate, and more particularly to a device effective for preventing charge-up when ion implantation is performed on a large area substrate. It provides the structure.

[0002]

2. Description of the Related Art Recently, research on polycrystalline silicon thin film transistors has been active for the purpose of driving active matrix liquid crystals.

In the case of a liquid crystal panel, it is necessary to use a transparent substrate, and a quartz substrate or a glass substrate is used. Less than,
An example of a manufacturing process using a quartz substrate will be briefly described with reference to FIG.

A polycrystalline silicon film 22 is formed on a quartz substrate 21.
Are formed (FIG. 2 (A)). The polycrystalline silicon 22 is processed into an island shape, and the gate insulating film 23 is manufactured by thermal oxidation (FIG. 2B). After forming a polycrystalline silicon or metal film, it is processed into a predetermined shape to form the gate electrode 24 (see FIG. 2).
(C)). Impurity ions are implanted into the source 25 and the drain 26 and activated by annealing treatment (FIG. 2).
(D)). After depositing an interlayer insulating film 27 and forming a contact hole 28 for terminal connection, a metal thin film 29 is formed and processed, and wiring of a transistor is performed through the contact hole (FIG. 2E).

[0005]

The above process is manufactured by using the IC technology using a silicon wafer.
Since the substrate of the thin film transistor is insulating unlike the silicon wafer of the C substrate, problems such as charge-up occur at the time of ion implantation in the step shown in, and it is necessary to reduce this.

Particularly, in recent years, attempts have been made to use a low-priced glass substrate as the area of a liquid crystal panel is increased. Since the glass substrate is an insulating material like the quartz substrate, it is necessary to reduce the charge-up, and the increase in the area easily causes the charge-up. Further, when a glass substrate is used instead of the quartz substrate, diffusion of impurities from the glass substrate into the polycrystalline silicon film poses a problem.

The present invention has been made in view of the above problems, and reduces the charge-up that occurs when impurity ions are implanted in a polycrystalline silicon thin film transistor using an insulating substrate, and a glass substrate is used as an insulating substrate. The purpose is to prevent the diffusion of the glass component from the glass substrate to the polycrystalline silicon film when using.

[0008]

In order to solve the above problems, a conductive thin film is formed on an insulating substrate, processed into a predetermined shape, and then an insulating film and a polycrystalline silicon film are laminated,
A transistor is manufactured by using the polycrystalline silicon film as an active layer.

[0009]

According to the present invention, the conductive thin film is formed on the insulating substrate, and the conductive thin film leaks excess charges of the insulating substrate, so that the charge-up at the time of ion implantation is reduced. .. Further, the insulating film arranged between the polycrystalline silicon film which is the active layer and the substrate (glass substrate) electrically separates the conductive film from the transistor and prevents diffusion of impurities from the substrate.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration and process of one embodiment of the present invention.

First, as shown in FIG. 1A, a Ti film (titanium) 2 as a conductive thin film is formed on a glass substrate 1 by EB.
A film is formed by vapor deposition or sputtering, and then the Ti film 2 is removed by etching, leaving a part. In this embodiment, Ti film 2
Since this is used as a gate electrode, a Ti film 2 having a film thickness of about 2000 Å is formed, patterned so as to be arranged under the active layer, and etching processing is performed. The pattern of the Ti film of each transistor is formed so as to be common at the edge of the substrate. Then, the SiN film 3 as an insulating film is deposited on the Ti film 2 by the plasma CVD method. Its film thickness is 1000Å. The film thicknesses of the Ti film and the SiN film differ depending on how the Ti film is used. In this embodiment, since the Ti film 2 is used as the gate electrode as described above, it is formed to have a film thickness corresponding to it.

Next, as shown in FIG.
Amorphous silicon film is formed by CVD method at 1000Å to 30
The polycrystalline silicon film 4 is formed by depositing 00Å and heat-treating at 500 to 650 ° C. Further, after patterning the polycrystalline silicon film 4 into islands, LPC
SiO ₂ 5 is deposited to 1000 Å using the VD method.

Further, as shown in FIG. 1C, E
The Cr film 6 is deposited to 2000 liters by the B vapor deposition method or the sputtering method and patterned on the gate electrode. In order to implant impurities into the source and drain parts, a resist pattern 7 is formed and a window is opened in a necessary part. As impurities, for example, P ions are implanted at an acceleration voltage of 100 keV and a concentration of 5 × 10 ¹⁴ / cm ² . If the Ti electrode and the substrate holder are set so as to be in contact with each other during the implantation of the impurity ions, the glass substrate 1 will not be charged up by the impurity ions.

Then, as shown in FIG. 1D, after removing the resist pattern, impurity activation annealing is performed at 550 to 600 ° C. Then, SiO ₂ 8 of the interlayer insulating layer
Is deposited by using the APCVD method at 5000 Å
A contact hole 9 for connection is formed in the drain and gate portions. At the same time, a contact hole with the lower Ti film 2 is also formed (not shown).

Finally, the thin film transistors are connected by Al wiring.

By using the above method, the uniformity of ion implantation was improved.

Further, by forming the SiN film 3, the diffusion of impurities from the glass substrate 1 was prevented. As a result of analyzing impurities in the polycrystalline silicon film 4, Na, Ca, Sr,
The diffusion of impurities such as Al could be reduced, and the mobility of the thin film transistor, the uniformity of the threshold voltage, and the reproducibility were improved.

Although the Ti electrode is used as the lower gate electrode in the embodiment, it may be used as a part of the source electrode or the drain electrode. The material of the conductive thin film is not limited to Ti, and other conductive materials can be used.

[0020]

According to the present invention, the stability of ion implantation is improved, and the characteristics and uniformity of the manufactured transistor can be confirmed. Further, the diffusion of impurities in the glass substrate can be reduced, and the reproducibility of characteristics and the stability can be improved.

Further, it was possible to obtain an effect that wiring defects can be reduced by making flat and thin wiring such as gate lines and source lines on a glass substrate.

Further, when the Ti electrode is used as the lower gate electrode, the double gate effect is obtained, and the ON current can be improved.

[Brief description of drawings]

1A to 1D are cross-sectional views showing a manufacturing process of a thin film transistor which is an embodiment of the present invention.

2A to 2E are cross-sectional views showing a manufacturing process of a conventional thin film transistor.

[Explanation of symbols]

 1 Glass Substrate 2 Conductive Film 3 Insulating Film 4 Polycrystalline Silicon Film 5 Gate Insulating Film 6 Gate Electrode 7 Resist Film 8 Interlayer Insulating Layer 9 Contact Hole

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H01L 27/12 A 8728-4M

Claims (4)

[Claims] 1. A conductive thin film is formed on an insulating substrate, processed into a predetermined shape, an insulating film and a polycrystalline silicon film are laminated, and a transistor is produced by using the polycrystalline silicon film as an active layer. A method of manufacturing a thin film transistor, comprising: 2. The method of manufacturing a thin film transistor according to claim 1, wherein the conductive thin film is commonly tied at an end portion of the substrate and kept at a constant potential during ion implantation. 3. The conductive thin film is connected to a gate or a source or a drain of the method for manufacturing the thin film transistor, and the conductive thin film is used as a part of wiring. Method of manufacturing thin film transistor. 4. The method of manufacturing a thin film transistor according to claim 1, wherein the conductive thin film is arranged below the active layer.