JPH05326841A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent an increase in the number of photolithography processes and to improve the accuracy of the manufacture of a film thickness by a method wherein the formation of an N-type high-concentration region and a selective oxidation of a capacitor film are performed by the photolithography process of one time using a nitride film. CONSTITUTION:An oxide film 105 is formed and thereafter, a silicon nitride film 106 is grown. After that, the film 106 located at a capacitor formation region is etched using a photoresist 107 as a mask. Subsequently, an N-type high-concentration region 108 is formed at the capacitor formation region. Moreover, the gate oxide film 105 located at the capacitor formation region is etched. Then, after the photoresist is removed, a capacitor oxide film 109 is formed. At this time, as the film 106 works as a masking material for oxidation resistance, the film thickness of the gate oxide film 105 of a CMOS transistor part is not changed. Then, a gate electrode 110, a capacitor upper electrode 110' and N<+> and P<+> source and drain regions 11 and 112 are formed. Lastly, an inter-layer insulating film 113 is formed and metallic wirings 114 are annexed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a CMOS and Bi-CMOS integrated circuit on which MOS capacitors are mounted together.

[0002]

2. Description of the Related Art A conventional Bi-CMOS integrated circuit (IC)
In the case where a MOS type capacitor is mixedly mounted therein, by using the gate oxide film as a capacitance film, the capacitor could be formed without increasing the number of steps.

On the other hand, as the integration of ICs has increased, the gate oxide film has become thinner based on the scaling law.
The power supply voltage of the CMOS circuit is about to drop from 5V to 3.3V. For example, in Bi-CMOS IC, CMO
The S part may be used as a 5V system and the bipolar part may be used as a 9V system or a 12V system. When a MOS type capacitor is used for the bipolar part, the dielectric strength and reliability corresponding to the power supply voltage are guaranteed. There is a need.

If the gate oxide film becomes thinner than 200 Å, if it is used as a capacitance film, an electric field of 5 MV / cm or more will be applied to 9 V type and 12 V type, and the reliability cannot be guaranteed. .. Therefore, it is necessary to form the capacitor film separately from the gate insulating film to increase the thickness.

A conventional technique for thickening a capacitance film will be described with reference to FIGS. 5 to 9 in accordance with a method for manufacturing a CMOS integrated circuit.

First, as shown in FIG. 5, a P ^-- type silicon substrate 201 is prepared, an N-type well region 202 and a P-type well region 203 are formed, and then an element isolation oxide film 204 is formed. Further, the surface of the element forming region is pseudo-oxidized by about 3000 liters.

Next, as shown in FIG. 6, for the purpose of reducing the bias voltage dependence of the capacitance value of the MOS capacitor, the photoresist 206 is used as a mask in the capacitor formation region at an acceleration energy of 70 keV and a dose amount of about 1 × 10 ¹⁴ cm ^-2. Then, phosphorus is ion-implanted to form the N-type high concentration layer 207.

Next, as shown in FIG.
After removing 06 and etching the pseudo oxide film 205,
An oxide film 208 having a thickness of {(desired capacitance oxide film thickness) − (gate oxide film thickness)} is formed by thermal oxidation.

Further, using the photoresist 209 as a mask, the oxide film 208 in the CMOS transistor portion is removed by etching with diluted hydrofluoric acid. Finally, after removing the photoresist 208, thermal oxidation is performed again to form a gate oxide film 210 having a desired film thickness (for example, 150Å) on the CMOS transistor portion. At this time, the oxide film 208 of the capacitor portion is further oxidized and has a desired film thickness (FIG. 8).

Finally, as shown in FIG. 9, the gate electrode 211 of the CMOS transistor and the upper electrode 2 of the capacitor.
11 'is formed of a polycrystalline silicon layer, and N ⁺ type and P ⁺ type source / drain regions 212 and 213 are further formed, and a CMOS transistor having a thin gate oxide film and a capacitor having a capacitance film thicker than the gate oxide film are formed. Was getting.

[0011]

In the conventional method of forming a capacitance film having a thickness larger than that of the gate oxide film, an oxide film having a thickness obtained by subtracting the gate oxide film thickness from a desired capacitance film thickness is formed in advance. After that, the oxide film is selectively removed only in the CMOS transistor portion, and then the film is further thermally oxidized by the gate oxide film thickness, and the photolithography process is increased by one time for the selective removal of the oxide film. ing.
Further, since the thickness of the capacitance film is determined by the two oxidation processes, the manufacturing accuracy is poor.

An object of the present invention is to provide a method of manufacturing a semiconductor device, which does not increase the number of photolithography steps and improves the manufacturing accuracy of the film thickness.

[0013]

In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention is a CMOS or Bi-type in which a gate oxide film and a capacitive oxide film having different thicknesses are formed on the same substrate. In the method for manufacturing a CMOS integrated circuit, a step of forming a nitride film after forming a gate oxide film, and a step of removing the nitride film in the capacitor formation region by a photolithography process and further removing the gate oxide film in that portion Using the nitride film as an oxidation resistant mask, a step of forming an oxide film having a desired thickness only in a capacitor formation region and a step of removing the nitride film are included.

[0014]

In a method of manufacturing a CMOS or Bi-CMOS integrated circuit in which a gate oxide film and a capacitive oxide film having different thicknesses are formed on the same substrate, after forming the gate oxide film,
A nitride film is formed, the nitride film in the capacitor formation region is removed by a photolithography process, the gate oxide film in that region is further removed, and the nitride film is used as an oxidation-resistant mask so that only the capacitor formation region has a desired thickness. Oxide film is formed, and the nitride film is removed.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. 1 to 4 are process sectional views showing an embodiment of the present invention. In the drawings, in this embodiment, a case where a CMOS transistor having a thin gate oxide film and a capacitor having a thick capacitance oxide film are formed on the same silicon substrate will be described, and the forming process of a bipolar transistor will be omitted.

First, as shown in FIG. 1, a P ⁻ type silicon substrate 101 is prepared, an N type well region 102 and a P type well region 103 are formed, and then selective oxidation is performed to form an element isolation oxide film 104. ..

Further, after the surface of the element forming region is pseudo-oxidized by about 300Å, it is removed by dilute hydrofluoric acid, and then a gate oxide film 105 having a desired film thickness, for example, about 150Å is formed by thermal oxidation.

Next, as shown in FIG. 2, after the silicon nitride film 106 is grown on the substrate surface, the nitride film 106 in the capacitor formation region is etched using the photoresist 107 as a mask. Subsequently, phosphorus ions are implanted with an acceleration energy of 70 keV and a dose of about 1 × 10 ¹⁴ cm ⁻² to form an N-type high concentration region 108 in the capacitor formation region. The reason why the N-type high concentration region 108 is provided is to reduce the bias voltage dependency of the capacitance value of the capacitor as described in the prior art. Further, the gate oxide film 105 in the capacitor formation region is etched using dilute hydrofluoric acid.

Next, as shown in FIG.
After removing 07, a capacitive oxide film 109 having a desired film thickness, for example, 280 Å is formed by thermal oxidation. At this time, since the nitride film 106 acts as an oxidation-resistant mask material, CM
The thickness of the gate oxide film 105 in the OS transistor portion does not change, and it is possible to form a thick oxide film only in the capacitor region.

Next, as shown in FIG. 4, the gate electrode 110 of the CMOS transistor and the upper electrode 1 of the capacitor.
10 'is formed of polycrystalline silicon, and N ⁺ type and P ⁺ type source / drain regions 111 and 112 are formed by ion implantation. Finally, the interlayer insulating film 113 is formed,
The metal wiring 114 is attached to complete the device.

In this embodiment, the case where the capacitive oxide film is formed thicker than the gate oxide film has been described, but it is clear that the present invention can be applied to the case where a thin capacitive film is formed. The manufacturing method at this time is the same as the above manufacturing method, and only the thickness of the capacitive oxide film is different.

[0022]

As described above, according to the present invention, the CMOS
The thickness of the gate oxide film of the transistor and the thickness of the capacitance film of the MOS type capacitor can be made different, and the reliability can be guaranteed even if a high voltage is applied to the capacitor by increasing the thickness of the capacitance film. It is possible to

In the semiconductor process, the number of photolithography steps is one of the important factors that determine the manufacturing period and the manufacturing cost. In the present invention, the use of the nitride film forms the N-type high concentration region and selectively oxidizes the capacitive film. Since the photolithography process is performed once, the work period is shortened and the cost is reduced as compared with the conventional technique.

In the prior art, the thickness of the capacitive oxide film is
Since it is decided by the oxidation process before the gate oxide film is formed and the gate oxidation, the film thickness deviates from the desired film thickness.
Although there is a possibility that the accuracy of the capacitor may be lowered due to a large variation, there is no concern that the accuracy is lowered because the gate oxide film and the capacitive oxide film are formed independently in the present invention.

[Brief description of drawings]

FIG. 1 is a process sectional view showing an embodiment of the present invention.

FIG. 2 is a process sectional view showing an embodiment of the present invention.

FIG. 3 is a process sectional view showing an embodiment of the present invention.

FIG. 4 is a process sectional view showing an embodiment of the present invention.

FIG. 5 is a process sectional view showing a conventional technique.

FIG. 6 is a process sectional view showing a conventional technique.

FIG. 7 is a process sectional view showing a conventional technique.

FIG. 8 is a process sectional view showing a conventional technique.

FIG. 9 is a process sectional view showing a conventional technique.

[Explanation of symbols]

101,201 P ^- type silicon substrate 102,202 N-type well region 103,203 P-type well region 104,204 Element isolation oxide film 105,210 Gate oxide film 106 Silicon nitride film 107,206,209 Photoresist 108,207 N-type high concentration region 109 Capacitive oxide film 110, 211 Gate electrode 110 ', 211' Capacitor upper electrode 111, 212 N ⁺ type source / drain region 112, 213 P ⁺ type source / drain region 113 Inter-layer insulation film 114 Metal wiring 205 Pseudo-type Oxide film 208 Oxide film

Claims (1)

[Claims] 1. A CMOS or Bi-CM in which a gate oxide film and a capacitive oxide film having different thicknesses are formed on the same substrate.
In the method of manufacturing an OS integrated circuit, a step of forming a nitride film after forming a gate oxide film, and a step of removing the nitride film in the capacitor formation region by a photolithography process and further removing the gate oxide film in that portion A method for manufacturing a semiconductor device, comprising: a step of forming an oxide film having a desired thickness only in a capacitor formation region by using the nitride film as a mask for oxidation resistance; and a step of removing the nitride film. ..